1. 02 11月, 2022 3 次提交
  2. 25 10月, 2022 1 次提交
  3. 19 10月, 2022 2 次提交
  4. 30 9月, 2022 1 次提交
  5. 27 9月, 2022 5 次提交
  6. 22 9月, 2022 1 次提交
  7. 19 9月, 2022 2 次提交
  8. 07 9月, 2022 1 次提交
  9. 03 8月, 2022 12 次提交
  10. 26 7月, 2022 1 次提交
  11. 14 7月, 2022 1 次提交
  12. 06 7月, 2022 1 次提交
  13. 29 6月, 2022 1 次提交
    • R
      nvme: fix regression when disconnect a recovering ctrl · f7f70f4a
      Ruozhu Li 提交于
      We encountered a problem that the disconnect command hangs.
      After analyzing the log and stack, we found that the triggering
      process is as follows:
      CPU0                          CPU1
                                      nvme_rdma_error_recovery_work
                                        nvme_rdma_teardown_io_queues
      nvme_do_delete_ctrl                 nvme_stop_queues
        nvme_remove_namespaces
        --clear ctrl->namespaces
                                          nvme_start_queues
                                          --no ns in ctrl->namespaces
          nvme_ns_remove                  return(because ctrl is deleting)
            blk_freeze_queue
              blk_mq_freeze_queue_wait
              --wait for ns to unquiesce to clean infligt IO, hang forever
      
      This problem was not found in older kernels because we will flush
      err work in nvme_stop_ctrl before nvme_remove_namespaces.It does not
      seem to be modified for functional reasons, the patch can be revert
      to solve the problem.
      
      Revert commit 794a4cb3 ("nvme: remove the .stop_ctrl callout")
      Signed-off-by: NRuozhu Li <liruozhu@huawei.com>
      Reviewed-by: NSagi Grimberg <sagi@grimberg.me>
      Signed-off-by: NChristoph Hellwig <hch@lst.de>
      f7f70f4a
  14. 28 6月, 2022 2 次提交
  15. 23 6月, 2022 1 次提交
  16. 14 6月, 2022 2 次提交
  17. 31 5月, 2022 1 次提交
    • N
      nvme: set controller enable bit in a separate write · aa41d2fe
      Niklas Cassel 提交于
      The NVM Express Base Specification 2.0 specifies in the description
      of the CC – Controller Configuration register:
      "Host software shall set the Arbitration Mechanism Selected (CC.AMS),
      the Memory Page Size (CC.MPS), and the I/O Command Set Selected (CC.CSS)
      to valid values prior to enabling the controller by setting CC.EN to ‘1’.
      
      While we haven't seen any controller misbehaving while setting all bits
      in a single write, let's do it in the order that it is written in the
      spec, as there could potentially be controllers that are implemented to
      rely on the configuration bits being set before enabling the controller.
      Signed-off-by: NNiklas Cassel <niklas.cassel@wdc.com>
      Signed-off-by: NChristoph Hellwig <hch@lst.de>
      aa41d2fe
  18. 28 5月, 2022 1 次提交
  19. 20 5月, 2022 1 次提交