The mxc-ehci driver calls SoC specific phy initialization right after
calling board specific initialization. To offer greater flexibility for
boards to setup the phy and to get rid of some unnecessary flags in
platform data this patch lets the boards call the SoC specific phy
initialization and remove it from the driver.
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Add support for setting CHRGVBUS to workaround a hardware bug on efika mx/sb
boards.
See http://lists.infradead.org/pipermail/linux-arm-kernel/2011-January/037341.htmlSigned-off-by: NArnaud Patard <arnaud.patard@rtp-net.org>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

commit 711669e5 fixed port 0 support
for i.MX51 but broke it for (at least) i.MX27 which doesn't have
a usb_phy1 clock but has a pdev->id 0.
Signed-off-by: NEric Bénard <eric@eukrea.com>
Cc: Arnaud Patard <arnaud.patard@rtp-net.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

Current code doesn't really enable the usb clocks so if they're disabled
when booting linux, the kernel/machine will hang as soon as someone is trying
to read a usb register
Signed-off-by: NArnaud Patard <arnaud.patard@rtp-net.org>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

In order to read/write to the i.MX OTG viewport register it is necessary to setup
the PORTSCx register first.

By default i.MX OTG port is configured for USB serial PHY. In order to use a ULPI PHY
the PORTSCx register needs to be configured properly.

commit 724c8525 (USB: ehci/mxc: compile fix) placed the PORTSC setup after the OTG
viewport is accessed and this causes ULPI read/write to fail.

Revert the PORTSC setup order.

Tested on a MX31PDK board with a ISP1504 transceiver:

ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
mxc-ehci mxc-ehci.0: initializing i.MX USB Controller
ULPI transceiver vendor/product ID 0x04cc/0x1504
Found NXP ISP1504 ULPI transceiver.
ULPI integrity check: passed.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

Several of the EHCI glue drivers either predate or were merged in the
same timeframe as API changes at the USB core level, resulting in some
missing endpoint_reset and clear_tt_buffer_complete callbacks.

This fixes up all of ehci-atmel, mxc, w90x900, and xilinx-of to tie in
the new helpers, which brings them in line with everyone else.
Reported-by: NAlan Stern <stern@rowland.harvard.edu>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

Commit
	65fd4272 (USB: ehci tdi : let's tdi_reset set host mode)

broke the build using ARM's mx51_defconfig:

 	  CC      drivers/usb/host/ehci-hcd.o
 	In file included from drivers/usb/host/ehci-hcd.c:1166:
 	drivers/usb/host/ehci-mxc.c: In function 'ehci_mxc_drv_probe':
 	drivers/usb/host/ehci-mxc.c:192: error: 'ehci' undeclared (first use in this function)
 	drivers/usb/host/ehci-mxc.c:192: error: (Each undeclared identifier is reported only once
 	drivers/usb/host/ehci-mxc.c:192: error: for each function it appears in.)
 	drivers/usb/host/ehci-mxc.c:117: warning: unused variable 'temp'
 	make[3]: *** [drivers/usb/host/ehci-hcd.o] Error 1
 	make[2]: *** [drivers/usb/host/ehci-hcd.o] Error 2
 	make[1]: *** [sub-make] Error 2
 	make: *** [all] Error 2

Fix it together with the warning about the unused variable and use
msleep instead of mdelay as requested by Alan Stern.

Cc: Dinh Nguyen <Dinh.Nguyen@freescale.com>
Cc: Alan Stern <stern@rowland.harvard.edu>
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Tested-by: NNguyen Dinh-R00091 <R00091@freescale.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

tdi_reset is already taking care of setting host mode for tdi devices.
Don't duplicate code in platform driver.

Make ehci_halt a nop if the controller is not in host mode (otherwise it 
will fail), and let's ehci_reset do the tdi_reset.
We need to move hcd->has_tt flags before ehci_halt, in order ehci_halt 
knows we are a tdi device.


Before the setup routine was doing :
- put controller in host mode
- ehci_halt
- ehci_init
- hcd->has_tt = 1;
- ehci_reset

Now we do :
- hcd->has_tt = 1;
- ehci_halt
- ehci_init
- ehci_reset

PS : now we handle correctly the device -> host transition.
Signed-off-by: NMatthieu CASTET <matthieu.castet@parrot.com>
Cc: Alan Stern <stern@rowland.harvard.edu>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

i.MX25's EHCI is the same as i.MX35's one.
Signed-off-by: NEric Bénard <eric@eukrea.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

The old code registered the hcd even if there were no transceivers
detected, leading to oopses like this if we try to probe a non-existant
ULPI:

[    2.730000] mxc-ehci mxc-ehci.0: unable to init transceiver
[    2.740000] timeout polling for ULPI device
[    2.740000] timeout polling for ULPI device
[    2.750000] mxc-ehci mxc-ehci.0: unable to enable vbus on transceiver
[    2.750000] mxc-ehci mxc-ehci.0: Freescale On-Chip EHCI Host Controller
[    2.760000] mxc-ehci mxc-ehci.0: new USB bus registered, assigned bus number 2
[    2.770000] Unhandled fault: external abort on non-linefetch (0x808) at 0xc4876184
[    2.770000] Internal error: : 808 [#1] PREEMPT
[    2.770000] last sysfs file:
[    2.770000] Modules linked in:
[    2.770000] CPU: 0    Not tainted  (2.6.33.5 #5)
[    2.770000] PC is at ehci_hub_control+0x4d4/0x8f8
[    2.770000] LR is at ehci_mxc_setup+0xbc/0xdc
[    2.770000] pc : [<c0196dfc>]    lr : [<c019bc8c>]    psr: 00000093
[    2.770000] sp : c3815e40  ip : 00000001  fp : 60000013
[    2.770000] r10: c4876184  r9 : 00000000  r8 : c3814000
[    2.770000] r7 : c391d2cc  r6 : 00000001  r5 : 00000001  r4 : 00000000
[    2.770000] r3 : 80000000  r2 : 00000007  r1 : 80000000  r0 : c4876184
[    2.770000] Flags: nzcv  IRQs off  FIQs on  Mode SVC_32  ISA ARM Segment kernel
[    2.770000] Control: 0005317f  Table: a0004000  DAC: 00000017
[    2.770000] Process swapper (pid: 1, stack limit = 0xc3814270)
...
Signed-off-by: NWolfram Sang <w.sang@pengutronix.de>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: stable <stable@kernel.org>
Acked-by: NDaniel Mack <daniel@caiaq.de>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

This patch adds USB HW initializiation code to /plat-mxc/ehci.c.
	-Sets some specific PHY settings
Renames mxc_set_usbcontrol to mxc_initialize_usb_hw.
Adds new register bit defines for the USB HW on Freescale
SoCs.

This patch applies to 2.6.34-rc6.
Signed-off-by: NDinh Nguyen <Dinh.Nguyen@freescale.com>
Reviewed-by: NDaniel Mack <daniel@caiaq.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h

percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files.  percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.

percpu.h -> slab.h dependency is about to be removed.  Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability.  As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.

  http://userweb.kernel.org/~tj/misc/slabh-sweep.py

The script does the followings.

* Scan files for gfp and slab usages and update includes such that
  only the necessary includes are there.  ie. if only gfp is used,
  gfp.h, if slab is used, slab.h.

* When the script inserts a new include, it looks at the include
  blocks and try to put the new include such that its order conforms
  to its surrounding.  It's put in the include block which contains
  core kernel includes, in the same order that the rest are ordered -
  alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
  doesn't seem to be any matching order.

* If the script can't find a place to put a new include (mostly
  because the file doesn't have fitting include block), it prints out
  an error message indicating which .h file needs to be added to the
  file.

The conversion was done in the following steps.

1. The initial automatic conversion of all .c files updated slightly
   over 4000 files, deleting around 700 includes and adding ~480 gfp.h
   and ~3000 slab.h inclusions.  The script emitted errors for ~400
   files.

2. Each error was manually checked.  Some didn't need the inclusion,
   some needed manual addition while adding it to implementation .h or
   embedding .c file was more appropriate for others.  This step added
   inclusions to around 150 files.

3. The script was run again and the output was compared to the edits
   from #2 to make sure no file was left behind.

4. Several build tests were done and a couple of problems were fixed.
   e.g. lib/decompress_*.c used malloc/free() wrappers around slab
   APIs requiring slab.h to be added manually.

5. The script was run on all .h files but without automatically
   editing them as sprinkling gfp.h and slab.h inclusions around .h
   files could easily lead to inclusion dependency hell.  Most gfp.h
   inclusion directives were ignored as stuff from gfp.h was usually
   wildly available and often used in preprocessor macros.  Each
   slab.h inclusion directive was examined and added manually as
   necessary.

6. percpu.h was updated not to include slab.h.

7. Build test were done on the following configurations and failures
   were fixed.  CONFIG_GCOV_KERNEL was turned off for all tests (as my
   distributed build env didn't work with gcov compiles) and a few
   more options had to be turned off depending on archs to make things
   build (like ipr on powerpc/64 which failed due to missing writeq).

   * x86 and x86_64 UP and SMP allmodconfig and a custom test config.
   * powerpc and powerpc64 SMP allmodconfig
   * sparc and sparc64 SMP allmodconfig
   * ia64 SMP allmodconfig
   * s390 SMP allmodconfig
   * alpha SMP allmodconfig
   * um on x86_64 SMP allmodconfig

8. percpu.h modifications were reverted so that it could be applied as
   a separate patch and serve as bisection point.

Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.
Signed-off-by: NTejun Heo <tj@kernel.org>
Guess-its-ok-by: NChristoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>

On various mxc boards, the intial ULPI reads resulted in a timeout
which prevented the transceiver to be identified and thus the ehci
device to be probed.

Initializing the hardware lines connected to the transceiver (through
pdata->init call) before actually enabling clocks and configuring
registers in the devices fixes this problem.
Signed-off-by: NValentin Longchamp <valentin.longchamp@epfl.ch>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

The Freescale MX27 and MX31 SoCs have a EHCI controller onboard.
The controller is capable of USB on the go. This patch adds
a driver to support all three of them.

Users have to pass details about serial interface configuration in the
platform data.

The USB OTG core used here is the ARC core, so the driver should
be renamed and probably be merged with ehci-fsl.c eventually.
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: NDaniel Mack <daniel@caiaq.de>
Cc: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>