1. 07 8月, 2019 11 次提交
    • V
      net: dsa: dump CPU port regs through master · 48e23311
      Vivien Didelot 提交于
      Merge the CPU port registers dump into the master interface registers
      dump through ethtool, by nesting the ethtool_drvinfo and ethtool_regs
      structures of the CPU port into the dump.
      
      drvinfo->regdump_len will contain the full data length, while regs->len
      will contain only the master interface registers dump length.
      
      This allows for example to dump the CPU port registers on a ZII Dev
      C board like this:
      
          # ethtool -d eth1
          0x004:                                              0x00000000
          0x008:                                              0x0a8000aa
          0x010:                                              0x01000000
          0x014:                                              0x00000000
          0x024:                                              0xf0000102
          0x040:                                              0x6d82c800
          0x044:                                              0x00000020
          0x064:                                              0x40000000
          0x084: RCR (Receive Control Register)               0x47c00104
              MAX_FL (Maximum frame length)                   1984
              FCE (Flow control enable)                       0
              BC_REJ (Broadcast frame reject)                 0
              PROM (Promiscuous mode)                         0
              DRT (Disable receive on transmit)               0
              LOOP (Internal loopback)                        0
          0x0c4: TCR (Transmit Control Register)              0x00000004
              RFC_PAUSE (Receive frame control pause)         0
              TFC_PAUSE (Transmit frame control pause)        0
              FDEN (Full duplex enable)                       1
              HBC (Heartbeat control)                         0
              GTS (Graceful transmit stop)                    0
          0x0e4:                                              0x76735d6d
          0x0e8:                                              0x7e9e8808
          0x0ec:                                              0x00010000
          .
          .
          .
          88E6352  Switch Port Registers
          ------------------------------
          00: Port Status                            0x4d04
                Pause Enabled                        0
                My Pause                             1
                802.3 PHY Detected                   0
                Link Status                          Up
                Duplex                               Full
                Speed                                100 or 200 Mbps
                EEE Enabled                          0
                Transmitter Paused                   0
                Flow Control                         0
                Config Mode                          0x4
          01: Physical Control                       0x003d
                RGMII Receive Timing Control         Default
                RGMII Transmit Timing Control        Default
                200 BASE Mode                        100
                Flow Control's Forced value          0
                Force Flow Control                   0
                Link's Forced value                  Up
                Force Link                           1
                Duplex's Forced value                Full
                Force Duplex                         1
                Force Speed                          100 or 200 Mbps
          .
          .
          .
      Signed-off-by: NVivien Didelot <vivien.didelot@gmail.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      48e23311
    • D
      Merge branch 'drop_monitor-Various-improvements-and-cleanups' · c4ed5253
      David S. Miller 提交于
      Ido Schimmel says:
      
      ====================
      drop_monitor: Various improvements and cleanups
      
      This patchset performs various improvements and cleanups in drop monitor
      with no functional changes intended. There are no changes in these
      patches relative to the RFC I sent two weeks ago [1].
      
      A followup patchset will extend drop monitor with a packet alert mode in
      which the dropped packet is notified to user space instead of just a
      summary of recent drops. Subsequent patchsets will add the ability to
      monitor hardware originated drops via drop monitor.
      
      [1] https://patchwork.ozlabs.org/cover/1135226/
      ====================
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      c4ed5253
    • I
      drop_monitor: Use pre_doit / post_doit hooks · b19d9550
      Ido Schimmel 提交于
      Each operation from user space should be protected by the global drop
      monitor mutex. Use the pre_doit / post_doit hooks to take / release the
      lock instead of doing it explicitly in each function.
      Signed-off-by: NIdo Schimmel <idosch@mellanox.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      b19d9550
    • I
      drop_monitor: Add extack support · 96510096
      Ido Schimmel 提交于
      Add various extack messages to make drop_monitor more user friendly.
      Signed-off-by: NIdo Schimmel <idosch@mellanox.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      96510096
    • I
      drop_monitor: Avoid multiple blank lines · ff3818ca
      Ido Schimmel 提交于
      Remove multiple blank lines which are visually annoying and useless.
      
      This suppresses the "Please don't use multiple blank lines" checkpatch
      messages.
      Signed-off-by: NIdo Schimmel <idosch@mellanox.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      ff3818ca
    • I
      drop_monitor: Document scope of spinlock · 01921d53
      Ido Schimmel 提交于
      While 'per_cpu_dm_data' is a per-CPU variable, its 'skb' and
      'send_timer' fields can be accessed concurrently by the CPU sending the
      netlink notification to user space from the workqueue and the CPU
      tracing kfree_skb(). This spinlock is meant to protect against that.
      
      Document its scope and suppress the checkpatch message "spinlock_t
      definition without comment".
      Signed-off-by: NIdo Schimmel <idosch@mellanox.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      01921d53
    • I
      drop_monitor: Rename and document scope of mutex · dbf896b7
      Ido Schimmel 提交于
      The 'trace_state_mutex' does not only protect the global 'trace_state'
      variable, but also the global 'hw_stats_list'.
      
      Subsequent patches are going add more operations from user space to
      drop_monitor and these all need to be mutually exclusive.
      
      Rename 'trace_state_mutex' to the more fitting 'net_dm_mutex' name and
      document its scope.
      Signed-off-by: NIdo Schimmel <idosch@mellanox.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      dbf896b7
    • I
      drop_monitor: Use correct error code · 2230a7ef
      Ido Schimmel 提交于
      The error code 'ENOTSUPP' is reserved for use with NFS. Use 'EOPNOTSUPP'
      instead.
      Signed-off-by: NIdo Schimmel <idosch@mellanox.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      2230a7ef
    • M
      net: dsa: ksz: Drop NET_DSA_TAG_KSZ9477 · 267df70f
      Marek Vasut 提交于
      This Kconfig option is unused, drop it.
      Signed-off-by: NMarek Vasut <marex@denx.de>
      Cc: Andrew Lunn <andrew@lunn.ch>
      Cc: David S. Miller <davem@davemloft.net>
      Cc: Florian Fainelli <f.fainelli@gmail.com>
      Cc: Tristram Ha <Tristram.Ha@microchip.com>
      Cc: Vivien Didelot <vivien.didelot@gmail.com>
      Cc: Woojung Huh <woojung.huh@microchip.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      267df70f
    • M
      net: dsa: ksz: Merge ksz_priv.h into ksz_common.h · 6a7abc61
      Marek Vasut 提交于
      Merge the two headers into one, no functional change.
      Signed-off-by: NMarek Vasut <marex@denx.de>
      Cc: Andrew Lunn <andrew@lunn.ch>
      Cc: David S. Miller <davem@davemloft.net>
      Cc: Florian Fainelli <f.fainelli@gmail.com>
      Cc: Tristram Ha <Tristram.Ha@microchip.com>
      Cc: Vivien Didelot <vivien.didelot@gmail.com>
      Cc: Woojung Huh <woojung.huh@microchip.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      6a7abc61
    • M
      net: dsa: ksz: Remove dead code and fix warnings · ffc60b55
      Marek Vasut 提交于
      Remove ksz_port_cleanup(), which is unused. Add missing include
      "ksz_common.h", which fixes the following warning when built with
      make ... W=1
      
      drivers/net/dsa/microchip/ksz_common.c:23:6: warning: no previous prototype for ‘...’ [-Wmissing-prototypes]
      
      Note that the order of the headers cannot be swapped, as that would
      trigger missing forward declaration errors, which would indicate the
      way forward is to merge the two headers into one.
      Signed-off-by: NMarek Vasut <marex@denx.de>
      Cc: Andrew Lunn <andrew@lunn.ch>
      Cc: David S. Miller <davem@davemloft.net>
      Cc: Florian Fainelli <f.fainelli@gmail.com>
      Cc: Tristram Ha <Tristram.Ha@microchip.com>
      Cc: Vivien Didelot <vivien.didelot@gmail.com>
      Cc: Woojung Huh <woojung.huh@microchip.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      ffc60b55
  2. 06 8月, 2019 4 次提交
  3. 04 8月, 2019 17 次提交
  4. 03 8月, 2019 8 次提交
    • D
      Merge branch 'enetc-PCIe-MDIO' · 4de97b0c
      David S. Miller 提交于
      Claudiu Manoil says:
      
      ====================
      enetc: Add mdio bus driver for the PCIe MDIO endpoint
      
      First patch fixes a sparse issue and cleans up accessors to avoid
      casting to __iomem.  The second one cleans up the Makefile, to make
      it easier to add new entries.
      
      Third patch just registers the PCIe endpoint device containing
      the MDIO registers as a standalone MDIO bus driver, to provide
      an alternative way to control the MDIO bus.  The same code used
      by the ENETC ports (eth controllers) to manage MDIO via local
      registers applies and is reused.
      
      Bindings are provided for the new MDIO node, similarly to ENETC
      port nodes bindings.
      
      Last patch enables the ENETC port 1 and its RGMII PHY on the
      LS1028A QDS board, where the MDIO muxing configuration relies
      on the MDIO support provided in the first patch.
      
      Changes since v0:
      v1 - fixed mdio bus allocation
      v2 - cleaned up accessors to avoid casting
      v3 - fixed spelling (mostly commit message)
      v4 - fixed err path check blunder
      v5 - fixed loadble module build, provided separate kbuild module
           for the driver
      ====================
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      4de97b0c
    • C
      arm64: dts: fsl: ls1028a: Enable eth port1 on the ls1028a QDS board · 8488d8e9
      Claudiu Manoil 提交于
      LS1028a has one Ethernet management interface. On the QDS board, the
      MDIO signals are multiplexed to either on-board AR8035 PHY device or
      to 4 PCIe slots allowing for SGMII cards.
      To enable the Ethernet ENETC Port 1, which can only be connected to a
      RGMII PHY, the multiplexer needs to be configured to route the MDIO to
      the AR8035 PHY.  The MDIO/MDC routing is controlled by bits 7:4 of FPGA
      board config register 0x54, and value 0 selects the on-board RGMII PHY.
      The FPGA board config registers are accessible on the i2c bus, at address
      0x66.
      
      The PF3 MDIO PCIe integrated endpoint device allows for centralized access
      to the MDIO bus.  Add the corresponding devicetree node and set it to be
      the MDIO bus parent.
      Signed-off-by: NAlex Marginean <alexandru.marginean@nxp.com>
      Signed-off-by: NClaudiu Manoil <claudiu.manoil@nxp.com>
      Reviewed-by: NAndrew Lunn <andrew@lunn.ch>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      8488d8e9
    • C
      dt-bindings: net: fsl: enetc: Add bindings for the central MDIO PCIe endpoint · 288a91d5
      Claudiu Manoil 提交于
      The on-chip PCIe root complex that integrates the ENETC ethernet
      controllers also integrates a PCIe endpoint for the MDIO controller
      providing for centralized control of the ENETC mdio bus.
      Add bindings for this "central" MDIO Integrated PCIe Endpoint.
      Signed-off-by: NClaudiu Manoil <claudiu.manoil@nxp.com>
      Reviewed-by: NAndrew Lunn <andrew@lunn.ch>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      288a91d5
    • C
      enetc: Add mdio bus driver for the PCIe MDIO endpoint · 231ece36
      Claudiu Manoil 提交于
      ENETC ports can manage the MDIO bus via local register
      interface.  However there's also a centralized way
      to manage the MDIO bus, via the MDIO PCIe endpoint
      device integrated by the same root complex that also
      integrates the ENETC ports (eth controllers).
      
      Depending on board design and use case, centralized
      access to MDIO may be better than using local ENETC
      port registers.  For instance, on the LS1028A QDS board
      where MDIO muxing is required.  Also, the LS1028A on-chip
      switch doesn't have a local MDIO register interface.
      
      The current patch registers the above PCIe endpoint as a
      separate MDIO bus and provides a driver for it by re-using
      the code used for local MDIO access.  It also allows the
      ENETC port PHYs to be managed by this driver if the local
      "mdio" node is missing from the ENETC port node.
      Signed-off-by: NClaudiu Manoil <claudiu.manoil@nxp.com>
      Reviewed-by: NAndrew Lunn <andrew@lunn.ch>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      231ece36
    • C
      enetc: Clean up makefile · 0c010a9d
      Claudiu Manoil 提交于
      Clean up overcomplicated makefile to make it more maintainable.
      Basically, there's a set of common objects shared between
      the PF and VF driver modules.  This can be implemented in a
      simpler way, without conditionals, less repetition, allowing
      also for easier updates in the future.
      Signed-off-by: NClaudiu Manoil <claudiu.manoil@nxp.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      0c010a9d
    • C
      enetc: Clean up local mdio bus allocation · 2152e7a2
      Claudiu Manoil 提交于
      What's needed is basically a pointer to the mdio registers.
      This is one way to store it inside bus->priv allocated space,
      without upsetting sparse.
      Reworked accessors to avoid __iomem casting.
      Used devm_* variant to further clean up the init error /
      remove paths.
      
      Fixes following sparse warning:
       warning: incorrect type in assignment (different address spaces)
          expected void *priv
          got struct enetc_mdio_regs [noderef] <asn:2>*[assigned] regs
      
      Fixes: ebfcb23d ("enetc: Add ENETC PF level external MDIO support")
      Signed-off-by: NClaudiu Manoil <claudiu.manoil@nxp.com>
      Reviewed-by: NAndrew Lunn <andrew@lunn.ch>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      2152e7a2
    • D
      Merge branch 'net-dsa-mv88e6xxx-add-support-for-MV88E6220' · 4a986617
      David S. Miller 提交于
      Hubert Feurstein says:
      
      ====================
      net: dsa: mv88e6xxx: add support for MV88E6220
      
      This patch series adds support for the MV88E6220 chip to the mv88e6xxx driver.
      The MV88E6220 is almost the same as MV88E6250 except that the ports 2-4 are
      not routed to pins.
      
      Furthermore, PTP support is added to the MV88E6250 family.
      
      v2:
       - insert all 6220 entries in correct numerical order
       - introduce invalid_port_mask
       - move ptp_cc_mult* to ptp_ops and restored original ptp_adjfine code
       - added Andrews Reviewed-By to patch 2 and 4
      ====================
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      4a986617
    • H
      net: dsa: mv88e6xxx: add PTP support for MV88E6250 family · 71509614
      Hubert Feurstein 提交于
      This adds PTP support for the MV88E6250 family.
      Signed-off-by: NHubert Feurstein <h.feurstein@gmail.com>
      Acked-by: NRichard Cochran <richardcochran@gmail.com>
      Reviewed-by: NAndrew Lunn <andrew@lunn.ch>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      71509614