We need set-rate-parent flags for the display's clock path so that the
DSS driver can change the clock rate of the PLL.

This patchs adds the ti,set-rate-parent flag to 'dss_dss_clk' clock
node, which is only a gate clock, allowing the setting of the clock rate
to propagate to the PLL.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
Cc: devicetree@vger.kernel.org
Acked-by: NTero Kristo <t-kristo@ti.com>

Add a new Linux clock for DRA7 based SoCs to control DESHDCP clock.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: NTero Kristo <t-kristo@ti.com>

This patch sets display clock correctly. If Display clock isn't set
correctly then you would find below messages and Display controller
doesn't work correctly.

 exynos-drm: No connectors reported connected with modes
 [drm] Cannot find any crtc or sizes - going 1024x768

Fixes: abc0b144 ("drm: Perform basic sanity checks on probed modes")
Cc: <stable@vger.kernel.org>
Signed-off-by: NInki Dae <inki.dae@samsung.com>
Reviewed-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com>
Tested-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: NKukjin Kim <kgene@kernel.org>

Use the new zynq binding for macb ethernet, since it will disable half
duplex gigabit like the Zynq TRM says to do.
Signed-off-by: NNathan Sullivan <nathan.sullivan@ni.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

While Sitara AM335x SoCs are very close to OMAP SoCs, the 32-line GPIO
controllers are numbered from 0 on AM335x and from 1 on OMAP. But when
the configuration for the TI WLAN controllers was converted from
platform data to device tree, this detail was overlooked, as 10 boards
were using OMAP with the WL12xx and WL18xx controllers, and only one
was based on AM335x.

This invalid configuration prevents the WL1271 module on the AM335x
EVM-SK from notifying interrupts to the SoC, and breaks the wlan driver.

The DTS must be corrected to use the correct GPIO controller.
Signed-off-by: NRomain Izard <romain.izard.pro@gmail.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Add nand-ecc-opt and device-width properties to enable nand support on
Devkit8000.
Signed-off-by: NAnthoine Bourgeois <anthoine.bourgeois@gmail.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Fixes: http://bugs.elinux.org/issues/143

Entering RTC-only sleep is only properly supported on early prototypes series
(pre-A6) of the BeagleBone Black.  Since rev (A6A), which include all production
versions, it is not support at due to.

(rev A6) enable of the 3v3b regulator moved from LDO2 to LDO4 (3v3a)
side-effect: 3v3b rail remains on in sleep-mode (also in off-mode when battery-powered)

(rev A6A) am335x vdds supply moved from LDO3 to LDO1
side-effect: vdds remains supplied in sleep-mode
Reported-by: NMatthijs van Duin <matthijsvanduin@gmail.com>
Tested-by: NMatthijs van Duin <matthijsvanduin@gmail.com>
Signed-off-by: NRobert Nelson <robertcnelson@gmail.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Felipe Balbi <balbi@ti.com>
Cc: Johan Hovold <johan@kernel.org>
Signed-off-by: NTony Lindgren <tony@atomide.com>

The i.MX27 dtb build should be controlled by CONFIG_SOC_IMX27 rather
than CONFIG_SOC_IMX31.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
Fixes: cb612390 ("ARM: dts: Only build dtb if associated Arch and/or SoC is enabled")
Cc: <stable@vger.kernel.org>

According to the imx27 documentation, fec has a 4 Kbyte
memory space map. Moreover, the actual 16 Kbyte mapping
overlaps the SCC (Security Controller) memory register
space. So, we reduce the memory register space to 4 Kbyte.
Signed-off-by: NPhilippe Reynes <tremyfr@gmail.com>
Acked-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Fixes: 9f0749e3 ("ARM i.MX27: Add devicetree support")
Cc: <stable@vger.kernel.org>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

The Marvell mwifiex driver prevents the system to enter into a suspend
state if the card power is not preserved during a suspend/resume cycle.

So Suspend-to-RAM and Suspend-to-idle is failing on Exynos5800 Peach Pi
and Exynos5420 Peach Pit Chromebooks.

Add the keep-power-in-suspend Power Management property to the SDIO/MMC
node so the mwifiex suspend handler doesn't fail and the system is able
to enter into a suspend state.
Signed-off-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk>
Reviewed-by: NDoug Anderson <dianders@chromium.org>
Signed-off-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: NKukjin Kim <kgene@kernel.org>

Commit 9fd85eb5 ("ARM: pmu: add support for interrupt-affinity
property") added an optional "interrupt-affinity" property, to specify
the CPU affinity for each SPI listed in the interrupts property.

Without this property, we get this boot warning:

  CPU PMU: Failed to parse <no-node>/interrupt-affinity[0]

This patch adds interrupt-affinity to the PMU node in the
vexpress-ca15_a7(a.k.a TC2) device tree.
Signed-off-by: NSudeep Holla <sudeep.holla@arm.com>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

Commit 9fd85eb5 ("ARM: pmu: add support for interrupt-affinity
property") added an optional "interrupt-affinity" property, to specify
the CPU affinity for each SPI listed in the interrupts property.

Without this property, we get this boot warning:

  CPU PMU: Failed to parse <no-node>/interrupt-affinity[0]

This patch adds interrupt-affinity to the PMU node in the
vexpress-v2p-ca9 device tree.
Signed-off-by: NRobert Schwebel <r.schwebel@pengutronix.de>
Acked-by: NSudeep Holla <sudeep.holla@arm.com>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

Commit d9d1f3e2 ("ARM: l2c: check that DT files specify the required
"cache-unified" property") mandates to specify this required property.
Without this property, we get this boot warning:

"L2C: device tree omits to specify unified cache"

This patch adds "cache-unified" property to L2 cache node in vexpress
CA9 device tree.
Signed-off-by: NRobert Schwebel <r.schwebel@pengutronix.de>
Acked-by: NSudeep Holla <sudeep.holla@arm.com>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

Si5351 clock generator on CuBox uses XTAL as clock reference, name the
clock phandle accordingly.
Signed-off-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>

The Marvell mwifiex driver prevents the system to enter into a suspend
state if the card power is not preserved during a suspend/resume cycle.

So Suspend-to-RAM and Suspend-to-idle are failing on Exynos5250 Snow.

Add the keep-power-in-suspend Power Management property to the SDIO/MMC
node so the mwifiex suspend handler doesn't fail and the system is able
to enter into a suspend state.
Signed-off-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk>
Reviewed-by: NDoug Anderson <dianders@chromium.org>
Signed-off-by: NKukjin Kim <kgene@kernel.org>

Remove the extra zero in the "cpu-crit-0" trip point for exynos5420
and exynos5440.
Signed-off-by: NAbhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: NKukjin Kim <kgene@kernel.org>

The Exynos4412 SoC has a s3c6410 RTC where the source clock
is now a mandatory property.
This patch fixes probe failure of s3c-rtc on Odroid-X2/U2/U3 boards.
Signed-off-by: NMarkus Reichl <m.reichl@fivetechno.de>
Tested-by: NTobias Jakobi <tjakobi@math.uni-bielefeld.de>
Reviewed-by: NChanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk>
Tested-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: NKukjin Kim <kgene@kernel.org>

Commit ea08de16 ("ARM: dts: Add DISP1 power domain for exynos5420")
added a device node for the Exynos5420 DISP1 power domain but dit not
make the DP controller a consumer of that power domain.

This causes an "Unhandled fault: imprecise external abort" error if the
exynos-dp driver tries to access the DP controller registers and the PD
was turned off. This lead to a kernel panic and a complete system hang.

Make the DP controller device node a consumer of the DISP1 power domain
to ensure that the PD is turned on when the exynos-dp driver is probed.

Fixes: ea08de16 ("ARM: dts: Add DISP1 power domain for exynos5420")
Signed-off-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: NKukjin Kim <kgene@kernel.org>

The L3 Error handling on OMAP5 for the most part is very similar
to that of OMAP4, and had leveraged common data structures and
register layout definitions so far. Upon closer inspection, there
are a few minor differences causing an incorrect decoding and
reporting of the master NIU upon an error:

  1. The L3_TARG_STDERRLOG_MSTADDR.STDERRLOG_MSTADDR occupies
     11 bits on OMAP5 as against 8 bits on OMAP4, with the master
     NIU connID encoded in the 6 MSBs of the STDERRLOG_MSTADDR
     field.
  2. The CLK3 FlagMux component has 1 input source on OMAP4 and 3
     input sources on OMAP5. The common DEBUGSS source is at a
     different input on each SoC.

Fix the above issues by using a OMAP5-specific compatible property
and using SoC-specific data where there are differences.
Signed-off-by: NSuman Anna <s-anna@ti.com>
Acked-by: NNishanth Menon <nm@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Fix a typo in DRA7 dtsi where 12 bytes are needed for register
description of ABB efuse registers, however only 8 bytes are provided
to map. For some weird reason, this does not generate abort at offset
0x8, probably due to default maps already provided in io.c for the bus
register ranges.
Reported-by: NMatt Gessner <Matt.Gessner@windriver.com>
Reported-by: NSuman Anna <s-anna@ti.com>
Signed-off-by: NNishanth Menon <nm@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

BeagleBoard-X15 pre-production change includes switching the GPIO fan
gpio over from 1 to 2 to allow for a potential fix at a later point in
time for USB client VBUS detection using PMIC VBUS detect capability.
Signed-off-by: NNishanth Menon <nm@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

BeagleBoard-X15 pre-production change includes switching over to UART
pins that now allow for UART download capability. All original boards
should either have been returned for modifications or already modified
for the required change and maintaining compatibility for older boards
are no longer needed.
Signed-off-by: NNishanth Menon <nm@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

The new AM437x SK Beta boards have removed the
large capacitors on the gpio-matrix column lines
which means we can reduce col-scan-delay-us to 5us
without loosing functionality.
Signed-off-by: NFelipe Balbi <balbi@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

AM437x Starter Kit uses a NewHaven Display module with
a 4.3" display and EDT FT5306 touchscreen

On that module's new revision, NewHave decided to change
the pinout on the 6 pin flat-pcb touchscreen connector so
that instead of having WAKE pin, we now have RESETn.

The new display module is available on AM437x SK Beta and
all new revisions while the older revision is only available
on AM437x SK Alpha which, unfortunately, can't be supported
anymore in mainline without a revert of this patch.
Signed-off-by: NFelipe Balbi <balbi@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

With commit bc078316 ("ARM: dts: DRA7: Add node for RTC"), we now
have AM57xx RTC register itself as alias 0 even before DS1307 or TPS
rtc drivers are loaded up. However, since neither TPS, nor AM57xx RTC
are capable of being backedup by battery, we would like to maintain
the "primary" rtc as mcp79410 rtc device.

This also generates the following warnings in the bootlog highlighting
the issue:
[    5.895445] rtc-ds1307 2-006f: /aliases ID 0 not available
...
[    6.476285] palmas-rtc 48070000.i2c:tps659038@58:tps659038_rtc: /aliases ID 1 not available

So, add proper aliases to ensure that RTC order is always consistent
to userspace immaterial of probe order.
Signed-off-by: NNishanth Menon <nm@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

The interrupt polarity provided in devicetree is used to configure
the interrupt controller(ARM GIC), however, it seems that we have an
inverter at the GIC boundary inside AM57xx which inverts the signal
input from sys_irq external interrupt source.

Further, as per GIC distributor TRM,
http://infocenter.arm.com/help/topic/com.arm.doc.ddi0438d/BGBHIACJ.html#BABJFCFB
ARM GIC distributor does not support IRQ trigger type
IRQ_TYPE_LEVEL_LOW, and only rising or level high signals.

However, for some reason, the current configuration(which gets ignored
by GIC driver) functions on some platforms, however, on few platforms
results in infinite interrupts hogging the system down.

Switch over to rising edge for GIC configuration which is also aligned
with trigger point from the RTC chip and the internal inversion.

Fixes: 5a0f93c6 ("ARM: dts: Add am57xx-beagle-x15")
Signed-off-by: NGrygorii Strashko <Grygorii.Strashko@linaro.org>
Signed-off-by: NNishanth Menon <nm@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Add missing #iommu-cells property to the isp and iva iommu nodes. This
fixes the binding (property is required according to the generic iommu
binding) and removes the following kernel warning triggered once the
iommu nodes are referenced:

[    0.647521] /ocp/isp@480bc000: could not get #iommu-cells for /ocp/mmu@480bd400
Signed-off-by: NSebastian Reichel <sre@kernel.org>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: NSakari Ailus <sakari.ailus@iki.fi>
Signed-off-by: NTony Lindgren <tony@atomide.com>

N900 audio recording needs that codec provides bias voltage for integrated
digital microphone and headset microphone depending which one is used.
Digital microphone uses 2 V bias and it comes from the codec A part. Codec
B part drives the headset microphone bias and that is set to 2.5 V.

Cc: stable@vger.kernel.org # v3.16+
Signed-off-by: NPavel Machek <pavel@ucw.cz>
[Jarkko: Headset mic bias changed to 2 (2.5 V) as it was before commit
e2e8bfdf ("ASoC: tlv320aic3x: Convert mic bias to a supply widget")]
Signed-off-by: NJarkko Nikula <jarkko.nikula@bitmer.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Whereas for Armada 370 and XP the main PLL frequency was 2GHz for the
Armada 375, 38x and 39x, the frequency is 1GHz. When writing support
for these last SoCs, there was no official value for the PLL. Now that
we have it, this patch fixes it in the device tree.

This value is currently only used by the NAND driver for the setting
the NAND timing. Fortunately it is not actually used: all the mainline
board with a NAND flash comes with a NAND device tree node using the
"marvell,nand-keep-config" property. With this property the timings
are not modified in the kernel driver and are kept from the
bootloader.
Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com>
Acked-by: NAndrew Lunn <andrew@lunn.ch>
Acked-by: NMarcin Wojtas <mw@semihalf.com>

The adv7511 IRQ is low level triggered, not falling edge triggered. The
wrong sense configuration results in no interrupt being triggered at
all, breaking hotplug detection. Fix it.
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Fixes: 83a0731b ("ARM: shmobile: koelsch: Add DU HDMI output support")
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

It should be the first controller, not the second. The indexes of the
usb resets were also wrong and have been fixed.

The issue was caused by the changes in 308efde2 ("ARM: tegra: Add resets
& has-utmi-pad-registers flag to all USB PHYs") being misapplied by git
due to the patch context being insufficient.

This broke USB after 6261b06d ("regulator: Defer lookup of supply to
regulator_get"), because it changed the order in which the controllers
were probed.

The fix for this issue was suggested by Mikko Perttunen and Tuomas
Tynkkynen.
Signed-off-by: NTomeu Vizoso <tomeu.vizoso@collabora.com>
Cc: Mikko Perttunen <mikko.perttunen@kapsi.fi>
Cc: Tuomas Tynkkynen <ttynkkynen@nvidia.com>
Tested-by: NJon Hunter <jonathanh@nvidia.com>
Signed-off-by: NThierry Reding <treding@nvidia.com>

The pinctrl-assert-gpios is an invalid pinctrl property.  It was
probably sneaked from vendor tree.  Remove it.

Fixes: 4e18a224 ("ARM: imx6qdl-sabreauto.dtsi: add max7310 support")
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Fix a typo in the TX DMA interrupt name for AUART4.
This patch makes AUART4 operational again.
Signed-off-by: NMarek Vasut <marex@denx.de>
Fixes: f30fb03d ("ARM: dts: add generic DMA device tree binding for mxs-dma")
Cc: stable@vger.kernel.org
Acked-by: NStefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

The property '#pwm-cells' is currently missing. It is not possible to
use pwm4 without this property.
Signed-off-by: NMarkus Pargmann <mpa@pengutronix.de>
Fixes: 5658a68f ("ARM i.MX25: Add devicetree")
Cc: <stable@vger.kernel.org>
Reviewed-by: NFabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

The fixed-regulator bindings require a separate property enable-active-high,
the standard gpio phandle property polarity setting is ignored.
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>
Fixes: 4fe69a93 ("ARM: dts: Add Phytec pfla02 with i.MX6 DualLite/Solo")
Cc: stable@vger.kernel.org
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

The dr_mode of usb0 on imx233-olinuxino is left to default "otg".
Since the green LED (GPIO2_1) on imx233-olinuxino is connected to the
same pin as USB_OTG_ID it's possible to disable USB host by LED toggling:

echo 0 > /sys/class/leds/green/brightness
[ 1068.890000] ci_hdrc ci_hdrc.0: remove, state 1
[ 1068.890000] usb usb1: USB disconnect, device number 1
[ 1068.920000] usb 1-1: USB disconnect, device number 2
[ 1068.920000] usb 1-1.1: USB disconnect, device number 3
[ 1069.070000] usb 1-1.2: USB disconnect, device number 4
[ 1069.450000] ci_hdrc ci_hdrc.0: USB bus 1 deregistered
[ 1074.460000] ci_hdrc ci_hdrc.0: timeout waiting for 00000800 in 11

This patch fixes the issue by setting dr_mode to "host" in the dts file.
Reported-by: NHarald Geyer <harald@ccbib.org>
Signed-off-by: NStefan Wahren <stefan.wahren@i2se.com>
Reviewed-by: NFabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: NMarek Vasut <marex@denx.de>
Acked-by: NPeter Chen <peter.chen@freescale.com>
Fixes: b4931294 ("ARM: dts: imx23-olinuxino: Add USB host support")
Cc: stable@vger.kernel.org
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

On imx23-olinuxino the LED turns on when level logic high is aplied to
GPIO2_1.

Fix the gpios property accordingly.

Fixes: b34aa185 ("ARM: dts: imx23-olinuxino: Remove unneeded "default-on"")
Reported-by: NStefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Tested-by: NStefan Wahren <stefan.wahren@i2se.com>
Cc: stable@vger.kernel.org
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

There is no crystal connected to the internal RTC on the Open Block
AX3. So let's disable it in order to prevent the kernel probing the
driver uselessly. Eventually this patches removes the following
warning message from the boot log:
"rtc-mv d0010300.rtc: internal RTC not ticking"
Acked-by: NAndrew Lunn <andrew@lunn.ch>
Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com>
Cc: <stable@vger.kernel.org> # v3.8 +

Fixes: c94a4ab7 ("ARM: ux500: Disable the MMCI gpio-regulator by default")
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
Reviewed-by: NBjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Fixes: c94a4ab7 ("ARM: ux500: Disable the MMCI gpio-regulator by default")
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
Reviewed-by: NBjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>