- 21 6月, 2013 2 次提交
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由 Heiko Stuebner 提交于
This adds a generic devicetree board file and a dtsi for boards based on the RK3066a SoCs from Rockchip. Apart from the generic parts (gic, clocks, pinctrl) the only components currently supported are the timers, uarts and mmc ports (all DesignWare- based). Signed-off-by: NHeiko Stuebner <heiko@sntech.de> Acked-by: NOlof Johansson <olof@lixom.net>
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由 Heiko Stuebner 提交于
This adds a basic clock setup for rk3066a SoCs. Only the gates are set up currently, as the mux and dividers should use the upcoming generic devicetree bindings. Clocks whose rates need to be known are supplied by fixed-rate "dummy"-clocks that provide the correct rate. This is uncritical insofar that the only bootloader currently in existence for Rockchip devices is the propietary Rockchip one that always setups the clocks in the necessary way. Signed-off-by: NHeiko Stuebner <heiko@sntech.de> Reviewed-by: NMike Turquette <mturquette@linaro.org>
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- 18 6月, 2013 1 次提交
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由 Santosh Shilimkar 提交于
Add minimal device tree data for Keystone2 based SOCs. Patch contains mainly ARM related SOC data and nothing about EVM specific yet. Cc: Grant Likely <grant.likely@linaro.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: arm@kernel.org Acked-by: NOlof Johansson <olof@lixom.net> Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
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- 17 6月, 2013 13 次提交
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由 Linus Walleij 提交于
This switches the code using a local remapping of the system controller to enable the U300 board to be self-powered over to making the U300-specific syscon compatible with the MFD generic syscon driver, selecting the generic syscon driver, and augmenting the board power code to pick the regmap and manipulate the syscon from the regmap side of things. Cc: Dong Aisheng <dong.aisheng@linaro.org> Suggested-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Linus Walleij 提交于
This converts the last of the U300 clocks to being probed from the device tree. Acked-by: NMike Turquette <mturquette@linaro.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Linus Walleij 提交于
This moves the slow, fast, AHB bridge and "rest" clocks on the U300 system controller over to registration from the device tree. Acked-by: NMike Turquette <mturquette@linaro.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Linus Walleij 提交于
This converts the fixed and fixed-factor clocks in the U300 platform to register themselves from the device tree. Acked-by: NMike Turquette <mturquette@linaro.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Linus Walleij 提交于
This adds a device tree node for the U300 system controller and remaps this dynamically instead of using hard-coded virtual addresses. The board power set-up code is altered to fetch a reference to the syscon using ampersand <&syscon> notation. This way of passing a pointer to the syscon will also be used by the clocks. Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Linus Walleij 提交于
This registers the U300 FSMC flash controller from the device tree, and defines the three partitions. Skip the BBT scan as in the current platform data. Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Linus Walleij 提交于
This probes the U300 dummy-spichip from the device tree and adds the apropriate node to the tree. Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Linus Walleij 提交于
This registers the PL022 PrimeCell from the U300 device tree. We make a new copy of the platform data for the device tree boot path, as the old platform data is in an older file which will be going away. Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Linus Walleij 提交于
This adds the COH 901 318 DMA controller to the U300 device tree. All devices now converted to device tree so far will start to find their DMA channels. Note that the U300 is not yet using the device tree to obtain DMA channels, but this is a first step. Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Linus Walleij 提交于
This adds DMA channel assignments to the MMC/SD-controller and the two UARTs already in the U300 device tree, as we have now defined a way to obtain DMA channels from the device tree. Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Linus Walleij 提交于
This adds support for the U300 MMC/SD card slot from the device tree boot. No other changes needed. Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Linus Walleij 提交于
Now that we have enabled board power and the AB3100 regulators, put the regulator data into the device tree and enable it so we can start to tie regulators to devices. To begin with we're only supplying the power to the board itself. Cc: Mark Brown <broonie@kernel.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Linus Walleij 提交于
This adds the COH 901 331 RTC to the U300 device tree. Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 16 6月, 2013 1 次提交
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由 Linus Walleij 提交于
This registers the memory ranges for I/O, non-prefetched and prefetched memory and configuration space for the PCIv3 bridge and let us fetch these basic memory resources from the device tree in the device tree boot path. Remove the stepping stone platform device. This is an either/or approach - the platform data path is mutually exclusive to the plain platform data path and provided addresses from the device tree have to be correct. This adds the interrupt-map property to the PCIv3 DTS file and makes the bridge obtain mappings from the device tree. Acked-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 12 6月, 2013 2 次提交
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由 Magnus Damm 提交于
Instead of relying on CONFIG_MEMORY_START for memory base address, let each romImage board header file specify this information. This is reworks code not to rely on CONFIG_MEMORY_START which in turn is needed for ARCH_MULTIPLATFORM. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Magnus Damm 提交于
Remove the ATAGS data structure from head-shmobile.S since a default ATAGS is already provided by the code in arch/arm/kernel/atags_parser.c. Passing a NULL as ATAGS is valid. For actual hardware specific setup the fixup callback in the board code may be used. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 07 6月, 2013 1 次提交
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由 Thomas Petazzoni 提交于
The ranges DT entry needed by the PCIe controller is defined at the SoC .dtsi level. However, some boards have a NOR flash, and to support it, they need to override the SoC-level ranges property to add an additional range. Since PCIe and NOR support came separately, some boards were not properly changed to include the PCIe range in their ranges property at the .dts level. This commit fixes those platforms. Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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- 06 6月, 2013 3 次提交
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由 Marc C 提交于
The previous mask values for the legacy ARM CPU IDs were conflicting with the CPU ID assignments for late-generation CPUs (like the Qualcomm MSM/QSD or Broadcom Brahma-15 processors). This change corrects the legacy ARM CPU ID value so that the jump table can fall-through to the appropriate cache maintenance / MMU functions. Signed-off-by: NMarc C <marc.ceeeee@gmail.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Arnd Bergmann 提交于
In August 2012, Matthew Gretton-Dann checked a change into binutils labelled "Error on obsolete & warn on deprecated registers", apparently as part of ARMv8 support. Apparently, this was supposed to emit the message "Warning: This coprocessor register access is deprecated in ARMv8" when using certain mcr/mrc instructions and building for ARMv8. Unfortunately, the message that is actually emitted appears to be '(null)', which is less helpful in comparison. Even more unfortunately, this is biting us on every single kernel build with a new gas, because arch/arm/boot/compressed/head.S and some other files in that directory are built with -march=all since kernel commit 80cec14a "[ARM] Add -march=all to assembly file build in arch/arm/boot/compressed" back in v2.6.28. This patch reverts Russell's nice solution and instead marks the head.S file to be built for armv7-a, which fortunately lets us build all instructions in that file without warnings even on the broken binutils. Without this patch, building anything results in: arch/arm/boot/compressed/head.S: Assembler messages: arch/arm/boot/compressed/head.S:565: Warning: (null) arch/arm/boot/compressed/head.S:676: Warning: (null) arch/arm/boot/compressed/head.S:698: Warning: (null) arch/arm/boot/compressed/head.S:722: Warning: (null) arch/arm/boot/compressed/head.S:726: Warning: (null) arch/arm/boot/compressed/head.S:957: Warning: (null) arch/arm/boot/compressed/head.S:996: Warning: (null) arch/arm/boot/compressed/head.S:997: Warning: (null) arch/arm/boot/compressed/head.S:1027: Warning: (null) arch/arm/boot/compressed/head.S:1035: Warning: (null) arch/arm/boot/compressed/head.S:1046: Warning: (null) arch/arm/boot/compressed/head.S:1060: Warning: (null) arch/arm/boot/compressed/head.S:1092: Warning: (null) arch/arm/boot/compressed/head.S:1094: Warning: (null) arch/arm/boot/compressed/head.S:1095: Warning: (null) arch/arm/boot/compressed/head.S:1102: Warning: (null) arch/arm/boot/compressed/head.S:1134: Warning: (null) Signed-off-by: NArnd Bergmann <arnd@arndb.de> Cc: stable@vger.kernel.org Cc: Matthew Gretton-Dann <matthew.gretton-dann@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Nicolas Pitre 提交于
Selecting this option produces: AS arch/arm/boot/compressed/debug.o arch/arm/boot/compressed/debug.S:4:33: fatal error: mach/debug-macro.S: No such file or directory compilation terminated. make[3]: *** [arch/arm/boot/compressed/debug.o] Error 1 The semihosting support cannot be modelled into a senduart macro as it requires memory space for argument passing. So the CONFIG_DEBUG_LL_INCLUDE may not have any sensible value and the include directive should be omitted. While at it, let's add proper semihosting output support to the decompressor. Signed-off-by: NNicolas Pitre <nico@linaro.org> Acked-by: NShawn Guo <shawn.guo@linaro.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 03 6月, 2013 4 次提交
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由 Suman Anna 提交于
OMAP5 has 6 timers (GPTimers 5, 6, 8 to 11) that are capable of PWM. The PWM capability property is missing from the node definitions of couple of timers. Add ti,timer-pwm attribute for timer 5, 6, 8 and 11. Signed-off-by: NSuman Anna <s-anna@ti.com> [benoit.cousson@linaro.org: Update changelog and subject to highlight the fix] Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>
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由 Kevin Hilman 提交于
Earlier commits ensured proper muxing of pins related to proper TWL6030 behavior: see commit 265a2bc8 (ARM: OMAP3: TWL4030: ensure sys_nirq1 is mux'd and wakeup enabled) and commit 1ef43369 (ARM: OMAP4: TWL: mux sys_drm_msecure as output for PMIC). However these only fixed legacy boot and not DT boot. For DT boot, the default mux values need to be set properly in DT. Special thanks to Nishanth Menon for the review and catching some major flaws in earlier versions. Tested on OMAP4430/Panda and OMAP4460/Panda-ES. Cc: Nishanth Menon <nm@ti.com> Cc: Tony Lindgren <tony@atomide.com> Signed-off-by: NKevin Hilman <khilman@linaro.org> Acked-by: NGrygorii Strashko <grygorii.strashko@ti.com> [benoit.cousson@linaro.org: Slightly change the subject to align board name with file name] Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>
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由 Lars Poeschel 提交于
The gpmc driver is actually looking for "gpmc,num-cs" and "gpmc,num-waitpins" properties in DT. The binding doc also states this. Correct the properties in the dts to provide the right values for the gpmc driver. Signed-off-by: NLars Poeschel <poeschel@lemonage.de> Acked-by: NPeter Korsgaard <jacmet@sunsite.dk> Acked-by: NPekon Gupta <pekon@ti.com> Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>
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由 Jongsung Kim 提交于
Stephen Warren reported the recent commit 78506f22 (add support for extended FIFO-size of PL011-r1p5) breaks the serial port on the BCM2835 ARM SoC. A UART compatible with the ARM PL011-r1p5 should have 32-deep FIFOs. The BCM2835 UART just looks like an ARM PL011-r1p5, but has 16-deep FIFOs just like PL011-r1p4 or earlier revisions. As a workaround for this compatibility issue, this patch overrides the HW UART periphid register values with the actually compatible UART periphid 0x00241011 (r1p3 or r1p4). Reported-by: NStephen Warren <swarren@wwwdotorg.org> Signed-off-by: NJongsung Kim <neidhard.kim@lge.com> Signed-off-by: NStephen Warren <swarren@wwwdotorg.org> Signed-off-by: NOlof Johansson <olof@lixom.net>
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- 31 5月, 2013 3 次提交
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由 Linus Walleij 提交于
This adds the COH 901 327 watchdog to the U300 device tree. Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Linus Walleij 提交于
This adds the two I2C busses to the device tree so these probe properly. Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Linus Walleij 提交于
This register the most basic peripherals and makes the U300 boot to prompt from a device tree. Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 29 5月, 2013 1 次提交
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由 Arnaud Ebalard 提交于
Now that the mvebu-pcie driver is in place and enabled for kirkwood, convert to initializing PCIe via devicetree. Signed-off-by: NArnaud Ebalard <arno@natisbad.org> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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- 28 5月, 2013 8 次提交
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由 Thomas Petazzoni 提交于
The length of the registers area for the Marvell 370/XP Ethernet controller was incorrect in the .dtsi: 0x2400 while it should have been 0x4000. Until now, this problem wasn't noticed because there was a large static mapping for all I/Os set up by ->map_io(). But since we're going to get rid of this static mapping, we need to ensure that the register areas are properly sized. Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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由 Thomas Petazzoni 提交于
The length of the registers area for the Marvell 370/XP SATA controller was incorrect in the .dtsi: 0x2400 while it should have been 0x5000. Until now, this problem wasn't noticed because there was a large static mapping for all I/Os set up by ->map_io(). But since we're going to get rid of this static mapping, we need to ensure that the register areas are properly sized. Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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由 Thomas Petazzoni 提交于
This commit converts the Marvell DB-88F6281/DB-88F6282 board to the Device Tree. In fact, the code was supporting two different boards: one with the 6281 SoC variant, and one with the 6282 SoC variant. The difference between the two being that the 6281 has one PCIe interface, and the 6282 has two PCIe interfaces. In order to handle that with the Device Tree, we create a 'kirkwood-db.dtsi' file that contains the definitions common to both boards, and 'kirkwood-db-88f6281.dts' and 'kirkwood-db-88f6282.dts' for the definitions specific to each board. This is similar to what is done for the QNAP TS219 Kirkwood platform. We have kept one single Kconfig option, just like it was before. Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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由 Thomas Petazzoni 提交于
Now that the PCIe mvebu driver is usable on Kirkwood, use it instead of the legacy PCIe code, since it allows to describe the PCIe interfaces in the Device Tree. Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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由 Thomas Petazzoni 提交于
Now that the PCIe mvebu driver is usable on Kirkwood, use it instead of the legacy PCIe code, since it allows to describe the PCIe interfaces in the Device Tree. Since it was the only device left that prevented this platform to use the Device Tree only, we remove the board-nsa310.c file and the related Kconfig/Makefile bits. Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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由 Thomas Petazzoni 提交于
Now that the PCIe mvebu driver is usable on Kirkwood, use it instead of the legacy PCIe code, since it allows to describe the PCIe interfaces in the Device Tree. Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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由 Thomas Petazzoni 提交于
Now that the PCIe mvebu driver is usable on Kirkwood, use it instead of the legacy PCIe code, since it allows to describe the PCIe interfaces in the Device Tree. Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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由 Thomas Petazzoni 提交于
This commit adds Device Tree details to enable the PCIe interfaces on Kirkwood. The 6281 has one PCIe interface, the 6282 has two PCIe interfaces. Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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- 27 5月, 2013 1 次提交
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由 Soren Brinkmann 提交于
Migrate the Zynq platform and its drivers to use the new clock controller driver. Signed-off-by: NSoren Brinkmann <soren.brinkmann@xilinx.com> Cc: John Stultz <john.stultz@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Jiri Slaby <jslaby@suse.cz> Cc: linux-serial@vger.kernel.org Signed-off-by: NMichal Simek <michal.simek@xilinx.com> Acked-by: NMike Turquette <mturquette@linaro.org>
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