Register range of display clocks is 0x10000, as it can be seen from
DE2 documentation.

Fix it.
Signed-off-by: NJernej Skrabec <jernej.skrabec@siol.net>
Fixes: 2c796fc8 ("arm64: dts: allwinner: a64: add necessary device tree nodes for DE2 CCU")
[wens@csie.org: added fixes tag]
Signed-off-by: NChen-Yu Tsai <wens@csie.org>

As it can be seen from DE2 manual, clock range is 0x10000.

Fix it.
Signed-off-by: NJernej Skrabec <jernej.skrabec@siol.net>
Fixes: 73f122c8 ("ARM: dts: sun8i: a83t: Add display pipeline")
Fixes: 05a43a26 ("ARM: dts: sun8i: r40: Add HDMI pipeline")
Fixes: 21b29920 ("ARM: sun8i: v3s: add device nodes for DE2 display pipeline")
Fixes: d8c6f1f0 ("ARM: sun8i: h3/h5: add DE2 CCU device node for H3")
[wens@csie.org: added fixes tags]
Signed-off-by: NChen-Yu Tsai <wens@csie.org>

Both, OrangePi One Plus and OrangePi Lite 2 have HDMI output. Enable it
in common DTSI.
Signed-off-by: NMarcus Cooper <codekipper@gmail.com>
[patch split and commit message]
Signed-off-by: NJernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: NChristopher Obbard <chris@64studio.com>
Tested-by: NChristopher Obbard <chris@64studio.com>
Signed-off-by: NMaxime Ripard <maxime@cerno.tech>

OrangePi One Plus has gigabit ethernet. Add nodes for it.
Signed-off-by: NMarcus Cooper <codekipper@gmail.com>
[patch split and commit message]
Signed-off-by: NJernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: NChristopher Obbard <chris@64studio.com>
Tested-by: NChristopher Obbard <chris@64studio.com>
Signed-off-by: NMaxime Ripard <maxime@cerno.tech>

It turns out that not all H6 boards have external 32kHz oscillator.
Currently the only one known such H6 board is Tanix TX6.

Move external oscillator node from common H6 dtsi to board specific dts
files where present.
Signed-off-by: NJernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: NMaxime Ripard <maxime@cerno.tech>

At the moment PinePhone comes in two slightly incompatible variants:

- 1.0: Early Developer Batch
- 1.1: Braveheart Batch

There will be at least one more incompatible variant in the very near
future, so let's start by sharing the dtsi among multiple variants,
right away, even though the HW description doesn't yet include the
different bits.

The differences between 1.0 and 1.1 are: change in pins that control
the flash LED, differences in modem power status signal routing, and
maybe some other subtler things, that have not been determined yet.

This is a basic DT that includes only features that are already
supported by mainline drivers.
Co-developed-by: NSamuel Holland <samuel@sholland.org>
Signed-off-by: NSamuel Holland <samuel@sholland.org>
Co-developed-by: NMartijn Braam <martijn@brixit.nl>
Signed-off-by: NMartijn Braam <martijn@brixit.nl>
Co-developed-by: NLuca Weiss <luca@z3ntu.xyz>
Signed-off-by: NLuca Weiss <luca@z3ntu.xyz>
Signed-off-by: NBhushan Shah <bshah@kde.org>
Signed-off-by: NIcenowy Zheng <icenowy@aosc.io>
Signed-off-by: NOndrej Jirman <megous@megous.com>
Signed-off-by: NMaxime Ripard <maxime@cerno.tech>

Document board compatible names for Pine64 PinePhone:

- 1.0 - Developer variant
- 1.1 - Braveheart variant
Signed-off-by: NOndrej Jirman <megous@megous.com>
Reviewed-by: NRob Herring <robh@kernel.org>
Signed-off-by: NMaxime Ripard <maxime@cerno.tech>

PinePhone needs I2C2 pins description. Add it, and make it default
for i2c2, since it's the only possiblilty.
Signed-off-by: NOndrej Jirman <megous@megous.com>
Signed-off-by: NMaxime Ripard <maxime@cerno.tech>

There is a second PWM unit available in the PL I/O block.
Add a node and pinmux definition for it.
Signed-off-by: NMans Rullgard <mans@mansr.com>
Signed-off-by: NMaxime Ripard <maxime@cerno.tech>

Pinebook has an ANX6345 bridge connected to the RGB666 LCD output and
eDP panel input. The bridge is controlled via I2C that's connected to
R_I2C bus.

Enable all this hardware in device tree.
Reviewed-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: NIcenowy Zheng <icenowy@aosc.io>
Signed-off-by: NVasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: NMaxime Ripard <maxime@cerno.tech>

This enables passive cooling by down-regulating CPU voltage
and frequency.

For the trip points, I used values from the BSP code directly.

The critical trip point value is 30°C above the maximum recommended
ambient temperature (70°C) for the SoC from the datasheet, so there's
some headroom even at such a high ambient temperature.
Signed-off-by: NOndrej Jirman <megous@megous.com>
Signed-off-by: NMaxime Ripard <maxime@cerno.tech>

This enables passive cooling by down-regulating CPU voltage
and frequency.

For trip points, I used a slightly lowered values from the BSP
code. The critical temperature of 110°C from BSP code seemed
like a lot, so I rounded it off to 100°C.

The critical trip point value is 30°C above the maximum recommended
ambient temperature (70°C) for the SoC from the datasheet, so there's
some headroom even at such a high ambient temperature.
Signed-off-by: NOndrej Jirman <megous@megous.com>
Signed-off-by: NMaxime Ripard <maxime@cerno.tech>

The commit 7aa9b9eb ("arm64: dts: allwinner: H6: Add PMU mode")
introduced support for the PMU found on the Allwinner H6. However, the
binding only allows for a single compatible, while the patch was adding
two.

Make sure we follow the binding.

Fixes: 7aa9b9eb ("arm64: dts: allwinner: H6: Add PMU mode")
Signed-off-by: NMaxime Ripard <maxime@cerno.tech>

The commit c35a516a ("arm64: dts: allwinner: H5: Add PMU node")
introduced support for the PMU found on the Allwinner H5. However, the
binding only allows for a single compatible, while the patch was adding
two.

Make sure we follow the binding.

Fixes: c35a516a ("arm64: dts: allwinner: H5: Add PMU node")
Signed-off-by: NMaxime Ripard <maxime@cerno.tech>

Property dr_mode = "otg" is the default in sun8i-a83t.dtsi
Signed-off-by: NOndrej Jirman <megous@megous.com>
Signed-off-by: NMaxime Ripard <maxime@cerno.tech>

Orange Pi PC2 features sy8106a regulator just like Orange Pi PC.
Signed-off-by: NOndrej Jirman <megous@megous.com>
Reviewed-by: NSamuel Holland <samuel@sholland.org>
Signed-off-by: NMaxime Ripard <maxime@cerno.tech>

What works:

- Serial console
- mmc0, mmc2 (both microSD card slots on the board)
- All buttons (gpio and lradc based)
- Power LED
- PMIC
- RTC
- USB OTG/gadgets mode
- Realtek USB WiFi
- Display backlight
- eInk display SPI NOR flash memory
Signed-off-by: NOndrej Jirman <megous@megous.com>
Signed-off-by: NMaxime Ripard <maxime@cerno.tech>

Add a new board name.
Signed-off-by: NOndrej Jirman <megous@megous.com>
Signed-off-by: NMaxime Ripard <maxime@cerno.tech>

Define pins for LVDS channels 0 and 1, configure reset line for tcon0 and
provide sample LVDS panel, connected to tcon0.
Signed-off-by: NAndrey Lebedev <andrey@lebedev.lt>
Signed-off-by: NMaxime Ripard <maxime@cerno.tech>

The display DRC nodes have an assigned clocks property, while the driver
also enforces it.

Since assigned-clocks is pretty fragile anyway, let's just remove it.
Signed-off-by: NMaxime Ripard <maxime@cerno.tech>

The display backend nodes have an assigned clocks property, while the driver
also enforces it.

Since assigned-clocks is pretty fragile anyway, let's just remove it.
Signed-off-by: NMaxime Ripard <maxime@cerno.tech>

The Pinebook does not use the CSI bus on the A64. In fact it does not
use GPIO port E for anything at all. Thus the following regulators are
not used and do not need voltages set:

 - ALDO1: Connected to VCC-PE only
 - DLDO3: Not connected
 - ELDO3: Not connected
Signed-off-by: NSamuel Holland <samuel@sholland.org>
Signed-off-by: NMaxime Ripard <maxime@cerno.tech>

The Testbox board is an open hardware enhancement for the Lamobo R1 router
board.  The Testbox board is used in the CI-RT project to manage devices
under test (https://ci-rt.linutronix.de).

The hardware project is located at https://github.com/ci-rt/testbox-shield

The Testbox v2 expands the Lamobo R1 router board with
- a power supply,
- a CAN bus PHY,
- a power control,
- a relay,
- an I2C EEPROM,
- a secure key storage (ATECC608a) and
- two RS232 compliant serial ports.
Co-developed-by: NBenedikt Spranger <b.spranger@linutronix.de>
Signed-off-by: NBenedikt Spranger <b.spranger@linutronix.de>
Signed-off-by: NBastian Germann <bage@linutronix.de>
[Maxime: Removed unused pinctrl node]
Signed-off-by: NMaxime Ripard <maxime@cerno.tech>

Add device tree bindings for the newly added Linutronix Testbox board.
Signed-off-by: NBastian Germann <bage@linutronix.de>
Signed-off-by: NMaxime Ripard <maxime@cerno.tech>

OrangePi 3 can optionally have 8 GiB eMMC (soldered on board). Because
those pins are dedicated to eMMC exclusively, node can be added for both
variants (with and without eMMC). Kernel will then scan bus for presence
of eMMC and act accordingly.
Signed-off-by: NJernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: NMaxime Ripard <maxime@cerno.tech>

A64 contains deinterlace core, compatible to the one found in H3.
It can be used in combination with VPU unit to decode and process
interlaced videos.

Add a node for it.
Signed-off-by: NJernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: NMaxime Ripard <maxime@cerno.tech>

Allwinner A64 SoC also contains deinterlace core, compatible to H3.

Add compatible string for it.
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NJernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: NMaxime Ripard <maxime@cerno.tech>

A64 contains MBUS, which is the bus used by DMA devices to access
system memory.

MBUS controller is responsible for arbitration between channels based
on set priority and can do some other things as well, like report
bandwidth used. It also maps RAM region to different address than CPU.
Signed-off-by: NJernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: NMaxime Ripard <maxime@cerno.tech>

A64 contains MBUS controller. Add a compatible for it.
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NJernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: NMaxime Ripard <maxime@cerno.tech>

There are two sensors, sensor0 for CPU, sensor1 for GPU.
Signed-off-by: NYangtao Li <tiny.windzz@gmail.com>
Tested-by: NCorentin Labbe <clabbe.montjoie@gmail.com>
Signed-off-by: NMaxime Ripard <maxime@cerno.tech>

Add the regulators for each bank on this boards.
For VCC-PL only add a comment on what regulator is used. We cannot add
the property without causing a circular dependency as the PL pins are
used to talk to the PMIC.
Signed-off-by: NEmmanuel Vadot <manu@freebsd.org>
Signed-off-by: NMaxime Ripard <maxime@cerno.tech>

Now that AXP803 GPIO support is available, we can properly model
the hardware. Replace the use of GPIO0-LDO with a fixed regulator
controlled by GPIO0. This boost regulator is used to power the
(internal and external) USB ports, as well as the speakers.
Signed-off-by: NSamuel Holland <samuel@sholland.org>
Signed-off-by: NMaxime Ripard <maxime@cerno.tech>

The output from the backlight regulator is labeled as "VBKLT" in the
schematic. Using the equation and resistor values from the schematic,
the output is approximately 18V, not 3.3V. Since the regulator in use
(SS6640STR) is a boost regulator powered by PS (battery or AC input),
which are both >3.3V, the output could not be 3.3V anyway.
Signed-off-by: NSamuel Holland <samuel@sholland.org>
Signed-off-by: NMaxime Ripard <maxime@cerno.tech>

Allwinner A64 SoC has separate supplies for PC, PD, PE, PG and PL.

VCC-PC and VCC-PG are supplied by ELDO1 at 1.8v.
VCC-PD is supplied by DCDC1 (VCC-IO) at 3.3v.
VCC-PE is supplied by ALDO1, and is unused.

VCC-PL creates a circular dependency, so it is omitted for now.
Signed-off-by: NSamuel Holland <samuel@sholland.org>
Signed-off-by: NMaxime Ripard <maxime@cerno.tech>

Normally GPIO pin references are followed by a comment giving the pin
name for searchability. Add the comment here where it was missing.
Signed-off-by: NSamuel Holland <samuel@sholland.org>
Signed-off-by: NMaxime Ripard <maxime@cerno.tech>

Boards generally reference the simplefb nodes from the SoC dtsi by
label, not by full path. simplefb_hdmi is already like this in the
Pinebook DTS. Update simplefb_lcd to match.
Signed-off-by: NSamuel Holland <samuel@sholland.org>
Signed-off-by: NMaxime Ripard <maxime@cerno.tech>

The r_i2c node should come before r_rsb, and in any case should not
separate the axp803 node from its subnodes.
Signed-off-by: NSamuel Holland <samuel@sholland.org>
Signed-off-by: NMaxime Ripard <maxime@cerno.tech>

This fixed regulator has no consumers, GPIOs, or other connections.
Remove it.
Signed-off-by: NSamuel Holland <samuel@sholland.org>
Signed-off-by: NMaxime Ripard <maxime@cerno.tech>

The Orange Pi PC2 features a GPIO button. As the button is connected to
Port L (pin PL3), it can be used as a wakeup source. Enable this.
Signed-off-by: NSamuel Holland <samuel@sholland.org>
Signed-off-by: NMaxime Ripard <maxime@cerno.tech>

PineTab is a 10.1" tablet by Pine64 with Allwinner A64 inside.

It includes the following peripherals:

USB:
- A microUSB Type-B port connected to the OTG-capable USB PHY of
Allwinner A64. The ID pin is connected to a GPIO of the A64 SoC, and the
Vbus is connected to the Vbus of AXP803 PMIC. These enables OTG
functionality on this port.
- A USB Type-A port is connected to the internal hub attached to the
non-OTG USB PHY of Allwinner A64.
- There are reserved pins for an external keyboard connected to the
internal hub.

Power:
- The microUSB port has its Vbus connected to AXP803, mentioned above.
- A DC jack (of a strange size, 2.5mm outer diameter) is connected to
the ACIN of AXP803.
- A Li-Polymer battery is connected to the battery pins of AXP803.

Storage:
- An tradition Pine64 eMMC slot is on the board, mounted with an eMMC
module by factory.
- An external microSD slot is hidden under a protect case.

Display:
- A MIPI-DSI LCD panel (800x1280) is connected to the DSI port of A64 SoC.
- A mini HDMI port.

Input:
- A touch panel attached to a Goodix GT9271 touch controller.
- Volume keys connected to the LRADC of the A64 SoC.

Camera:
- An OV5640 CMOS camera is at rear, connected to the CSI bus of A64 SoC.
- A GC2145 CMOS camera is at front, shares the same CSI bus with OV5640.

Audio:
- A headphone jack is conencted to the SoC's internal codec.
- A speaker connected is to the Line Out port of SoC's internal codec, via
an amplifier.

Misc:
- Debug UART is muxed with the headphone jack, with the switch next to
the microSD slot.
- A bosch BMA223 accelerometer is connected to the I2C bus of A64 SoC.
- Wi-Fi and Bluetooth are available via a RTL8723CS chip, similar to the
one in Pinebook.

This commit adds a basically usable device tree for it, implementing
most of the features mentioned above. HDMI is not supported now because
bad LCD-HDMI coexistence situation of mainline A64 display driver, the
front camera currently lacks a driver and a facility to share the bus
with the rear one, and the accelerometer currently lacks a DT binding.
Signed-off-by: NIcenowy Zheng <icenowy@aosc.io>
Signed-off-by: NMaxime Ripard <maxime@cerno.tech>