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  1. 17 3月, 2023 12 次提交
  3. 16 3月, 2023 3 次提交
  5. 15 3月, 2023 18 次提交
  7. 14 3月, 2023 7 次提交
    • H
      fix compile error introduced by LoongArch commit · bbb3a0dc
      由 Hongchen Zhang 提交于 
      LoongArch inclusion
category: bugfix
bugzilla: https://gitee.com/openeuler/kernel/issues/I6MV9N

--------------------------------

when compile kernel using the following steps:

make allmodconfig ARCH=x86_64 CROSS_COMPILE=x86_64-linux-gnu-
make oldconfig ARCH=x86_64 CROSS_COMPILE=x86_64-linux-gnu-
make -j64 ARCH=x86_64 CROSS_COMPILE=x86_64-linux-gnu-

we get error:

  DESCEND  objtool
  HOSTCC  scripts/sorttable
In file included from scripts/sorttable.c:195:
scripts/sorttable.h:89:10: fatal error: asm/orc_types.h: No such file or directory
   89 | #include <asm/orc_types.h>
      |          ^~~~~~~~~~~~~~~~~
compilation terminated.
make[1]: *** [scripts/Makefile.host:95: scripts/sorttable] Error 1
make: *** [Makefile:1215: scripts] Error 2
make: *** Waiting for unfinished jobs....

the reason is ARCH a command-line variable,the normal assignment is
ignored.So split loongarch architecture from others.

Fixes: 4efd0de6 ("tools/perf: Add basic support for LoongArch")
Signed-off-by: NHongchen Zhang <zhanghongchen@loongson.cn>
Signed-off-by: NZheng Zengkai <zhengzengkai@huawei.com>
Signed-off-by: NJialin Zhang <zhangjialin11@huawei.com>
      bbb3a0dc
    • T
      LoongArch: pci root bridige set acpi companion only when not acpi_disabled. · a62d9cc0
      由 Tianli Xiong 提交于 
      LoongArch inclusion
category: feature
bugzilla: https://gitee.com/openeuler/kernel/issues/I6BWFP

--------------------------------

Fix patch "LoongArch: Add PCI controller support"
Signed-off-by: NTianli Xiong <xiongtianli@loongson.cn>
Change-Id: If6084f05cc42ac33b44a7b6aeabdd1366a0bccdd
      a62d9cc0
    • S
      pci: fix X server auto probe fail when both ast and etnaviv drm present · c7491321
      由 suijingfeng 提交于 
      LoongArch inclusion
category: feature
bugzilla: https://gitee.com/openeuler/kernel/issues/I6BWFP

--------------------------------

According to PCI-to-PCI bridge spec, bit 3 of Bridge Control Register
is VGA Enable bit which modifies the response by the bridge to VGA
compatible addresses.

The Bridge Control register provides extensions to the Command register
that are specific to a bridge. The Bridge Control register provides
many of the same controls for the secondary interface that are provided
by the Command register for the primary interface. There are some bits
that affect the operation of both interfaces of the bridge.

If the VGA Enable bit is set, the bridge will positively decode
and forward the following accesses on the primary interface to
the secondary interface (and, conversely, block the forwarding
of these addresses from the secondary to primary interface)

Forwarding of these accesses is qualified by the I/O Enable and
Memory Enable bits in the Command register.) The default state of
this bit after reset must be 0.

Bit 3 of Bridge Control Register is VGA Enable bit which modifies the
response by the bridge to VGA compatible addresses.

 when 0: do not forward VGA compatible memory and I/O addresses from
         the primary to secondary interface (addresses defined below)
         unless they are enabled for forwarding by the defined I/O
 when 1: forward VGA compatible memory and I/O addresses (addresses
         defined below) from the primary interface to the secondary
		 interface (if the I/O Enable and Memory Enable bits are set)
         independent of the I/O and memory address ranges and
         independent of the ISA Enable bit

 * memory accesses in the range 000A 0000h to 000B FFFFh

 * I/O addresses in the first 64 KB of the I/O address space
   (AD[31:16] are 0000h) where AD[9:: 0] are in the ranges
   3B0h to 3BBh and 3C0h to 3DFh (inclusive of ISA address
   aliases - AD[15::10] are not decoded)

If the VGA Enable bit is set, forwarding of these accesses is
independent of the I/O address range and memory address ranges
defined by the I/O Base and Limit registers, the Memory Base
and Limit registers, and the Prefetchable Memory Base and Limit
registers of the bridge.

Forwarding of these accesses is also independent of the settings
of the ISA Enable bit (in the Bridge Control register) or VGA
Palette Snoop bits (in the Command register).

The AST2500 hardward we are using do not set the VGA Enable bit on
its bridge control reg, this cause vgaarb subsystem don't think the
VGA card behind this pridge as a valid boot vga device which made
X server choose wrong video card to use when multiple video card
present in the system.

Its seems more vgaarb's fault than the ast2500 bmc itself.
even through bit 3 of Bridge Control Register is 0, it should still
allow to forward the accesses when the addresses is in the range of
IO/MEM Base and Limit registers.

Nevertheless, in order to support loongson CPU product line, we
provide a workaround to this bug for the Sugon L620-G30 and Sugon
L820-G30 server.

see similar bug:

https://patchwork.kernel.org/project/linux-pci/patch/20170619023528.11532-1-dja@axtens.net/Signed-off-by: Nsuijingfeng <suijingfeng@loongson.cn>
Change-Id: I53b6dee11c17b06866bdd927ac82cd6db88e16aa
      c7491321
    • B
      LS7A2000: PCIE: Fixup GPU card error · a1c119e3
      由 Baoqi Zhang 提交于 
      LoongArch inclusion
category: feature
bugzilla: https://gitee.com/openeuler/kernel/issues/I6BWFP

--------------------------------

Add window to solve GPU access error
Signed-off-by: NBaoqi Zhang <zhangbaoqi@loongson.cn>
Change-Id: Idb607fa22e68e06fc4448af57247bd4e51616a7d
      a1c119e3
    • J
      pci/quirks: ls7a2000: fix pm transition of devices under pcie port · d6ac51fc
      由 Jianmin Lv 提交于 
      LoongArch inclusion
category: feature
bugzilla: https://gitee.com/openeuler/kernel/issues/I6BWFP

--------------------------------
Signed-off-by: NJianmin Lv <lvjianmin@loongson.cn>
Change-Id: Ie2c78cc46aa7bde00395906f7e6ab6a09e09a190
      d6ac51fc
    • T
      LoongArch: Fixed some pcie card not scanning properly · ef7e64c8
      由 Tianli Xiong 提交于 
      LoongArch inclusion
category: feature
bugzilla: https://gitee.com/openeuler/kernel/issues/I6BWFP

--------------------------------

Fix some pcie card not scanning properly when
bus number is inconsistent during firmware and
kernel scan phases.
Signed-off-by: Nliuyun <liuyun@loongson.cn>
Signed-off-by: NTianli Xiong <xiongtianli@loongson.cn>
Change-Id: Iac9c07463569ca08da93ab0fa279b1880206e816
      ef7e64c8
    • H
      pci: fix kabi error caused by pm_suspend_target_state · 60c8da76
      由 Hongchen Zhang 提交于 
      LoongArch inclusion
category: feature
bugzilla: https://gitee.com/openeuler/kernel/issues/I6BWFP

--------------------------------

fix kabi error caused by pm_suspend_target_state,used only
by loongson devices.
Signed-off-by: NHongchen Zhang <zhanghongchen@loongson.cn>
      60c8da76