This patch adds code instantiating the EPLL, which is used as the
audio subsystem's root clock.
The requirement to specify the external root clock in clocks property
is documented.  Having the consumer 'clocks' property ensures proper
initialization order by explicitly specifying dependencies in DT.
It prevents situations when the SoC's clock controller driver has
initialized, the external oscillator clock is not yet registered
and setting clock frequencies through assigned-clock-rates property
doesn't work properly due to unknown external oscillator frequency.
Signed-off-by: NSylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: NChanwoo Choi <cw00.choi@samsung.com>

There is no need to log probe() completion in normal conditions
so the "setup completed" log is removed.
Signed-off-by: NSylwester Nawrocki <s.nawrocki@samsung.com>

Exynos5410 Audio Subsystem Clock Controller, comparing to the already
supported IP block revisions, has additionally an I2S_MST divider
so a new compatible string is added.
It is not clear from the Exynos5410 User's Manual released on 2012.03.09
where in the clock tree the I2S_MST clock divider can be found exactly
so this clock is left unimplemented for now.
Signed-off-by: NSylwester Nawrocki <s.nawrocki@samsung.com>

Then variant handling is reworked to make the code simpler when
more variants are added.
Signed-off-by: NSylwester Nawrocki <s.nawrocki@samsung.com>

There is no such significant differences in pll2550x PLL type
to justify a separate registration function.  This patch adapts
exynos5440 driver to use the common function and removes
samsung_clk_register_pll2550x().
Signed-off-by: NSylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: NChanwoo Choi <cw00.choi@samsung.com>

These clocks are needed in order to use the PL330 peripheral
DMA controllers.
Signed-off-by: NSylwester Nawrocki <s.nawrocki@samsung.com>

This patch adds the mux/divider clocks for CMU_CDREX (DRAM Express
Controller) which generates the clocks for DRAM and NoC (Network on Chip)
bus.  There is differnet source of MUX_MX_MSPLL_CCORE between exynos5420
and exynos5422, so each MUX_MX_MSPLL_CCORE uses the different parent source
group.
Signed-off-by: NChanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: NSylwester Nawrocki <s.nawrocki@samsung.com>

This patch uses the samsung_cmu_register_one() to simplify code
and move the pll/mux/div/gate data to initconst section.
Signed-off-by: NChanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: NSylwester Nawrocki <s.nawrocki@samsung.com>

This patch moves the samsung_cmu_info struct instances to initconst
section, this decreases the kernel image size by 784 bytes, which makes
zImage smaller by 480 bytes.

The patch increases .init.rodata section size by 780 bytes but decreases
.init.text section size by 1564 bytes.

Size of the drivers/clk/samsung/clk-exynos5260.o object file is 29100
bytes without the patch and 28316 after applying the patch.

The section size differences are as below:
15c15
<   3 .init.text    000006b8  00000000  00000000  00000034  2**2
---
>   3 .init.text    0000009c  00000000  00000000  00000034  2**2
25c25
<   8 .init.rodata  00003f6c  00000000  00000000  00002f20  2**2
---
>   8 .init.rodata  00004278  00000000  00000000  00002904  2**2
Signed-off-by: NChanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: NSylwester Nawrocki <s.nawrocki@samsung.com>

Any clock dependencies can be properly handled with deferred probing
so we can remove core_initcall and switch to a proper loadable platform
driver module.
This change has been tested on Exynos4412 Odroid U3 based board.
Signed-off-by: NSylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: NMichael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/1467987300-31450-1-git-send-email-s.nawrocki@samsung.com

The Kconfig currently controlling compilation of this code is:

arch/arm/mach-s5pv210/Kconfig:config ARCH_S5PV210
arch/arm/mach-s5pv210/Kconfig:  bool "Samsung S5PV210/S5PC110" if ARCH_MULTI_V7

...meaning that it currently is not being built as a module by anyone.

Lets remove the modular code that is essentially orphaned, so that
when reading the driver there is no doubt it is builtin-only.

We explicitly disallow a driver unbind, since that doesn't have a
sensible use case anyway, and it allows us to drop the ".remove"
code for non-modular drivers.

Since this code is already not using module_init, case, the init
ordering remains unchanged with this commit.

We also delete the MODULE_LICENSE tags etc. since all that information
is already contained at the top of the file in the comments.

Cc: Tomasz Figa <tomasz.figa@gmail.com>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: linux-samsung-soc@vger.kernel.org
Cc: linux-clk@vger.kernel.org
Signed-off-by: NPaul Gortmaker <paul.gortmaker@windriver.com>
Acked-by: NSylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: NMichael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/20160704211220.5685-8-paul.gortmaker@windriver.com

Because the Exynos5433 SPI driver supports the ioclk handling and
the following patch:

  http://marc.info/?l=linux-kernel&m=146787645626318&w=2

fixes a synchronus abort issue, none of the SPI clocks require
any critical handling: remove, then, the CLK_IGNORE_UNUSED flag
for the SPI related clocks.
Signed-off-by: NAndi Shyti <andi.shyti@samsung.com>
Reviewed-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com>
Acked-by: NSylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: NMichael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/1468317736-18841-8-git-send-email-andi.shyti@samsung.com

This patch adds the CLK_IGNORE_UNUSED flag for PCI Express's clocks
which need to remain enabled. The 'pcie' gate clock definition is
also added.
Signed-off-by: NJaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: NChanwoo Choi <cw00.choi@samsung.com>
[s.nawrocki@samsung.com: edited the patch's summary]
Signed-off-by: NSylwester Nawrocki <s.nawrocki@samsung.com>

Some clocks are required to be unmasked during suspend to RAM. Otherwise
the PMU will stuck and the power down sequence will never be completed.
Signed-off-by: NJonghwa Lee <jonghwa3.lee@samsung.com>
Signed-off-by: NChanwoo Choi <cw00.choi@samsung.com>
[s.nawrocki@samsung.com: edited the patch's summary]
Signed-off-by: NSylwester Nawrocki <s.nawrocki@samsung.com>

This patch adds CLK_IGNORE_UNUSED flag for sclk_aud_uart gate
clock for uart3 operation.
Signed-off-by: NBeomho Seo <beomho.seo@samsung.com>
Signed-off-by: NChanwoo Choi <cw00.choi@samsung.com>
[s.nawrocki@samsung.com: edited the patch's summary]
Signed-off-by: NSylwester Nawrocki <s.nawrocki@samsung.com>

Use the byte-order aware big endian accessors, allowing for kernels
running under big-endian.
Signed-off-by: NMatthew Leach <matthew@mattleach.net>
Signed-off-by: NSylwester Nawrocki <s.nawrocki@samsung.com>

Fix the clk endian access code to deal with kernels built for big endian
operation.
Signed-off-by: NMatthew Leach <matthew@mattleach.net>
Signed-off-by: NSylwester Nawrocki <s.nawrocki@samsung.com>

Add clock hierarchy for Security SubSystem clock and watchdog.
Signed-off-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: NJavier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: NSylwester Nawrocki <s.nawrocki@samsung.com>

Add the CPU clocks configuration data and instantiate the CPU clocks
type for Exynos5433.

Cc: Kukjin Kim <kgene@kernel.org>
CC: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: NBartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Signed-off-by: NSylwester Nawrocki <s.nawrocki@samsung.com>

Exynos5433 uses different register layout for CPU clock registers
than earlier SoCs so add new code for handling this layout.  Also
add new CLK_CPU_HAS_E5433_REGS_LAYOUT flag to request using it.

There should be no functional change resulting from this patch.

Cc: Kukjin Kim <kgene@kernel.org>
CC: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: NBartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Signed-off-by: NSylwester Nawrocki <s.nawrocki@samsung.com>

Open-code samsung_cmu_register_one() calls for CMU_APOLLO and
CMU_ATLAS setup code as a preparation for adding CPU clocks
support for Exynos5433.

There should be no functional change resulting from this patch.

Cc: Kukjin Kim <kgene@kernel.org>
CC: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: NBartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Signed-off-by: NSylwester Nawrocki <s.nawrocki@samsung.com>

Although unbinding a driver requires root privileges but it still might
be used theoretically in certain attacks (by triggering NULL pointer
exception or memory corruption if driver does not provide proper remove
callbacks or core does not handle it).

Samsung clock drivers are essential for system operation so their
removal is not expected. More over, the Exynos3250 ISP clock driver does
not implement remove() driver callback and it is not buildable as
modules.

Suppress the unbind interface for Exynos3250 ISP and S3C2410 DCLK clock
drivers.
Suggested-by: NMarek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: NSylwester Nawrocki <s.nawrocki@samsung.com>

The aclk333 clock needs to be ungated during the MFC power domain switch,
so set the clock ID to allow the Exynos power domain logic to lookup this
clock if is defined in the MFC PD device tree node.
Signed-off-by: NJavier Martinez Canillas <javier@osg.samsung.com>
Reviewed-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com>
Tested-by: NMarek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: NSylwester Nawrocki <s.nawrocki@samsung.com>

Add clock for TMU to the Exynos5410 clock driver.
Signed-off-by: NKrzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: NJavier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: NSylwester Nawrocki <s.nawrocki@samsung.com>

Add clocks for I2C, USI (HSI2C) and RTC to the Exynos5410 clock driver.
Signed-off-by: NKrzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: NJavier Martinez Canillas <javier@osg.samsung.com>
Acked-by: NStephen Boyd <sboyd@codeaurora.org>
Signed-off-by: NSylwester Nawrocki <s.nawrocki@samsung.com>

Just like other Exynos5 family SoCs, this one has four UARTs. Add
missing UART3 clocks to the Exynos5410 clock driver.

Add clocks for USB and PWM.
Signed-off-by: NKrzysztof Kozlowski <krzk@kernel.org>
Acked-by: NStephen Boyd <sboyd@codeaurora.org>
Reviewed-by: NJavier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: NSylwester Nawrocki <s.nawrocki@samsung.com>

The arrays with initialization data of PLLs can be moved to initconst
section because they are referenced only from other initconst-level
symbols.
Signed-off-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: NSylwester Nawrocki <s.nawrocki@samsung.com>

The PNAME macro defines array of strings for names of mux parents.
Although the strings itself were const but pointers to them were not thus
this data resided in initdata. Make this an array of const pointers to
const strings and move to initconst section.
Signed-off-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: NSylwester Nawrocki <s.nawrocki@samsung.com>

The exynos5250_clk_sleep_init() function can be moved to init section
because it is referenced only from other init-level calls.
Signed-off-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: NSylwester Nawrocki <s.nawrocki@samsung.com>

The exynos5420_clk_sleep_init() function and arrays with initialization
data of PLLs can be moved to init section because they are referenced
only from other init-level symbols.
Signed-off-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: NSylwester Nawrocki <s.nawrocki@samsung.com>

The arrays with initialization data of PLLs can be moved to initconst
section because they are referenced only from other initconst-level
symbols.
Signed-off-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: NSylwester Nawrocki <s.nawrocki@samsung.com>

All of initialization data can be made const.
Signed-off-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: NSylwester Nawrocki <s.nawrocki@samsung.com>

All of initialization data can be made const.
Signed-off-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: NSylwester Nawrocki <s.nawrocki@samsung.com>

All of initialization data can be made const.
Signed-off-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: NSylwester Nawrocki <s.nawrocki@samsung.com>

All of initialization data can be made const.
Signed-off-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: NSylwester Nawrocki <s.nawrocki@samsung.com>

All of initialization data can be made const.
Signed-off-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: NSylwester Nawrocki <s.nawrocki@samsung.com>

All of initialization data can be made const.
Signed-off-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: NSylwester Nawrocki <s.nawrocki@samsung.com>

All of initialization data can be made const.
Signed-off-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: NSylwester Nawrocki <s.nawrocki@samsung.com>

The arrays with initialization data of PLLs can be moved to initconst
section because they are referenced only from other initconst-level
symbols.
Signed-off-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: NSylwester Nawrocki <s.nawrocki@samsung.com>

All of initialization data can be made const.
Signed-off-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: NSylwester Nawrocki <s.nawrocki@samsung.com>