- 20 2月, 2018 32 次提交
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由 Roman Li 提交于
With FBC enabled there was a potential null-deref on topology change due to hardcorded pipe index. Signed-off-by: NRoman Li <Roman.Li@amd.com> Reviewed-by: NHarry Wentland <Harry.Wentland@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Yongqiang Sun 提交于
Signed-off-by: NYongqiang Sun <yongqiang.sun@amd.com> Reviewed-by: NTony Cheng <Tony.Cheng@amd.com> Acked-by: NHarry Wentland <harry.wentland@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Jerry (Fangzhi) Zuo 提交于
When topology changed and rehook up MST display to the same DP connector, need to take care of drm_dp_mst_port object. Due to the topology is changed, drm_dp_mst_port and corresponding i2c_algorithm object could be NULL in such situation. Signed-off-by: NJerry (Fangzhi) Zuo <Jerry.Zuo@amd.com> Reviewed-by: NRoman Li <Roman.Li@amd.com> Acked-by: NHarry Wentland <harry.wentland@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Roman Li 提交于
After reworking FBC init for dynamic mem alloc old FBC init code in DC became redundant. Removing it. Signed-off-by: NRoman Li <Roman.Li@amd.com> Reviewed-by: NTony Cheng <Tony.Cheng@amd.com> Acked-by: NHarry Wentland <harry.wentland@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Roman Li 提交于
- FBC init reworked to alloc memory based on display mode. - Removed asic-dependencies from dm Signed-off-by: NRoman Li <Roman.Li@amd.com> Reviewed-by: NTony Cheng <Tony.Cheng@amd.com> Acked-by: NHarry Wentland <harry.wentland@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Ken Chalmers 提交于
This allows Maximus emulation to more closely mirror actual silicon execution. * Enable pool->base.display_clock creation on Maximus. * Enable rest of dce110_apply_ctx_to_hw on Maximus. * Remove apply_ctx_to_hw_fpga (no longer necessary with the full dce110_apply_ctx_to_hw enabled). * Disable the dmcu->funcs->set_psr_wait_loop call in dce112_set_clock for Maximus (this was the only fix-up necessary after enabling dce110_apply_ctx_to_hw; everything else works unmodified on Maximus). Signed-off-by: NKen Chalmers <ken.chalmers@amd.com> Reviewed-by: NTony Cheng <Tony.Cheng@amd.com> Acked-by: NHarry Wentland <harry.wentland@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Ken Chalmers 提交于
Maximus testing now defaults to a 700 MHz emulated dispclk Signed-off-by: NKen Chalmers <ken.chalmers@amd.com> Reviewed-by: NTony Cheng <Tony.Cheng@amd.com> Acked-by: NHarry Wentland <harry.wentland@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Charlene Liu 提交于
Signed-off-by: NCharlene Liu <charlene.liu@amd.com> Reviewed-by: NTony Cheng <Tony.Cheng@amd.com> Acked-by: NHarry Wentland <harry.wentland@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Fengguang Wu 提交于
drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c:281:2-3: Unneeded semicolon Remove unneeded semicolon. Generated by: scripts/coccinelle/misc/semicolon.cocci Fixes: 620f774f ("drm/amdgpu: separate VMID and PASID handling") CC: Christian König <christian.koenig@amd.com> Signed-off-by: NFengguang Wu <fengguang.wu@intel.com> Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Rex Zhu 提交于
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NRex Zhu <Rex.Zhu@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Rex Zhu 提交于
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NRex Zhu <Rex.Zhu@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
We only need to flush the HDP here, not invalidate the TLB. Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
Separate tlb invalidation and hdp flushing and move the HDP flush to the caller. Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
Needed to flush and invalidate the HDP block using the CPU. v2: use preferred register on soc15. Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: Samuel Li <Samuel.Li@amd.com> (v1)
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由 Alex Deucher 提交于
Needed to flush and invalidate the HDP block using the CPU. Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NSamuel Li <Samuel.Li@amd.com>
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由 Alex Deucher 提交于
Needed to flush and invalidate the HDP block using the CPU. Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NSamuel Li <Samuel.Li@amd.com>
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由 Alex Deucher 提交于
Needed to flush and invalidate the HDP block using the CPU. Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NSamuel Li <Samuel.Li@amd.com>
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由 Alex Deucher 提交于
Needed to properly flush the HDP cache with the CPU from rather than the GPU. Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NSamuel Li <Samuel.Li@amd.com>
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由 Andres Rodriguez 提交于
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAndres Rodriguez <andresx7@gmail.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Andres Rodriguez 提交于
We follow the same approach as gfx8. The only changes are register access macros. Tested on vega10. The execution latency results fall within the expected ranges from the polaris10 data. Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAndres Rodriguez <andresx7@gmail.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Evan Quan 提交于
Signed-off-by: NEvan Quan <evan.quan@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Evan Quan 提交于
V2: reuse the SMUThermal structure defined in pp_thermal.h Signed-off-by: NEvan Quan <evan.quan@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Evan Quan 提交于
V2: move the SMU7Thermal structure to newly created header file Signed-off-by: NEvan Quan <evan.quan@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Evan Quan 提交于
V2: new header file to hold the common SMU7Thermal structure Signed-off-by: NEvan Quan <evan.quan@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
Populate the hwmon temp range as part of thermal controller setup. Signed-off-by: NEvan Quan <evan.quan@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Evan Quan 提交于
Added a new callback for asic specific backends to specify the temperature ranges. Signed-off-by: NEvan Quan <evan.quan@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Evan Quan 提交于
This will be used by powerplay to update the dpm temp range structure used to interface with hwmon. Signed-off-by: NEvan Quan <evan.quan@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Evan Quan 提交于
drm/amd/powerplay: correct PP_TemperatureRange member type since negative values are part of the valid range Signed-off-by: NEvan Quan <evan.quan@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Evan Quan 提交于
other parameter Signed-off-by: NEvan Quan <evan.quan@amd.com> Acked-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Evan Quan 提交于
Unused. v2: squash in warning fix (Harry) Signed-off-by: NEvan Quan <evan.quan@amd.com> Acked-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Dmitry Rozhkov 提交于
printk format strings accepting a single subsequent argument are shorter thus easier to read. Instead of having format strings accepting 3 different arguments pointing to first 3 bytes of the same buffer rewrite the format string to accept only one argument - the buffer - with "%3ph" specifier. Signed-off-by: NDmitry Rozhkov <dmitry.rozhkov@linux.intel.com> Suggested-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Julia Lawall 提交于
PP_ASSERT_WITH_CODE prints a newline at the end of the message string, so the message string does not need to include a newline explicitly. Done using Coccinelle. Signed-off-by: NJulia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 14 2月, 2018 3 次提交
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由 Chunming Zhou 提交于
swiotlb expands our card accessing range, but its path always is slower than ttm pool allocation. So add condition to use it. v2: move a bit later Signed-off-by: NChunming Zhou <david1.zhou@amd.com> Reviewed-by: NMonk Liu <monk.liu@amd.com> Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180209024410.1469-3-david1.zhou@amd.com
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由 Chunming Zhou 提交于
get the max io mapping address of system memory to see if it is over our card accessing range. v2: move checking later Signed-off-by: NChunming Zhou <david1.zhou@amd.com> Reviewed-by: NMonk Liu <monk.liu@amd.com> Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180209024410.1469-2-david1.zhou@amd.com
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由 Chunming Zhou 提交于
it will be used to check if the driver needs swiotlb v2: Don't use inline, instead, move function to drm_memory.c (Michel Daenzer <michel@daenzer.net>) Signed-off-by: NChunming Zhou <david1.zhou@amd.com> Reviewed-by: NMonk Liu <monk.liu@amd.com> Reviewed-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NMichel Dänzer <michel.daenzer@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180209024410.1469-1-david1.zhou@amd.com
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- 12 2月, 2018 1 次提交
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由 Linus Torvalds 提交于
This is the mindless scripted replacement of kernel use of POLL* variables as described by Al, done by this script: for V in IN OUT PRI ERR RDNORM RDBAND WRNORM WRBAND HUP RDHUP NVAL MSG; do L=`git grep -l -w POLL$V | grep -v '^t' | grep -v /um/ | grep -v '^sa' | grep -v '/poll.h$'|grep -v '^D'` for f in $L; do sed -i "-es/^\([^\"]*\)\(\<POLL$V\>\)/\\1E\\2/" $f; done done with de-mangling cleanups yet to come. NOTE! On almost all architectures, the EPOLL* constants have the same values as the POLL* constants do. But they keyword here is "almost". For various bad reasons they aren't the same, and epoll() doesn't actually work quite correctly in some cases due to this on Sparc et al. The next patch from Al will sort out the final differences, and we should be all done. Scripted-by: NAl Viro <viro@zeniv.linux.org.uk> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 11 2月, 2018 2 次提交
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由 Boris Brezillon 提交于
The V3D engine has various hardware counters which might be interesting to userspace performance analysis tools. Expose new ioctls to create/destroy a performance monitor object and query the counter values of this perfmance monitor. Note that a perfomance monitor is given an ID that is only valid on the file descriptor it has been allocated from. A performance monitor can be attached to a CL submission and the driver will enable HW counters for this request and update the performance monitor values at the end of the job. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Reviewed-by: NEric Anholt <eric@anholt.net> Signed-off-by: NEric Anholt <eric@anholt.net> Link: https://patchwork.freedesktop.org/patch/msgid/20180112090926.12538-1-boris.brezillon@free-electrons.com
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由 Eric Anholt 提交于
When we debug print what ioctl we're calling into, we include the pid. If you have multiple processes rendering simulataneously, the error return also needs the pid so you can see which of the ioctl calls was the one to fail. Signed-off-by: NEric Anholt <eric@anholt.net> Link: https://patchwork.freedesktop.org/patch/msgid/20180130215643.11016-1-eric@anholt.netReviewed-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
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- 08 2月, 2018 2 次提交
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由 Philippe CORNU 提交于
Hw older versions support non-alpha color formats derived from native alpha color formats only on the primary layer. For instance, RG16 native format without alpha works fine on 2nd layer but XR24 (derived color format from AR24) does not work on 2nd layer. Signed-off-by: NPhilippe Cornu <philippe.cornu@st.com> Reviewed-by: NYannick Fertré <yannick.fertre@st.com> Signed-off-by: NBenjamin Gaignard <benjamin.gaignard@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20180201104243.20726-3-philippe.cornu@st.com
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由 Philippe CORNU 提交于
ltdc supports natively some color formats with alpha (like ARGB8888, ARGB1555, ARGB4444...). Related non-alpha formats are supported too (ARGB8888->XRGB8888, ARGB4444->XRGB4444...) by adjusting ltdc blending factors. Note: Wayland/Weston requests by default the non-alpha XRGB8888 color format. Signed-off-by: NPhilippe Cornu <philippe.cornu@st.com> Reviewed-by: NYannick Fertré <yannick.fertre@st.com> Signed-off-by: NBenjamin Gaignard <benjamin.gaignard@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20180201104243.20726-2-philippe.cornu@st.com
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