The simple-framebuffer nodes have a unit address, but no reg property which
generates a warning when compiling it with DTC.

Change the simple-framebuffer node names so that there is no warnings on
this anymore.
Signed-off-by: NMaxime Ripard <maxime.ripard@bootlin.com>
Acked-by: NChen-Yu Tsai <wens@csie.org>

The #address-cells and #size-cells are only relevant for nodes that have
childs with reg properties. Otherwise, DTC will emit a warning saying that
those properties are unnecessary.

Remove them when needed.
Signed-off-by: NMaxime Ripard <maxime.ripard@bootlin.com>
Acked-by: NChen-Yu Tsai <wens@csie.org>

Our main node for all the in-SoC controllers used to have a unit name. The
unit-name, in addition to being actually false, would not match any reg
property, which generates a warning.

Remove it in order to remove those warnings.
Signed-off-by: NMaxime Ripard <maxime.ripard@bootlin.com>
Acked-by: NChen-Yu Tsai <wens@csie.org>

Using skeleton.dtsi will create a memory node that will generate a warning
in DTC. However, that node will be created by the bootloader, so we can
just remove it entirely in order to remove that warning.
Signed-off-by: NMaxime Ripard <maxime.ripard@bootlin.com>
Acked-by: NChen-Yu Tsai <wens@csie.org>

This adds a SRAM controller node for the A23 and A33, with support for
the C1 SRAM region that is shared between the Video Engine and the CPU.
Signed-off-by: NMaxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: NPaul Kocialkowski <paul.kocialkowski@bootlin.com>
[Maxime: Fixed the prefix and the compatibles]
Signed-off-by: NMaxime Ripard <maxime.ripard@bootlin.com>

Declare NAND pins (bus, chip select and ready/busy) for a23/a33 SoCs.
Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: NMaxime Ripard <maxime.ripard@bootlin.com>

Fix dtc warnings for 'simple_bus_reg' due to leading 0s. Converted using
the following command:

perl -p -i -e 's/\@0+([0-9a-f])/\@$1/g' `find arch/arm/boot/dts -type -f -name '*.dts*'

Dropped changes to ARM, Ltd. boards LED nodes and manually fixed up some
occurrences of uppercase hex.
Signed-off-by: NRob Herring <robh@kernel.org>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

Most of our device trees have had leading zeros for padding as part of
the nodes unit-addresses.

Remove all these useless zeros that generate warnings
Acked-by: NChen-Yu Tsai <wens@csie.org>
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

We introduced a new compatible for the NMI or R_INTC interrupt
controller. This new compatible has the register region aligned
to the boundary listed in the SoC's memory map.

This patch converts the NMI/R_INTC node to using the new compatible,
and fixes up the register region and device node name.
Signed-off-by: NChen-Yu Tsai <wens@csie.org>
Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

This adds GPU thermal throttling for the Allwinner A33.
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: NQuentin Schulz <quentin.schulz@free-electrons.com>

All dts files for the sunxi platform have been switched to the generic
pinconf bindings. As a result, the sunxi specific pinctrl macros are
no longer used.

Remove the #include entry with the following command:

    sed --follow-symlinks -i -e '/pinctrl\/sun4i-a10.h/D' \
	arch/arm/boot/dts/sun?i*.*

arch/arm/boot/dts/sun9i-a80.dtsi was then edited to remove the extra
empty line.
Signed-off-by: NChen-Yu Tsai <wens@csie.org>
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

The Mali clock rate was improperly assumed to be 408MHz, while it was
really 384Mhz, 408MHz being the "extreme" frequency, and definitely not
stable.

Switch for the stable, correct frequency for the GPU.
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

Since everybody copied my own mistake from the DT binding example,
let's address all the offenders in one swift go.

Most of them got the CPU interface size wrong (4kB, while it should
be 8kB), except for both keystone platforms which got the control
interface wrong (4kB instead of 8kB).

In a few cases where I knew for sure what implementation was used,
I've added the "arm,gic-400" compatible string. I'm 99% sure that
this is what everyone is using, but short of having the TRM for
all the other SoCs, I've left them alone.
Acked-by: NShawn Guo <shawnguo@kernel.org>
Acked-by: NTony Lindgren <tony@atomide.com>
Acked-by: NSantosh Shilimkar <ssantosh@kernel.org>
Acked-by: NKrzysztof Kozlowski <krzk@kernel.org>
Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: NAntoine Tenart <antoine.tenart@free-electrons.com>
Acked-by: NArnd Bergmann <arnd@arndb.de>
Acked-by: NMatthias Brugger <matthias.bgg@gmail.com>
Acked-by: NHeiko Stuebner <heiko@sntech.de>
Reviewed-by: NJavier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

The A23 and A33 have an ARM Mali 400 GPU. Now that we have a binding, add
it to our DT.
Acked-by: NChen-Yu Tsai <wens@csie.org>
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

The datasheet provided by Allwinner requires oscillators with an accuracy
of 50ppm. Add it to our fixed clocks so that we can properly track the
accuracy chain.
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

So far, the LOSC was generated through the RTC internal oscillator, which
was a pretty poor and inaccurate choice.

Now that the RTC properly exposes its internal mux between its oscillator
and the external oscillator, we can use it were relevant.
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

On the A23/A33, the internal codec's analog path controls are located in
the PRCM node.

Add a sub-device node to the PRCM for it.
Signed-off-by: NChen-Yu Tsai <wens@csie.org>
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

A "cpu0" label is needed on cpu@0 for cpufreq-dt to work.

Add such a label, in order to prepare for cpufreq support of A23/33.
Signed-off-by: NIcenowy Zheng <icenowy@aosc.xyz>
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

In the past, all the MMC pins had

	allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;

which was actually a no-op. We were relying on U-boot to set the bias
pull up for us. These properties were removed as part of the fix up to
actually support no bias on the pins. During the transition some boards
experienced regular MMC time-outs during normal operation, while others
completely failed to initialize the SD card.

Given that MMC starts in open-drain mode and the pull-ups are required,
it's best to enable it for all the pin settings.
Signed-off-by: NChen-Yu Tsai <wens@csie.org>
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

Now that we can handle the generic pinctrl bindings, convert our DT to it.
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: NChen-Yu Tsai <wens@csie.org>
Reviewed-by: NLinus Walleij <linus.walleij@linaro.org>

The allwinner,pull property set to NO_PULL was really considered our
default (and wasn't even changing the default value in the code).

Remove these properties to make it obvious that we do not set anything in
such a case.
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: NChen-Yu Tsai <wens@csie.org>
Reviewed-by: NLinus Walleij <linus.walleij@linaro.org>

The allwinner,drive property set to 10mA was really considered as our
default. Remove all those properties entirely to make that obvious.
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: NChen-Yu Tsai <wens@csie.org>
Reviewed-by: NLinus Walleij <linus.walleij@linaro.org>

The pin controllers also use the two oscillators for debouncing. Add them
to the DTs.
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Acked-by: NChen-Yu Tsai <wens@csie.org>

When the patch is applied, the allwinner,driver and allwinner,pull
properties are removed.

Although they're described to be optional in the devicetree binding,
without them, the pinmux cannot be initialized, and the uart cannot
be used.

Add them back to fix the problem, and makes the bluetooth on iNet D978
Rev2 board work.

Fixes: 82eec384 (ARM: dts: sun8i: add pinmux for UART1 at PG)
Signed-off-by: NIcenowy Zheng <icenowy@aosc.xyz>
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

Use the new sun7i-a20-mmc compatible for the mmc controllers on sun7i
and newer.
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

The UART1 at PG (PG6, PG7, PG8, PG9) is, in the Allwinner's reference
tablet design of A23/33, used to connect to UART Bluetooth cards.

Add the pinmux for it.
Signed-off-by: NIcenowy Zheng <icenowy@aosc.xyz>
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

The usbphy and usb_otg nodes in the A23 and A33 dts files only differ
by compatible, and for the usbphy, the size of one of its register
regions.

Move all the common bits to the A23/A33 common dtsi file.
Signed-off-by: NChen-Yu Tsai <wens@csie.org>
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

The LCD output needs to be muxed. Add the proper pinctrl node.
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: NChen-Yu Tsai <wens@csie.org>

Now that we have support for the CCU driver in sunxi-ng, convert the A23
and A33 DTs to that driver.
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: NChen-Yu Tsai <wens@csie.org>

A23/A33 has a NAND controller which can now be used properly.

Add a device node for it.

The DMA function cannot work because of changed DMA IP block, so it's
temporarily removed in the device node. However, with PIO mode it can still
work.

Tested on an Aoson M751s tablet with Boris Brezillon's "mtd: nand: allow
vendor specific detection/initialization" patchset, which is needed for the
large-block MLC chip to be recognized correctly.
( http://lists.infradead.org/pipermail/linux-mtd/2016-June/068198.html )
Signed-off-by: NIcenowy Zheng <icenowy@aosc.xyz>
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

mmc2_8bit_pins is used with eMMC chips, which also have a reset pin.
The MMC controller also has a reset output that is supported.
Signed-off-by: NChen-Yu Tsai <wens@csie.org>
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

Some boards, such as tablets, have regulators providing power to parts
of the display pipeline, like signal converters and LCD panels.

Add labels to the simplefb device nodes so that we can reference them
in the board dts files to add regulator supply properties.
Signed-off-by: NChen-Yu Tsai <wens@csie.org>
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

When the gpio interrupt bindings where changed to add a bank to the
specifier list, the r_pio nodes of A23/A31/A33 where not updated to
match and neither was the pio node of the A80, this fixes this.
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

The NMI interrupt controller is in charge of the NMI pin exposed by
the SoC to the PMIC. The PMIC signals interrupts through this.
Signed-off-by: NChen-Yu Tsai <wens@csie.org>
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

This patch adds a device node for the Reduced Serial Bus (RSB)
controller and the defacto pinmux setting to the A23/A33 dtsi.

Since there is only one possible pinmux setting for RSB, just
set it in the dtsi.
Signed-off-by: NChen-Yu Tsai <wens@csie.org>
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

The AHB1 gates were assumed to be identical between the A23 and the A33,
which turned out to be wrong. Move the A23 gates definition to the A23
DTSI.
Reported-by: NChen-Yu Tsai <wens@csie.org>
Reviewed-by: NChen-Yu Tsai <wens@csie.org>
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

The PWM controller has 2 outputs, with one usable pin for each.

Add a pinmux setting for the first channel. This is often used
for backlight dimming on tablets.
Signed-off-by: NChen-Yu Tsai <wens@csie.org>
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

A23/A33 have a PWM controller that is compatible to the one on the A20.
Add a device node for it.
Signed-off-by: NChen-Yu Tsai <wens@csie.org>
Reviewed-by: NHans de Goede <hdegoede@redhat.com>
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

The A23 and A33 gates have a non continuous set of clock IDs that are
valid. Add the clock-indices property to the DT to express this.
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: NMichael Turquette <mturquette@baylibre.com>

The current DTs were setting the cell size to 2, but used the default xlate
function that was assuming an interrupt cell size of 1, leading to the
second part of the cell (the flags) being ignored, while we were having an
inconsistent binding between the interrupts and gpio (that could also be
used as interrupts).

That "binding" doesn't work either with newer SoCs that have multiple irq
banks.

Now that we fixed the pinctrl driver to handle this like it should always
have been handled, convert the DT users, and while we're at it, remove the
size-cells property of PIO that is completely useless.
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: NHans de Goede <hdegoede@redhat.com>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>