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  1. 15 8月, 2017 1 次提交
    • T
      ARM: dts: Disable HDMI CEC internal pull-ups · 3a8ed20d
      由 Tony Lindgren 提交于 
      Devices using an external encoder, ESD protection and level shifter
such as tpd12s015 or ip4791cz12 have the CEC pull in the encoder
chip. And on var-som-om44, there is external pull up resistor R30.

So the internal CEC pull-up resistor needs to be disabled as otherwise
the external and internal pull are parallel making the pull value
much smaller than intended. This leads into the CEC not working as
reported by Hans Verkuil <hverkuil@xs4all.nl>.
Reported-by: NHans Verkuil <hverkuil@xs4all.nl>
Cc: Dmitry Lifshitz <lifshitz@compulab.co.il>
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>
      3a8ed20d
  3. 15 11月, 2016 1 次提交
  5. 08 11月, 2016 2 次提交
  7. 14 9月, 2016 3 次提交
    • T
      ARM: dts: Fix LEDs for igepv5 · e7ee0bc6
      由 Tony Lindgren 提交于 
      The LEDs on igepv5 are on the GPIO expander unlike on omap5-uevm.

Configuration copied from git.isee.biz git tree except fixed for
red and blue mapping.
Signed-off-by: NTony Lindgren <tony@atomide.com>
      e7ee0bc6
    • T
      ARM: dts: Configure omap5 OTG ID pin · 952a5db0
      由 Tony Lindgren 提交于 
      The ID pin GPIO comes from the PMIC. Let's configure it as a GPIO
for the driver to use, and also make sure the PMIC GPIO pin muxing
is correct. The PMIC pad1 and 2 values for omap5-uevm and igepv5 are
0x5a and 0x1b, we only need to clear bit 2 in pad1 register to make
the ID pin GPIO work.
Signed-off-by: NTony Lindgren <tony@atomide.com>
      952a5db0
    • T
      ARM: dts: ARM: dts: Fix omap5 SDIO dat1 interrupt · 08f9268b
      由 Tony Lindgren 提交于 
      Few changes to fix issues I've noticed while debugging omap5-uevm
wl18xx issues:

1. Move wlcore irq pin muxing under wlcore. This irq could be
   different from gpio_wk14 on some board variants

2. Don't configure pull on wlcore irq pin. There is a 10k
   pull up resistor R105 on the device to VDDS_1v8_MAIN

3. The padconf register for wlsdio_data1 is wrong, it's really
   at 0x1a8 + 2 - 0x40 = 0x16a offset, not at 0x168 as that's
   for wlsdio_data0

4. Mark the omap5-uevm wlan as compatible with ti,wl1837 as
   that's what the TDK R078 part seems to be

5. The MMC interrupt for WLAN musb be wakeupgen, not gic

Looks like omap5-uevm WLAN behaves better now, but I still seem
to have issues with some access points.
Signed-off-by: NTony Lindgren <tony@atomide.com>
      08f9268b
  9. 16 8月, 2016 1 次提交
  11. 29 6月, 2016 1 次提交
  13. 10 6月, 2016 1 次提交
  15. 13 5月, 2016 2 次提交
    • T
      ARM: dts: Fix uart wakeirq on omap5 by removing WAKEUP_EN for omaps · e0e80d43
      由 Tony Lindgren 提交于 
      The padconf register WAKEUP_EN is now handled in a generic way using
Linux wakeirqs where pinctrl-single toggles the WAKEUP_EN bit when
a wakeirq is enabled or disabled.

At least omap5 gets confused if the WAKEUP_EN bit is set and the pin
is not claimed as a wakeirq. The end result is that wakeirqs don't
work properly as there is nothing handling the wakeirq.

So let's just remove the WAKEUP_EN usage from dts files.
Signed-off-by: NTony Lindgren <tony@atomide.com>
      e0e80d43
    • T
      ARM: dts: Fix igepv5 audiopwon-gpio · 49111cd1
      由 Tony Lindgren 提交于 
      Playing audio works on omap5-uevm, but produces an "Unhandled fault:
imprecise external abort (0x1406) at 0x00000000" error on igepv5.

Looks like the twl6040 audpwron GPIO pin is different for these
boards. Let's fix the issue by configuring the audpwron in the
board specific dts file.

Cc: Agustí Fontquerni <af@iseebcn.com>
Cc: Eduard Gavin <egavin@iseebcn.com>
Cc: Enric Balletbo i Serra <eballetbo@gmail.com>
Acked-by: Peter Ujfalusi <peter.ujflausi@ti com>
Signed-off-by: NTony Lindgren <tony@atomide.com>
      49111cd1
  17. 06 5月, 2016 1 次提交
    • N
      ARM: dts: omap5-board-common: Describe the voltage supply mapping accurately · 6b4e9418
      由 Nishanth Menon 提交于 
      OMAP5uEVM based platforms share a similar voltage rail map. This
should be properly described in device tree, without this regulator core
will be unable to determine the source voltage of LDOs such as LDO9 and
SMPS10 which could be configured for bypass depending on the voltage
requested of them. This results in conditions such as:

ldo9: bypassed regulator has no supply!
ldo9: failed to get the current voltage(-517)
palmas-pmic 48070000.i2c:palmas@48:palmas_pmic: failed to register
48070000.i2c:palmas@48:palmas_pmic regulator

Cc: Agustí Fontquerni <af@iseebcn.com>
Cc: Eduard Gavin <egavin@iseebcn.com>
Cc: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: NNishanth Menon <nm@ti.com>
[tony@atomide.com: fixed to use palmas style in-supply]
Signed-off-by: NTony Lindgren <tony@atomide.com>
      6b4e9418
  19. 27 4月, 2016 3 次提交
  21. 16 1月, 2016 1 次提交
  23. 12 1月, 2016 1 次提交
    • T
      ARM: dts: Fix omap5 PMIC control lines for RTC writes · af756bbc
      由 Tony Lindgren 提交于 
      The palmas PMIC has two control lines that need to be muxed properly
for things to work. The sys_nirq pin is used for interrupts, and msecure
pin is used for enabling writes to some PMIC registers.

Without these pins configured properly things can fail in mysterious
ways. For example, we can't update the RTC registers on palmas PMIC
unless the msecure pin is configured. And this is probably the reason
why we had RTC missing from the omap5 dts file.

According to "OMAP5430 ES2.0 Data Manual [Public] VErsion A (Rev. F)"
swps052f.pdf, mux mode 1 is for sys_drm_msecure so in theory there's
should be no need to configure it as a GPIO pin.

However, it seems there are some reliability issues using the msecure
mux mode. And the TI trees configure the msecure pin as GPIO out high
instead.

As the PMIC only cares that the msecure line is high to allow access
to the RTC registers, let's use a GPIO hog as suggested by Nishanth
Menon <nm@ti.com>. Also the use of the internal pull was considered
but supposedly that may not be capable of keeping the line high in
a noisy environment.

If we ever see high security omap5 products in the mainline tree,
those need to skip the msecure pin muxing and ignore setting the GPIO
hog. Chances are the related pin mux registers are locked in that case
and the msecure pin is managed by whatever software may be running in
the ARM TrustZone.

Who knows what the original intention of the msecure pin was. Maybe
it was supposed to prevent the system time to be set back for some
game demo modes to time out? Anyways, it seems that later PMICs like
tps659037 have recycled this pin for "powerhold" and devices like
beagle-x15 do not need changes to the msecure pin configuration.

To avoid further confusion with TWL variant PMICs, beagle-x15 does
not have a back-up battery for RTC palmas. Instead the mcp79410 RTC
is used with rtc-ds1307 driver. There is a "powerhold" jumper j5
holes near the palmas PMIC, and shorting it seems to power up
beagle-x15 automatically. It is unknown if it also has other side
effects to the beagle-x15 power up sequence.

Cc: stable@vger.kernel.org # v4.4
Signed-off-by: NTony Lindgren <tony@atomide.com>
      af756bbc
  25. 01 12月, 2015 1 次提交
  27. 17 10月, 2015 2 次提交
    • T
      ARM: dts: Move most of omap5-uevm.dts to omap5-board-common.dtsi · ee9a97db
      由 Tony Lindgren 提交于 
      Looks like thevarious omap5-uevm models and igepv5 are very similar. So let's
create omap5-board-common.dtsi to allow fixing up things properly for mainline
kernel to support all these.

Even if we eventually end up having only PMIC + MMC + eMMC + SDIO WLAN + SATA +
USB + HDMI configuration in the omap5-board-common.dtsi, this is the easiest
way to add support for other boards rather than diffing various versions of
out of tree dts files.

My guess is that also omap5-sbc-t54.dts can use this, but I don't have that
board so that will need to be dealt with later on.
Signed-off-by: NTony Lindgren <tony@atomide.com>
      ee9a97db
    • T
      ARM: dts: Fix WLAN regression on omap5-uevm · 0efc898a
      由 Tony Lindgren 提交于 
      Commit 99f84cae ("ARM: dts: add wl12xx/wl18xx bindings") added
device tree bindings for the TI WLAN SDIO on many omap variants.

I recall wondering how come omap5-uevm did not have the WLAN
added and this issue has been bugging me for a while now, and
I finally tracked it down to a bad pinmux regression, and a missing
deferred probe handling for the 32k clock from palmas that's
requested by twl6040.

Basically 392adaf7 ("ARM: dts: omap5-evm: Add mcspi data")
added pin muxing for mcspi4 that conflicts with the onboard
WLAN. While some omap5-uevm don't have WLAN populated, the
pins are not reused for other devices. And as the SDIO bus
should be probed, let's try to enable WLAN by default.

Let's fix the regression and add the WLAN configuration as
done for the other boards in 99f84cae ("ARM: dts: add
wl12xx/wl18xx bindings"). And let's use the new MMC pwrseq for
the 32k clock as suggested by Javier Martinez Canillas
<javier@dowhile0.org>.

Note that without a related deferred probe fix for twl6040,
the 32k clock is not initialized if palmas-clk is a module
and twl6040 is built-in.

Let's also use the generic "non-removable" instead of the
legacy "ti,non-removable" property while at it.

And finally, note that omap5 seems to require WAKEUP_EN for
the WLAN GPIO interrupt.

Fixes: 392adaf7 ("ARM: dts: omap5-evm: Add mcspi data")
Cc: Sourav Poddar <sourav.poddar@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>
      0efc898a
  29. 13 10月, 2015 1 次提交
  31. 17 9月, 2015 1 次提交
  33. 21 7月, 2015 1 次提交
  35. 21 5月, 2015 1 次提交
  37. 15 3月, 2015 1 次提交
    • M
      ARM: omap: convert wakeupgen to stacked domains · 7136d457
      由 Marc Zyngier 提交于 
      OMAP4/5 has been (ab)using the gic_arch_extn to provide
wakeup from suspend, and it makes a lot of sense to convert
this code to use stacked domains instead.

This patch does just this, updating the DT files to actually
reflect what the HW provides.

BIG FAT WARNING: because the DTs were so far lying by not
exposing the WUGEN HW block, kernels with this patch applied
won't have any suspend-resume facility when booted with old DTs,
and old kernels with updated DTs won't even boot.

On a platform with this patch applied, the system looks like
this:

root@bacon-fat:~# cat /proc/interrupts
            CPU0       CPU1
 16:          0          0     WUGEN  37  gp_timer
 19:     233799     155916       GIC  27  arch_timer
 23:          0          0     WUGEN   9  l3-dbg-irq
 24:          1          0     WUGEN  10  l3-app-irq
 27:        282          0     WUGEN  13  omap-dma-engine
 44:          0          0  4ae10000.gpio  13  DMA
294:          0          0     WUGEN  20  gpmc
297:        506          0     WUGEN  56  48070000.i2c
298:          0          0     WUGEN  57  48072000.i2c
299:          0          0     WUGEN  61  48060000.i2c
300:          0          0     WUGEN  62  4807a000.i2c
301:          8          0     WUGEN  60  4807c000.i2c
308:       2439          0     WUGEN  74  OMAP UART2
312:        362          0     WUGEN  83  mmc2
313:        502          0     WUGEN  86  mmc0
314:         13          0     WUGEN  94  mmc1
350:          0          0      PRCM  pinctrl, pinctrl
406:   35155709          0       GIC 109  ehci_hcd:usb1
407:          0          0     WUGEN   7  palmas
409:          0          0     WUGEN 119  twl6040
410:          0          0   twl6040   5  twl6040_irq_ready
411:          0          0   twl6040   0  twl6040_irq_th
IPI0:          0          1  CPU wakeup interrupts
IPI1:          0          0  Timer broadcast interrupts
IPI2:      95334     902334  Rescheduling interrupts
IPI3:          0          0  Function call interrupts
IPI4:        479        648  Single function call interrupts
IPI5:          0          0  CPU stop interrupts
IPI6:          0          0  IRQ work interrupts
IPI7:          0          0  completion interrupts
Err:          0
Acked-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
Link: https://lkml.kernel.org/r/1426088629-15377-8-git-send-email-marc.zyngier@arm.comSigned-off-by: NJason Cooper <jason@lakedaemon.net>
      7136d457
  39. 15 7月, 2014 3 次提交
  41. 03 6月, 2014 2 次提交
  43. 05 3月, 2014 1 次提交
  45. 23 10月, 2013 2 次提交
  47. 22 10月, 2013 2 次提交
  49. 21 10月, 2013 1 次提交
  51. 12 10月, 2013 2 次提交
  53. 08 10月, 2013 1 次提交