- 24 5月, 2006 2 次提交
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由 Thomas Gleixner 提交于
The previous _ecc removal / cleanup broke (i)nftl module usage. Export the missing symbol. Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
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由 Thomas Gleixner 提交于
Both drivers can not be fixed and compiled due to missing header files. Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
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- 23 5月, 2006 14 次提交
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由 Thomas Gleixner 提交于
MTD clients are agnostic of FLASH which needs ECC suppport. Remove the functions and fixup the callers. Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
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由 Thomas Gleixner 提交于
These functions were never implemented and added only bloat to partition and concat code. Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
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由 Thomas Gleixner 提交于
NAND writev(_ecc) support is not longer necessary. Remove it. Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
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由 Thomas Gleixner 提交于
Fix the diskonchip ecc setup. Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
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由 Thomas Gleixner 提交于
First step of modularizing ECC support. - Move ECC related functionality into a seperate embedded data structure - Get rid of the hardware dependend constants to simplify new ECC models Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
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由 Thomas Gleixner 提交于
Seperate functionality out of nand_scan so the code is more readable. No functional change. First step of simplifying the nand driver. Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
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由 Thomas Gleixner 提交于
The NAND driver used a mix of unsigned char, u_char amd uint8_t data types. Consolidate to uint8_t usage Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
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由 Thomas Gleixner 提交于
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
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由 Thomas Gleixner 提交于
NDFC NAND Flash controller is embedded in PPC EP44x SoCs. Add platform driver based support. Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
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由 Thomas Gleixner 提交于
Replace the chip lock by a the controller lock. For simple drivers a dummy controller structure is created by the scan code. This simplifies the locking algorithm in nand_get/release_chip(). Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
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由 Thomas Gleixner 提交于
Unrolling the loops produces denser and much faster code. Add a config switch which allows to select the byte order of the resulting ecc code. The current Linux implementation has a byte swap versus the SmartMedia specification Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
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由 Joern Engel 提交于
o Add a flag MTD_BIT_WRITEABLE for devices that allow single bits to be cleared. o Replace MTD_PROGRAM_REGIONS with a cleared MTD_BIT_WRITEABLE flag for STMicro and Intel Sibley flashes with internal ECC. Those flashes disallow clearing of single bits, unlike regular NOR flashes, so the new flag models their behaviour better. o Remove MTD_ECC. After the STMicro/Sibley merge, this flag is only set and never checked. Signed-off-by: NJoern Engel <joern@wh.fh-wedel.de>
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由 Joern Engel 提交于
In 2002, STMicro started producing NOR flashes with internal ECC protection for small blocks (8 or 16 bytes). Support for those flashes was added by me. In 2005, Intel Sibley flashes copied this strategy and Nico added support for those. Merge the code for both. Signed-off-by: NJoern Engel <joern@wh.fh-wedel.de>
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由 Joern Engel 提交于
At least two flashes exists that have the concept of a minimum write unit, similar to NAND pages, but no other NAND characteristics. Therefore, rename the minimum write unit to "writesize" for all flashes, including NAND. Signed-off-by: NJoern Engel <joern@wh.fh-wedel.de>
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- 22 5月, 2006 3 次提交
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由 David Woodhouse 提交于
Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
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由 David Woodhouse 提交于
The previous code wouldn't work correctly on architectures which have a non-empty MODULE_SYMBOL_PREFIX, and this version is neater if slightly less optimal in the built-in case. Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
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由 Jonathan McDowell 提交于
The patch below adds support for the NAND device on the Amstrad Delta. This is a 32MiB 8bit Toshiba device, with the data bus connected to the OMAP MPUIO pins and ALE, CLE, NCE, NRE, NWE and NWP all connected to the Delta's latch2 16bit latch. Signed-Off-By: NJonathan McDowell <noodles@earth.li> Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
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- 20 5月, 2006 3 次提交
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由 Andrew Morton 提交于
WARNING: "__moddi3" [drivers/mtd/mtdconcat.ko] undefined! Signed-off-by: NAndrew Morton <akpm@osdl.org> Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
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由 David Woodhouse 提交于
Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
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由 Andrew Morton 提交于
drivers/mtd/devices/docprobe.c: In function `DoC_Probe': drivers/mtd/devices/docprobe.c:338: warning: assignment from incompatible pointer type drivers/mtd/devices/docprobe.c:341: warning: assignment from incompatible pointer type Cc: David Woodhouse <dwmw2@infradead.org> Signed-off-by: NAndrew Morton <akpm@osdl.org> Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
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- 18 5月, 2006 2 次提交
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由 David Woodhouse 提交于
Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
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由 David Woodhouse 提交于
Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
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- 17 5月, 2006 12 次提交
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由 Alexander Belyakov 提交于
There is a second revision of "mtdconcat NAND/Sibley" patch. I hope the patch will not get damaged as I'm posting it from gmail account, thanks to Jorn. The patch adds previously missing concat_writev(), concat_writev_ecc(), concat_block_isbad(), concat_block_markbad() functions to make concatenation layer compatible with Sibley and NAND chips. Patch has been cleared from whitespaces, fixed some lines of code as requested. Also I have added code for alignment check that should support Jorn's "writesize" patch. Signed-off-by: NAlexander Belyakov <alexander.belyakov@intel.com> Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
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由 Martin Michlmayr 提交于
The following difference was found between the mainline and linux-mips kernel. LASAT depends on MTD_CFI. Signed-off-by: NMartin Michlmayr <tbm@cyrius.com> Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
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由 Martin Michlmayr 提交于
In an unrelated MTD commit, a description about the ms02-nv module got removed from Kconfig. While I personally agree with this removal, the module maintainer (Maciej W. Rozycki) would like to see it added back. In the absense of any consistency regarding Kconfig descriptions his wish should be followed. Signed-off-by: NMartin Michlmayr <tbm@cyrius.com> Acked-by: NMaciej W. Rozycki <macro@linux-mips.org> Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
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由 Sean Young 提交于
Signed-off-by: NSean Young <sean@mess.org> Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
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由 Vitaly Wool 提交于
'oobavail' parameter of mtd_info structure is now propagated to the MTD partitions Signed-off-by: NVitaly Wool <vwool@ru.mvista.com> Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
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由 Sean Young 提交于
Signed-off-by: NSean Young <sean@mess.org> Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
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由 Nicolas Pitre 提交于
This allows for much better abstraction and separation of the XIP and non-XIP cases with their own specific implementations. This fixes the case where a timeout was tripped on in the XIP case by the code that was meant for the non-XIP case only. This also makes for a nice code reduction. Signed-off-by: NNicolas Pitre <nico@cam.org> CC: "Alexey, Korolev" <alexey.korolev@intel.com> Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
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由 Nicolas Pitre 提交于
... otherwise xip_enable() won't do the right thing. Signed-off-by: NNicolas Pitre <nico@cam.org> Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
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由 Josh Boyer 提交于
The patch below fixes a potential starvation issue that can arise when there is contention on a chip during a period when a process is currently writing to it. The starvation is avoided by conditionally rescheduling when the chip is left in a state usable by other processes. Signed-off-by: NJosh Boyer <jdub@us.ibm.com> Signed-off-by: NTom Gall <tom_gall@vnet.ibm.com> Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
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由 Sergei Shtylyov 提交于
On AMD Au1550 the static bus controller fails to keep -CE asserted during chip ready delay on read commands and the NAND chip being used requires this. So, the current driver allows nand_base.c to drive -CE manually during the entire sector read. When the PCMCIA driver is enabled however, occasionally the ECC errors occur on NAND reads. This happens because the PCMCIA driver polls sockets periodically and reads one of the board's control/status regs (BCSRs) which are on the same static bus as the NAND flash, and just use another chip select (and the NOR flash also resides on that bus), so as the NAND driver forces NAND chip select asserted and the -RE signal is shared, a contention occurs on the static bus when BCSR or NOR flash is read while we're reading from NAND. So, we either can't keep interrupts enabled during the whole NAND sector read (which is hardly acceptable), or have to implement some interlocking scheme between multiple drivers (which is painful, and makes me shudder :-). There's a third way which has proven to work: to force -CE asserted only while we're waiting for a NAND chip to become ready after a read command, disabling interrupts for a maximum of 25 microseconds (according to Toshiba TC58DVM92A1FT00 datasheet -- this chip is mentioned in the board schematics); for Samsung NAND chip which seems to be actually used this delay is even less, 12 us. Signed-off-by: NKonstantin Baydarov <kbaidarov@ru.mvista.com> Signed-off-by: NSergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
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由 Ben Dooks 提交于
Fix build warnings from drivers/mtd/redboot.c due to use of `unsigned long` in `struct fis_image_desc` for fields being passed to swab32s() which expects __u32 * Change the entries to uint32_t to make them compatible with the swab32s() function Signed-off-by: NBen Dooks <ben-linux@fluff.org> Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
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由 Sergei Shtylyov 提交于
During the last cleanup of the AMD Au1550 NAND driver the old buglet was reintroduced: as the MEM_STNDCTL register is write-only and seem to always read as 0x31, read-modify-write to it done in au1xxx_nand_init() will have the side effect of enabling -RCS0/1 pin override (via bits 4/5 of this reg.), thus possibly causing a contention on the static bus when the NOR flash (using -RCS0) or board control status registers (using -RCS2) are read. Luckily, this goes away with a first NAND access, since au1550_hwcontrol() doesn't try to read this register before writing anymore. Signed-off-by: NSergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
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- 16 5月, 2006 3 次提交
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由 David Woodhouse 提交于
We all inherited the same error from the original NAND board driver which got copied and changed. Fix them all at once... Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
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由 Adrian Bunk 提交于
On Mon, May 15, 2006 at 12:56:37AM -0700, Andrew Morton wrote: >... > Changes since 2.6.17-rc3-mm1: >... > git-mtd.patch >... > git trees >... If we correct the names of the config options, the code might actually work as intended... Signed-off-by: NAdrian Bunk <bunk@stusta.de> Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
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由 David Woodhouse 提交于
Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
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- 14 5月, 2006 1 次提交
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由 David Woodhouse 提交于
Make it work even with compilers which lack the wit to notice that THIS_MODULE is always non-NULL. Use #ifdef MODULE instead. It's only a temporary debugging check anyway. Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
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