1. 21 1月, 2022 2 次提交
  2. 20 1月, 2022 4 次提交
  3. 08 1月, 2022 1 次提交
  4. 06 1月, 2022 2 次提交
  5. 25 11月, 2021 1 次提交
  6. 29 10月, 2021 1 次提交
  7. 26 10月, 2021 2 次提交
    • M
      irq: remove handle_domain_{irq,nmi}() · 0953fb26
      Mark Rutland 提交于
      Now that entry code handles IRQ entry (including setting the IRQ regs)
      before calling irqchip code, irqchip code can safely call
      generic_handle_domain_irq(), and there's no functional reason for it to
      call handle_domain_irq().
      
      Let's cement this split of responsibility and remove handle_domain_irq()
      entirely, updating irqchip drivers to call generic_handle_domain_irq().
      
      For consistency, handle_domain_nmi() is similarly removed and replaced
      with a generic_handle_domain_nmi() function which also does not perform
      any entry logic.
      
      Previously handle_domain_{irq,nmi}() had a WARN_ON() which would fire
      when they were called in an inappropriate context. So that we can
      identify similar issues going forward, similar WARN_ON_ONCE() logic is
      added to the generic_handle_*() functions, and comments are updated for
      clarity and consistency.
      Signed-off-by: NMark Rutland <mark.rutland@arm.com>
      Reviewed-by: NMarc Zyngier <maz@kernel.org>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      0953fb26
    • M
      irq: riscv: perform irqentry in entry code · 7ecbc648
      Mark Rutland 提交于
      In preparation for removing HANDLE_DOMAIN_IRQ_IRQENTRY, have arch/riscv
      perform all the irqentry accounting in its entry code. As arch/riscv
      uses GENERIC_IRQ_MULTI_HANDLER, we can use generic_handle_arch_irq() to
      do so.
      
      Since generic_handle_arch_irq() handles the irq entry and setting the
      irq regs, and happens before the irqchip code calls handle_IPI(), we can
      remove the redundant irq entry and irq regs manipulation from
      handle_IPI().
      
      There should be no functional change as a result of this patch.
      Signed-off-by: NMark Rutland <mark.rutland@arm.com>
      Reviewed-by: NGuo Ren <guoren@kernel.org>
      Reviewed-by: NMarc Zyngier <maz@kernel.org>
      Cc: Albert Ou <aou@eecs.berkeley.edu>
      Cc: Palmer Dabbelt <palmer@dabbelt.com>
      Cc: Paul Walmsley <paul.walmsley@sifive.com>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      7ecbc648
  8. 25 10月, 2021 1 次提交
    • M
      irq: add a (temporary) CONFIG_HANDLE_DOMAIN_IRQ_IRQENTRY · 2fe35f8e
      Mark Rutland 提交于
      Going forward we want architecture/entry code to perform all the
      necessary work to enter/exit IRQ context, with irqchip code merely
      handling the mapping of the interrupt to any handler(s). Among other
      reasons, this is necessary to consistently fix some longstanding issues
      with the ordering of lockdep/RCU/tracing instrumentation which many
      architectures get wrong today in their entry code.
      
      Importantly, rcu_irq_{enter,exit}() must be called precisely once per
      IRQ exception, so that rcu_is_cpu_rrupt_from_idle() can correctly
      identify when an interrupt was taken from an idle context which must be
      explicitly preempted. Currently handle_domain_irq() calls
      rcu_irq_{enter,exit}() via irq_{enter,exit}(), but entry code needs to
      be able to call rcu_irq_{enter,exit}() earlier for correct ordering
      across lockdep/RCU/tracing updates for sequences such as:
      
        lockdep_hardirqs_off(CALLER_ADDR0);
        rcu_irq_enter();
        trace_hardirqs_off_finish();
      
      To permit each architecture to be converted to the new style in turn,
      this patch adds a new CONFIG_HANDLE_DOMAIN_IRQ_IRQENTRY selected by all
      current users of HANDLE_DOMAIN_IRQ, which gates the existing behaviour.
      When CONFIG_HANDLE_DOMAIN_IRQ_IRQENTRY is not selected,
      handle_domain_irq() requires entry code to perform the
      irq_{enter,exit}() work, with an explicit check for this matching the
      style of handle_domain_nmi().
      
      Subsequent patches will:
      
      1) Add the necessary IRQ entry accounting to each architecture in turn,
         dropping CONFIG_HANDLE_DOMAIN_IRQ_IRQENTRY from that architecture's
         Kconfig.
      
      2) Remove CONFIG_HANDLE_DOMAIN_IRQ_IRQENTRY once it is no longer
         selected.
      
      3) Convert irqchip drivers to consistently use
         generic_handle_domain_irq() rather than handle_domain_irq().
      
      4) Remove handle_domain_irq() and CONFIG_HANDLE_DOMAIN_IRQ.
      
      ... which should leave us with a clear split of responsiblity across the
      entry and irqchip code, making it possible to perform additional
      cleanups and fixes for the aforementioned longstanding issues with entry
      code.
      
      There should be no functional change as a result of this patch.
      Signed-off-by: NMark Rutland <mark.rutland@arm.com>
      Reviewed-by: NMarc Zyngier <maz@kernel.org>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      2fe35f8e
  9. 07 10月, 2021 1 次提交
  10. 05 10月, 2021 1 次提交
    • T
      riscv/vdso: Add support for time namespaces · dffe11e2
      Tong Tiangen 提交于
      Implement generic vdso time namespace support which also enables time
      namespaces for riscv. This is quite similar to what arm64 does.
      
      selftest/timens test result:
        1..10
        ok 1 Passed for CLOCK_BOOTTIME (syscall)
        ok 2 Passed for CLOCK_BOOTTIME (vdso)
        ok 3 # SKIP CLOCK_BOOTTIME_ALARM isn't supported
        ok 4 # SKIP CLOCK_BOOTTIME_ALARM isn't supported
        ok 5 Passed for CLOCK_MONOTONIC (syscall)
        ok 6 Passed for CLOCK_MONOTONIC (vdso)
        ok 7 Passed for CLOCK_MONOTONIC_COARSE (syscall)
        ok 8 Passed for CLOCK_MONOTONIC_COARSE (vdso)
        ok 9 Passed for CLOCK_MONOTONIC_RAW (syscall)
        ok 10 Passed for CLOCK_MONOTONIC_RAW (vdso)
        # Totals: pass:8 fail:0 xfail:0 xpass:0 skip:2 error:0
      Signed-off-by: NTong Tiangen <tongtiangen@huawei.com>
      Signed-off-by: NPalmer Dabbelt <palmerdabbelt@google.com>
      dffe11e2
  11. 04 10月, 2021 1 次提交
  12. 14 9月, 2021 1 次提交
  13. 11 9月, 2021 1 次提交
  14. 09 9月, 2021 1 次提交
  15. 27 8月, 2021 1 次提交
  16. 25 8月, 2021 2 次提交
  17. 16 8月, 2021 1 次提交
  18. 07 8月, 2021 1 次提交
  19. 04 8月, 2021 5 次提交
  20. 30 7月, 2021 1 次提交
    • A
      asm-generic: reverse GENERIC_{STRNCPY_FROM,STRNLEN}_USER symbols · e6226997
      Arnd Bergmann 提交于
      Most architectures do not need a custom implementation, and in most
      cases the generic implementation is preferred, so change the polariy
      on these Kconfig symbols to require architectures to select them when
      they provide their own version.
      
      The new name is CONFIG_ARCH_HAS_{STRNCPY_FROM,STRNLEN}_USER.
      
      The remaining architectures at the moment are: ia64, mips, parisc,
      um and xtensa. We should probably convert these as well, but
      I was not sure how far to take this series. Thomas Bogendoerfer
      had some concerns about converting mips but may still do some
      more detailed measurements to see which version is better.
      
      Cc: "James E.J. Bottomley" <James.Bottomley@HansenPartnership.com>
      Cc: Anton Ivanov <anton.ivanov@cambridgegreys.com>
      Cc: Christian Borntraeger <borntraeger@de.ibm.com>
      Cc: Heiko Carstens <hca@linux.ibm.com>
      Cc: Helge Deller <deller@gmx.de>
      Cc: Jeff Dike <jdike@addtoit.com>
      Cc: Max Filippov <jcmvbkbc@gmail.com>
      Cc: Richard Weinberger <richard@nod.at>
      Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
      Cc: Vasily Gorbik <gor@linux.ibm.com>
      Cc: linux-ia64@vger.kernel.org
      Cc: linux-mips@vger.kernel.org
      Cc: linux-parisc@vger.kernel.org
      Cc: linux-s390@vger.kernel.org
      Cc: linux-um@lists.infradead.org
      Cc: linux-xtensa@linux-xtensa.org
      Acked-by: NGeert Uytterhoeven <geert@linux-m68k.org>
      Acked-by: Helge Deller <deller@gmx.de> # parisc
      Reviewed-by: NChristoph Hellwig <hch@lst.de>
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      e6226997
  21. 28 7月, 2021 1 次提交
  22. 09 7月, 2021 1 次提交
    • M
      riscv/Kconfig: make direct map manipulation options depend on MMU · 10cc3278
      Mike Rapoport 提交于
      ARCH_HAS_SET_DIRECT_MAP and ARCH_HAS_SET_MEMORY configuration options have
      no meaning when CONFIG_MMU is disabled and there is no point to enable
      them for the nommu case.
      
      Add an explicit dependency on MMU for these options.
      
      Link: https://lkml.kernel.org/r/20210518072034.31572-3-rppt@kernel.orgSigned-off-by: NMike Rapoport <rppt@linux.ibm.com>
      Reported-by: Nkernel test robot <lkp@intel.com>
      Reviewed-by: NDavid Hildenbrand <david@redhat.com>
      Acked-by: NJames Bottomley <James.Bottomley@HansenPartnership.com>
      Cc: Alexander Viro <viro@zeniv.linux.org.uk>
      Cc: Andy Lutomirski <luto@kernel.org>
      Cc: Arnd Bergmann <arnd@arndb.de>
      Cc: Borislav Petkov <bp@alien8.de>
      Cc: Catalin Marinas <catalin.marinas@arm.com>
      Cc: Christopher Lameter <cl@linux.com>
      Cc: Dan Williams <dan.j.williams@intel.com>
      Cc: Dave Hansen <dave.hansen@linux.intel.com>
      Cc: Elena Reshetova <elena.reshetova@intel.com>
      Cc: Hagen Paul Pfeifer <hagen@jauu.net>
      Cc: "H. Peter Anvin" <hpa@zytor.com>
      Cc: Ingo Molnar <mingo@redhat.com>
      Cc: James Bottomley <jejb@linux.ibm.com>
      Cc: "Kirill A. Shutemov" <kirill@shutemov.name>
      Cc: Mark Rutland <mark.rutland@arm.com>
      Cc: Matthew Wilcox <willy@infradead.org>
      Cc: Michael Kerrisk <mtk.manpages@gmail.com>
      Cc: Palmer Dabbelt <palmer@dabbelt.com>
      Cc: Palmer Dabbelt <palmerdabbelt@google.com>
      Cc: Paul Walmsley <paul.walmsley@sifive.com>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Rick Edgecombe <rick.p.edgecombe@intel.com>
      Cc: Roman Gushchin <guro@fb.com>
      Cc: Shakeel Butt <shakeelb@google.com>
      Cc: Shuah Khan <shuah@kernel.org>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Tycho Andersen <tycho@tycho.ws>
      Cc: Will Deacon <will@kernel.org>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      10cc3278
  23. 07 7月, 2021 1 次提交
    • T
      riscv: add VMAP_STACK overflow detection · 31da94c2
      Tong Tiangen 提交于
      This patch adds stack overflow detection to riscv, usable when
      CONFIG_VMAP_STACK=y.
      
      Overflow is detected in kernel exception entry(kernel/entry.S), if the
      kernel stack is overflow and been detected, the overflow handler is
      invoked on a per-cpu overflow stack. This approach preserves GPRs and
      the original exception information.
      
      The overflow detect is performed before any attempt is made to access
      the stack and the principle of stack overflow detection: kernel stacks
      are aligned to double their size, enabling overflow to be detected with
      a single bit test. For example, a 16K stack is aligned to 32K, ensuring
      that bit 14 of the SP must be zero. On an overflow (or underflow), this
      bit is flipped. Thus, overflow (of less than the size of the stack) can
      be detected by testing whether this bit is set.
      
      This gives us a useful error message on stack overflow, as can be
      trigger with the LKDTM overflow test:
      
      [  388.053267] lkdtm: Performing direct entry EXHAUST_STACK
      [  388.053663] lkdtm: Calling function with 1024 frame size to depth 32 ...
      [  388.054016] lkdtm: loop 32/32 ...
      [  388.054186] lkdtm: loop 31/32 ...
      [  388.054491] lkdtm: loop 30/32 ...
      [  388.054672] lkdtm: loop 29/32 ...
      [  388.054859] lkdtm: loop 28/32 ...
      [  388.055010] lkdtm: loop 27/32 ...
      [  388.055163] lkdtm: loop 26/32 ...
      [  388.055309] lkdtm: loop 25/32 ...
      [  388.055481] lkdtm: loop 24/32 ...
      [  388.055653] lkdtm: loop 23/32 ...
      [  388.055837] lkdtm: loop 22/32 ...
      [  388.056015] lkdtm: loop 21/32 ...
      [  388.056188] lkdtm: loop 20/32 ...
      [  388.058145] Insufficient stack space to handle exception!
      [  388.058153] Task stack:     [0xffffffd014260000..0xffffffd014264000]
      [  388.058160] Overflow stack: [0xffffffe1f8d2c220..0xffffffe1f8d2d220]
      [  388.058168] CPU: 0 PID: 89 Comm: bash Not tainted 5.12.0-rc8-dirty #90
      [  388.058175] Hardware name: riscv-virtio,qemu (DT)
      [  388.058187] epc : number+0x32/0x2c0
      [  388.058247]  ra : vsnprintf+0x2ae/0x3f0
      [  388.058255] epc : ffffffe0002d38f6 ra : ffffffe0002d814e sp : ffffffd01425ffc0
      [  388.058263]  gp : ffffffe0012e4010 tp : ffffffe08014da00 t0 : ffffffd0142606e8
      [  388.058271]  t1 : 0000000000000000 t2 : 0000000000000000 s0 : ffffffd014260070
      [  388.058303]  s1 : ffffffd014260158 a0 : ffffffd01426015e a1 : ffffffd014260158
      [  388.058311]  a2 : 0000000000000013 a3 : ffff0a01ffffff10 a4 : ffffffe000c398e0
      [  388.058319]  a5 : 511b02ec65f3e300 a6 : 0000000000a1749a a7 : 0000000000000000
      [  388.058327]  s2 : ffffffff000000ff s3 : 00000000ffff0a01 s4 : ffffffe0012e50a8
      [  388.058335]  s5 : 0000000000ffff0a s6 : ffffffe0012e50a8 s7 : ffffffe000da1cc0
      [  388.058343]  s8 : ffffffffffffffff s9 : ffffffd0142602b0 s10: ffffffd0142602a8
      [  388.058351]  s11: ffffffd01426015e t3 : 00000000000f0000 t4 : ffffffffffffffff
      [  388.058359]  t5 : 000000000000002f t6 : ffffffd014260158
      [  388.058366] status: 0000000000000100 badaddr: ffffffd01425fff8 cause: 000000000000000f
      [  388.058374] Kernel panic - not syncing: Kernel stack overflow
      [  388.058381] CPU: 0 PID: 89 Comm: bash Not tainted 5.12.0-rc8-dirty #90
      [  388.058387] Hardware name: riscv-virtio,qemu (DT)
      [  388.058393] Call Trace:
      [  388.058400] [<ffffffe000004944>] walk_stackframe+0x0/0xce
      [  388.058406] [<ffffffe0006f0b28>] dump_backtrace+0x38/0x46
      [  388.058412] [<ffffffe0006f0b46>] show_stack+0x10/0x18
      [  388.058418] [<ffffffe0006f3690>] dump_stack+0x74/0x8e
      [  388.058424] [<ffffffe0006f0d52>] panic+0xfc/0x2b2
      [  388.058430] [<ffffffe0006f0acc>] print_trace_address+0x0/0x24
      [  388.058436] [<ffffffe0002d814e>] vsnprintf+0x2ae/0x3f0
      [  388.058956] SMP: stopping secondary CPUs
      Signed-off-by: NTong Tiangen <tongtiangen@huawei.com>
      Reviewed-by: NKefeng Wang <wangkefeng.wang@huawei.com>
      Signed-off-by: NPalmer Dabbelt <palmerdabbelt@google.com>
      31da94c2
  24. 06 7月, 2021 1 次提交
  25. 01 7月, 2021 2 次提交
  26. 30 6月, 2021 1 次提交
  27. 12 6月, 2021 1 次提交
  28. 11 6月, 2021 1 次提交