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由 Kefeng Wang 提交于
The interrupt controllers on riscv support both edge and level triggered interrupts, it's useful to provide that information in /proc/interrupts. Signed-off-by: NKefeng Wang <wangkefeng.wang@huawei.com> Signed-off-by: NPalmer Dabbelt <palmerdabbelt@google.com>
ecd4916c