1. 09 1月, 2010 2 次提交
    • P
      OMAP2 clock: dynamically allocate CPUFreq frequency table · cdf1a915
      Paul Walmsley 提交于
      Dynamically allocate the CPUFreq frequency table on OMAP2xxx chips.
      This fixes some compilation problems, since the kernel may not know
      what chip it is running on until boot-time.  This also reduces the size
      of the CPUFreq frequency table.
      
      Problem originally reported by Felipe Balbi <felipe.balbi@nokia.com>.
      Thanks also for comments on the patch from Felipe and Kevin.
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      Cc: Felipe Balbi <felipe.balbi@nokia.com>
      Cc: Kevin Hilman <khilman@deeprootsystems.com>
      cdf1a915
    • F
      OMAP2xxx clock: clk2xxx.c doesn't compile if CPUFREQ is enabled · 19fe4583
      Felipe Balbi 提交于
      if we enable CPUFREQ we can't build omap2 for two reasons,
      one of them is fixed by the patch below.
      
      It's failing because the __must_be_array() check in
      ARRAY_SIZE() is failing and printing the following message:
      
      arch/arm/mach-omap2/clock2xxx.c:453: error: negative width in bit-field '<anonymous>'
      Signed-off-by: NFelipe Balbi <felipe.balbi@nokia.com>
      [paul@pwsan.com: commit message updated; changed rate variable name]
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      19fe4583
  2. 12 12月, 2009 5 次提交
  3. 09 12月, 2009 1 次提交
  4. 21 10月, 2009 1 次提交
    • T
      omap: headers: Move remaining headers from include/mach to include/plat · ce491cf8
      Tony Lindgren 提交于
      Move the remaining headers under plat-omap/include/mach
      to plat-omap/include/plat. Also search and replace the
      files using these headers to include using the right path.
      
      This was done with:
      
      #!/bin/bash
      mach_dir_old="arch/arm/plat-omap/include/mach"
      plat_dir_new="arch/arm/plat-omap/include/plat"
      headers=$(cd $mach_dir_old && ls *.h)
      omap_dirs="arch/arm/*omap*/ \
      drivers/video/omap \
      sound/soc/omap"
      other_files="drivers/leds/leds-ams-delta.c \
      drivers/mfd/menelaus.c \
      drivers/mfd/twl4030-core.c \
      drivers/mtd/nand/ams-delta.c"
      
      for header in $headers; do
      	old="#include <mach\/$header"
      	new="#include <plat\/$header"
      	for dir in $omap_dirs; do
      		find $dir -type f -name \*.[chS] | \
      			xargs sed -i "s/$old/$new/"
      	done
      	find drivers/ -type f -name \*omap*.[chS] | \
      		xargs sed -i "s/$old/$new/"
      	for file in $other_files; do
      		sed -i "s/$old/$new/" $file
      	done
      done
      
      for header in $(ls $mach_dir_old/*.h); do
      	git mv $header $plat_dir_new/
      done
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      ce491cf8
  5. 15 10月, 2009 1 次提交
    • P
      OMAP2xxx clock: set up clockdomain pointer in struct clk · a7f20b26
      Paul Walmsley 提交于
      clock24xx.c is missing a omap2_init_clk_clkdm() in its
      omap2_clk_init() function.  Among other bad effects, this causes the
      OMAP hwmod layer to oops on boot.
      
      Thanks to Carlos Aguiar <carlos.aguiar@indt.org.br> and Stefano
      Panella <Stefano.Panella@csr.com> for reporting this bug.  Thanks to Tony
      Lindgren <tony@atomide.com> for N800 booting advice.
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      Cc: Carlos Aguiar <carlos.aguiar@indt.org.br>
      Cc: Stefano Panella <Stefano.Panella@csr.com>
      Cc: Tony Lindgren <tony@atomide.com>
      a7f20b26
  6. 25 7月, 2009 1 次提交
    • P
      OMAP2 clock: 2430 I2CHS uses non-standard CM_IDLEST register · 3dc21975
      Paul Walmsley 提交于
      OMAP2430 I2CHS CM_IDLEST bits are in CM_IDLEST1_CORE, but the CM_*CLKEN bits
      are in CM_{I,F}CLKEN2_CORE [1].  Fix by implementing a custom clkops
      .find_idlest function to return the correct slave IDLEST register.
      
      ...
      
      1. OMAP2430 Multimedia Device Package-on-Package (POP) Silicon Revision 2.1
         (Rev. V) Technical Reference Manual, tables 4-99 and 4-105.
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      3dc21975
  7. 26 5月, 2009 2 次提交
  8. 16 5月, 2009 1 次提交
  9. 13 5月, 2009 2 次提交
  10. 24 4月, 2009 2 次提交
    • P
      OMAP2/3 GPTIMER: allow system tick GPTIMER to be changed in board-*.c files · f248076c
      Paul Walmsley 提交于
      Add a function omap2_gp_clockevent_set_gptimer() for board-*.c files
      to use in .init_irq functions to configure the system tick GPTIMER.
      Practical choices at this point are GPTIMER1 or GPTIMER12.  Both of
      these timers are in the WKUP powerdomain, and so are unaffected by
      chip power management.  GPTIMER1 can use sys_clk as a source, for
      applications where a high-resolution timer is more important than
      power management.  GPTIMER12 has the special property that it has the
      secure 32kHz oscillator as its source clock, which may be less prone
      to glitches than the off-chip 32kHz oscillator.  But on HS devices, it
      may not be available for Linux use.
      
      It appears that most boards are fine with GPTIMER1, but BeagleBoard
      should use GPTIMER12 when using a 32KiHz timer source, due to hardware bugs
      in revisions B4 and below.  Modify board-omap3beagle.c to use GPTIMER12.
      
      This patch originally used a Kbuild config option to select the GPTIMER,
      but was changed to allow this to be specified in board-*.c files, per
      Tony's request.
      
      Kalle Vallo <kalle.valo@nokia.com> found a bug in an earlier version of
      this patch - thanks Kalle.
      
      Tested on Beagle rev B4 ES2.1, with and without CONFIG_OMAP_32K_TIMER, and
      3430SDP.
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      Cc: Kalle Valo <kalle.valo@nokia.com>
      f248076c
    • P
      OMAP2xxx clock: fix broken cpu_mask code · 15ca78f7
      Paul Walmsley 提交于
      Commit 8ad8ff65 breaks the OMAP2xxx
      cpu_mask code, which causes OMAP2xxx to panic on boot.  Fix by
      removing the cpu_mask auto variable and by changing CK_242X
      and CK_243X to use RATE_IN_242X/RATE_IN_243X.
      
      Resolves
      
      <1>Unable to handle kernel NULL pointer dereference at virtual address 0000000c
      <1>pgd = c0004000
      <1>[0000000c] *pgd=00000000
      Internal error: Oops: 5 [#1]
      Modules linked in:
      CPU: 0    Not tainted  (2.6.29-omap1 #32)
      PC is at omap2_clk_set_parent+0x104/0x120
      LR is at omap2_clk_set_parent+0x28/0x120
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      Tested-by: NJarkko Nikula <jarkko.nikula@nokia.com>
      Cc: Russell King <rmk+kernel@arm.linux.org.uk>
      15ca78f7
  11. 23 4月, 2009 1 次提交
    • P
      OMAP2xxx clock: pre-initialize struct clks early · c8088112
      Paul Walmsley 提交于
      Commit 3f0a820c breaks OMAP2xxx boot
      during initial propagate_rate() on osc_ck and sys_ck.  Fix by
      pre-initializing all struct clks before running any other clock init
      code.  Incorporates review comments from Russell King
      <rmk+kernel@arm.linux.org.uk>.
      
      Resolves
      
      <1>Unable to handle kernel NULL pointer dereference at virtual address 00000000
      <1>pgd = c0004000
      <1>[00000000] *pgd=00000000
      Internal error: Oops: 5 [#1]
      Modules linked in:
      CPU: 0    Not tainted  (2.6.29-omap1 #37)
      PC is at propagate_rate+0x10/0x60
      LR is at omap2_clk_init+0x30/0x218
      ...
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      Tested-by: NJarkko Nikula <jarkko.nikula@nokia.com>
      Cc: Russell King <rmk+kernel@arm.linux.org.uk>
      c8088112
  12. 20 2月, 2009 1 次提交
    • R
      [ARM] omap: add support for bypassing DPLLs · c0bf3132
      Russell King 提交于
      This roughly corresponds with OMAP commits: 7d06c48, 3241b19,
      88b5d9b, 18a5500, 9c909ac, 5c6497b, 8b1f0bd, 2ac1da8.
      
      For both OMAP2 and OMAP3, we note the reference and bypass clocks in
      the DPLL data structure.  Whenever we modify the DPLL rate, we first
      ensure that both the reference and bypass clocks are enabled.  Then,
      we decide whether to use the reference and DPLL, or the bypass clock
      if the desired rate is identical to the bypass rate, and program the
      DPLL appropriately.  Finally, we update the clock's parent, and then
      disable the unused clocks.
      
      This keeps the parents correctly balanced, and more importantly ensures
      that the bypass clock is running whenever we reprogram the DPLL.  This
      is especially important because the procedure for reprogramming the DPLL
      involves switching to the bypass clock.
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      c0bf3132
  13. 14 2月, 2009 1 次提交
    • R
      [ARM] omap: arrange for clock recalc methods to return the rate · 8b9dbc16
      Russell King 提交于
      linux-omap source commit 33d000c99ee393fe2042f93e8422f94976d276ce
      introduces a way to "dry run" clock changes before they're committed.
      However, this involves putting logic to handle this into each and
      every recalc function, and unfortunately due to the caching, led to
      some bugs.
      
      Solve both of issues by making the recalc methods always return the
      clock rate for the clock, which the caller decides what to do with.
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      8b9dbc16
  14. 09 2月, 2009 19 次提交