1. 06 10月, 2014 4 次提交
  2. 31 7月, 2014 1 次提交
  3. 08 7月, 2014 1 次提交
  4. 15 5月, 2014 1 次提交
  5. 24 4月, 2014 1 次提交
  6. 27 3月, 2014 1 次提交
  7. 23 2月, 2014 1 次提交
    • H
      libahci: Allow drivers to override start_engine · 039ece38
      Hans de Goede 提交于
      Allwinner A10 and A20 ARM SoCs have an AHCI sata controller which needs a
      special register to be poked before starting the DMA engine.
      
      This register gets reset on an ahci_stop_engine call, so there is no other
      place then ahci_start_engine where this poking can be done.
      
      This commit allows drivers to override ahci_start_engine behavior for use by
      the Allwinner AHCI driver (and potentially other drivers in the future).
      Signed-off-by: NHans de Goede <hdegoede@redhat.com>
      Signed-off-by: NTejun Heo <tj@kernel.org>
      039ece38
  8. 20 2月, 2014 2 次提交
  9. 14 2月, 2014 1 次提交
  10. 15 12月, 2013 1 次提交
  11. 27 10月, 2013 1 次提交
    • X
      ahci: disabled FBS prior to issuing software reset · 89dafa20
      xiangliang yu 提交于
      Tested with Marvell 88se9125, attached with one port mulitplier(5 ports)
      and one disk, we will get following boot log messages if using current
      code:
      
        ata8: SATA link up 6.0 Gbps (SStatus 133 SControl 330)
        ata8.15: Port Multiplier 1.2, 0x1b4b:0x9715 r160, 5 ports, feat 0x1/0x1f
        ahci 0000:03:00.0: FBS is enabled
        ata8.00: hard resetting link
        ata8.00: SATA link down (SStatus 0 SControl 330)
        ata8.01: hard resetting link
        ata8.01: SATA link down (SStatus 0 SControl 330)
        ata8.02: hard resetting link
        ata8.02: SATA link down (SStatus 0 SControl 330)
        ata8.03: hard resetting link
        ata8.03: SATA link up 6.0 Gbps (SStatus 133 SControl 133)
        ata8.04: hard resetting link
        ata8.04: failed to resume link (SControl 133)
        ata8.04: failed to read SCR 0 (Emask=0x40)
        ata8.04: failed to read SCR 0 (Emask=0x40)
        ata8.04: failed to read SCR 1 (Emask=0x40)
        ata8.04: failed to read SCR 0 (Emask=0x40)
        ata8.03: native sectors (2) is smaller than sectors (976773168)
        ata8.03: ATA-8: ST3500413AS, JC4B, max UDMA/133
        ata8.03: 976773168 sectors, multi 0: LBA48 NCQ (depth 31/32)
        ata8.03: configured for UDMA/133
        ata8.04: failed to IDENTIFY (I/O error, err_mask=0x100)
        ata8.15: hard resetting link
        ata8.15: SATA link up 6.0 Gbps (SStatus 133 SControl 330)
        ata8.15: Port Multiplier vendor mismatch '0x1b4b' != '0x133'
        ata8.15: PMP revalidation failed (errno=-19)
        ata8.15: hard resetting link
        ata8.15: SATA link up 6.0 Gbps (SStatus 133 SControl 330)
        ata8.15: Port Multiplier vendor mismatch '0x1b4b' != '0x133'
        ata8.15: PMP revalidation failed (errno=-19)
        ata8.15: limiting SATA link speed to 3.0 Gbps
        ata8.15: hard resetting link
        ata8.15: SATA link up 3.0 Gbps (SStatus 123 SControl 320)
        ata8.15: Port Multiplier vendor mismatch '0x1b4b' != '0x133'
        ata8.15: PMP revalidation failed (errno=-19)
        ata8.15: failed to recover PMP after 5 tries, giving up
        ata8.15: Port Multiplier detaching
        ata8.03: disabled
        ata8.00: disabled
        ata8: EH complete
      
      The reason is that current detection code doesn't follow AHCI spec:
      
      First,the port multiplier detection process look like this:
      
      	ahci_hardreset(link, class, deadline)
      	if (class == ATA_DEV_PMP) {
      		sata_pmp_attach(dev)	/* will enable FBS */
      		sata_pmp_init_links(ap, nr_ports);
      		ata_for_each_link(link, ap, EDGE) {
      			sata_std_hardreset(link, class, deadline);
      			if (link_is_online)	/* do soft reset */
      				ahci_softreset(link, class, deadline);
      		}
      	}
      But, according to chapter 9.3.9 in AHCI spec: Prior to issuing software
      reset, software shall clear PxCMD.ST to '0' and then clear PxFBS.EN to
      '0'.
      
      The patch test ok with kernel 3.11.1.
      
      tj: Patch white space contaminated, applied manually with trivial
          updates.
      Signed-off-by: NXiangliang Yu <yuxiangl@marvell.com>
      Signed-off-by: NTejun Heo <tj@kernel.org>
      Cc: stable@vger.kernel.org
      89dafa20
  12. 15 10月, 2013 2 次提交
    • L
      libahci: fix turning on LEDs in ahci_start_port() · fa070ee6
      Lukasz Dorau 提交于
      If EM Transmit bit is busy during init ata_msleep() is called.  It is
      wrong - msleep() should be used instead of ata_msleep(), because if EM
      Transmit bit is busy for one port, it will be busy for all other ports
      too, so using ata_msleep() causes wasting tries for another ports.
      
      The most common scenario looks like that now
      (six ports try to transmit a LED meaasege):
      - port #0 tries for the 1st time and succeeds
      - ports #1-5 try for the 1st time and sleeps
      - port #1 tries for the 2nd time and succeeds
      - ports #2-5 try for the 2nd time and sleeps
      - port #2 tries for the 3rd time and succeeds
      - ports #3-5 try for the 3rd time and sleeps
      - port #3 tries for the 4th time and succeeds
      - ports #4-5 try for the 4th time and sleeps
      - port #4 tries for the 5th time and succeeds
      - port #5 tries for the 5th time and sleeps
      
      At this moment port #5 wasted all its five tries and failed to
      initialize.  Because there are only 5 (EM_MAX_RETRY) tries available
      usually only five ports succeed to initialize. The sixth port and next
      ones usually will fail.
      
      If msleep() is used instead of ata_msleep() the first port succeeds to
      initialize in the first try and next ones usually succeed to
      initialize in the second try.
      
      tj: updated comment
      Signed-off-by: NLukasz Dorau <lukasz.dorau@intel.com>
      Signed-off-by: NTejun Heo <tj@kernel.org>
      fa070ee6
    • R
      ahci: imx: setup power saving methods · 8b789d89
      Richard Zhu 提交于
      In order to save power consumption as much as possible.
      
      * Disable sata phy internal pll reference clock when sysetem enter
        into suspend mode, enable it after resume.
      
      * Setup module parameter used to enable imx ahci test power down
        mode(PDDQ) or not, when there is no device detected on the port
      
      * minor modifications:
        - The format of the copyright is changed, because that the original
          one can't pass fsl internal patch reivew without the character
          '(c)'.
        - Exports ahci_platform_ops and ahci_error_handler().
      
      NOTE:
      * The hot-plug can't be supported when PDDQ mode is ever enabled.
      
      * module parameter usage how-to:
        - default: enable PDDQ mode when no device detected.
        - add "ahci-imx.hotplug=1" into kernel command line if your don't
          want to enable PDDQ mode when no device detected on the port.
      
      tj: Slightly updated description and comments.
      Signed-off-by: NRichard Zhu <r65037@freescale.com>
      Signed-off-by: NTejun Heo <tj@kernel.org>
      8b789d89
  13. 23 9月, 2013 1 次提交
  14. 25 6月, 2013 1 次提交
  15. 10 6月, 2013 1 次提交
  16. 07 6月, 2013 1 次提交
  17. 22 5月, 2013 1 次提交
  18. 15 5月, 2013 1 次提交
  19. 25 1月, 2013 1 次提交
    • A
      AHCI: Support multiple MSIs · 5ca72c4f
      Alexander Gordeev 提交于
      Take advantage of multiple MSIs implementation on x86 - on
      systems with IRQ remapping AHCI ports not only get assigned
      separate MSI vectors - but also separate IRQs. As result,
      interrupts generated by different ports could be serviced on
      different CPUs rather than on a single one.
      
      In cases when number of allocated MSIs is less than requested
      the Sharing Last MSI mode does not get used, no matter
      implemented in hardware or not. Instead, the driver assumes the
      advantage of multiple MSIs is negated and falls back to the
      single MSI mode as if MRSM bit was set (some Intel chips
      implement this strategy anyway - MRSM bit gets set even if the
      number of allocated MSIs exceeds the number of implemented ports).
      Signed-off-by: NAlexander Gordeev <agordeev@redhat.com>
      Acked-by: NJeff Garzik <jgarzik@redhat.com>
      Cc: Bjorn Helgaas <bhelgaas@google.com>
      Cc: Suresh Siddha <suresh.b.siddha@intel.com>
      Cc: Yinghai Lu <yinghai@kernel.org>
      Cc: Matthew Wilcox <willy@linux.intel.com>
      Cc: Linus Torvalds <torvalds@linux-foundation.org>
      Cc: Andrew Morton <akpm@linux-foundation.org>
      Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Link: http://lkml.kernel.org/r/15bf7ee314dd55f21ec7d2a01c47613cd8190a7c.1353324359.git.agordeev@redhat.comSigned-off-by: NIngo Molnar <mingo@kernel.org>
      5ca72c4f
  20. 15 1月, 2013 1 次提交
  21. 14 12月, 2012 1 次提交
  22. 13 9月, 2012 1 次提交
    • S
      ahci: implement aggressive SATA device sleep support · 65fe1f0f
      Shane Huang 提交于
      Device Sleep is a feature as described in AHCI 1.3.1 Technical Proposal.
      This feature enables an HBA and SATA storage device to enter the DevSleep
      interface state, enabling lower power SATA-based systems.
      
      Aggressive Device Sleep enables the HBA to assert the DEVSLP signal as
      soon as there are no commands outstanding to the device and the port
      specific Device Sleep idle timer has expired. This enables autonomous
      entry into the DevSleep interface state without waiting for software
      in power sensitive systems.
      
      This patch enables Aggressive Device Sleep only if both host controller
      and device support it.
      
      Tested on AMD reference board together with Device Sleep supported device
      sample.
      Signed-off-by: NShane Huang <shane.huang@amd.com>
      Reviewed-by: NAaron Lu <aaron.lwe@gmail.com>
      Signed-off-by: NJeff Garzik <jgarzik@redhat.com>
      65fe1f0f
  23. 18 8月, 2012 1 次提交
  24. 14 3月, 2012 1 次提交
    • B
      ahci: add AHCI_HFLAG_DELAY_ENGINE host flag · 66583c9f
      Brian Norris 提交于
      The following commit was intended to fix problems with specific AHCI
      controller(s) that would become bricks if the AHCI specification was not
      followed strictly (that is, if ahci_start_engine() was called while the
      controller was in the wrong state):
      
          commit 7faa33da
          ahci: start engine only during soft/hard resets
      
      However, some devices currently have issues with that fix, so we must
      implement a flag that delays the ahci_start_engine() call only for specific
      controllers.
      
      This commit simply introduces the flag, without enabling it in any driver.
      
      Note that even when AHCI_HFLAG_DELAY_ENGINE is not enabled, this patch does
      not constitue a full revert to commit 7faa33da; there is still a change in
      behavior to the ahci_port_suspend() failure path.
      Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
      Signed-off-by: NJeff Garzik <jgarzik@redhat.com>
      Cc: stable@kernel.org
      66583c9f
  25. 09 1月, 2012 1 次提交
    • T
      ahci: start engine only during soft/hard resets · 7faa33da
      Tejun Heo 提交于
      This is another attempt at fixing the same problem that 270dac35
      (libata: ahci_start_engine compliant to AHCI spec) tried to solve.
      Unfortunately, 270dac35 created regressions for a lot more common
      controllers and got reverted.
      
      This specific AHCI IP block becomes a brick if the DMA engine is
      started while DRQ is set.  It is not possible to avoid the condition
      completely but the most common occurrence is caused by spurious use of
      ahci_start_engine() from ahci_start_port() during init sequence.
      
      DMA engine is started after both soft and hard resets and
      ahci_start_port() is always followed by resets, so there is no reason
      to start DMA engine from ahci_start_port().
      
      This patch removes ahci_start_engine() invocation from
      ahci_start_port().  This change makes failure path of
      ahci_port_suspend() leave engine stopped without following resets.
      This is resolved by replacing ahci_start_port() call with
      ata_port_freeze() which forces resets afterwards, which is the better
      behavior anyway.
      Signed-off-by: NTejun Heo <tj@kernel.org>
      Reported-by: NBrian Norris <computersforpeace@gmail.com>
      Reported-by: NJian Peng <jipeng2005@gmail.com>
      Signed-off-by: NJeff Garzik <jgarzik@redhat.com>
      7faa33da
  26. 24 7月, 2011 3 次提交
    • Y
      ahci: move ahci_sb600_softreset to libahci.c and rename it · 345347c5
      Yuan-Hsin Chen 提交于
      ahci_sb600_softreset was in ahci.c. This function is used
      to fix soft reset failure and renames as ahci_pmp_retry_softreset
      in libahci.c.
      Signed-off-by: NYuan-Hsin Chen <yhchen@faraday-tech.com>
      Signed-off-by: NJeff Garzik <jgarzik@pobox.com>
      345347c5
    • J
      ata: Convert ata_<foo>_printk(KERN_<LEVEL> to ata_<foo>_<level> · a9a79dfe
      Joe Perches 提交于
      Saves text by removing nearly duplicated text format strings by
      creating ata_<foo>_printk functions and printf extension %pV.
      
      ata defconfig size shrinks ~5% (~8KB), allyesconfig ~2.5% (~13KB)
      
      Format string duplication comes from:
      
       #define ata_link_printk(link, lv, fmt, args...) do { \
             if (sata_pmp_attached((link)->ap) || (link)->ap->slave_link)    \
                     printk("%sata%u.%02u: "fmt, lv, (link)->ap->print_id,   \
                            (link)->pmp , ##args); \
             else \
                     printk("%sata%u: "fmt, lv, (link)->ap->print_id , ##args); \
             } while(0)
      
      Coalesce long formats.
      
      $ size drivers/ata/built-in.*
         text	   data	    bss	    dec	    hex	filename
       544969	  73893	 116584	 735446	  b38d6	drivers/ata/built-in.allyesconfig.ata.o
       558429	  73893	 117864	 750186	  b726a	drivers/ata/built-in.allyesconfig.dev_level.o
       141328	  14689	   4220	 160237	  271ed	drivers/ata/built-in.defconfig.ata.o
       149567	  14689	   4220	 168476	  2921c	drivers/ata/built-in.defconfig.dev_level.o
      Signed-off-by: NJoe Perches <joe@perches.com>
      Signed-off-by: NJeff Garzik <jgarzik@pobox.com>
      a9a79dfe
    • J
      ata: Convert dev_printk(KERN_<LEVEL> to dev_<level>( · a44fec1f
      Joe Perches 提交于
      Saves a bit of text as the call takes fewer args.
      
      Coalesce a few formats.
      Convert a few bare printks to pr_cont.
      
      $ size drivers/ata/built-in.o*
         text	   data	    bss	    dec	    hex	filename
       558429	  73893	 117864	 750186	  b726a	drivers/ata/built-in.o.allyesconfig.new
       559574	  73893	 117888	 751355	  b76fb	drivers/ata/built-in.o.allyesconfig.old
       149567	  14689	   4220	 168476	  2921c	drivers/ata/built-in.o.defconfig.new
       149851	  14689	   4220	 168760	  29338	drivers/ata/built-in.o.defconfig.old
      Signed-off-by: NJoe Perches <joe@perches.com>
      Signed-off-by: NJeff Garzik <jgarzik@pobox.com>
      a44fec1f
  27. 30 6月, 2011 1 次提交
    • L
      ahci: change 'masking port_map' printk to KERN_WARNING level · 49743170
      Linus Torvalds 提交于
      It's not so much an error as a warning about normal Marvell crazines.
      So don't use KERN_ERR that ends up spamming the console even in quiet
      mode, it's not _that_ critical.
      
      Explained by Jeff:
      
       "Long explanation, it's a mess:
      
        Marvell took standard AHCI, and bastardized it to include a weird mode
        whereby PATA devices appear inside the AHCI DMA and interrupt
        infrastructure you're familiar with.
      
        So, PATA devices appear via pata_marvell driver, using basic legacy
        IDE programming interface.  But SATA devices, which might also be
        attached to this chip, either work in under-performing mode or
        simply don't work at all (e.g.  newer 6 Gbps devices or port
        multiplier attachments, NCQ, ...)
      
        On the other hand, 'ahci' driver loads and works with the chip's
        attached SATA devices quite beautifully, but is completely unable to
        drive any attached PATA devices, due to the Marvell-specific
        PATA-under-AHCI interface.
      
        The "masking port_map 0x7 -> 0x3" message is the ahci driver "hiding"
        the PATA port(s) from itself, making sure it will only drive the SATA
        ports it knows how to drive."
      Acked-by: NJeff Garzik <jgarzik@redhat.com>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      49743170
  28. 15 5月, 2011 1 次提交
  29. 24 4月, 2011 3 次提交
  30. 06 1月, 2011 1 次提交
  31. 22 10月, 2010 1 次提交
    • T
      libahci: fix result_tf handling after an ATA PIO data-in command · 6ad60195
      Tejun Heo 提交于
      ATA devices don't send D2H Reg FIS after an successful ATA PIO data-in
      command.  The host is supposed to take the TF and E_Status of the
      preceding PIO Setup FIS.  Update ahci_qc_fill_rtf() such that it takes
      TF + E_Status from PIO Setup FIS after a successful ATA PIO data-in
      command.
      
      Without this patch, result_tf for such a command is filled with the
      content of the previous D2H Reg FIS which belongs to a previous
      command, which can make the command incorrectly seen as failed.
      
      * Patch updated to grab the whole TF + E_Status from PIO Setup FIS
        instead of just E_Status as suggested by Robert Hancock.
      Signed-off-by: NTejun Heo <tj@kernel.org>
      Reported-by: NMark Lord <kernel@teksavvy.com>
      Cc: Robert Hancock <hancockrwd@gmail.com>
      Cc: stable@kernel.org
      Signed-off-by: NJeff Garzik <jgarzik@redhat.com>
      6ad60195