- 13 2月, 2019 1 次提交
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由 Alex Deucher 提交于
Don't warn or fail if it's missing. v2: handle xgmi case more gracefully. v3: handle older kernels properly Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com> Tested-by: NJames Zhu <James.Zhu@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 15 12月, 2018 1 次提交
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由 Emily Deng 提交于
Currently driver only psp v11 support vmr. v2: squash in unused variable removal (Alex) Signed-off-by: NEmily Deng <Emily.Deng@amd.com> Reviewed-by: NXiangliang Yu <Xiangliang.Yu@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 08 12月, 2018 2 次提交
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由 Xiangliang Yu 提交于
PSP ring need to be destroy before starting reinit for vf. This patche move it from hypervisor driver into guest. Signed-off-by: NXiangliang Yu <Xiangliang.Yu@amd.com> Signed-off-by: NFrank Min <Frank.Min@amd.com> Acked-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Xiangliang Yu 提交于
PSP only support VMR ring for SRIOV vf since v45 and all commands will be send to VMR ring for executing. VMR ring use C2PMSG 101 ~ 103 instead of C2PMSG 64 ~ 71. Signed-off-by: NXiangliang Yu <Xiangliang.Yu@amd.com> Acked-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 07 11月, 2018 4 次提交
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由 Hawking Zhang 提交于
Setup and tear down xgmi as part of psp. v2: - make psp_xgmi_terminate static - squash in: drm/amdgpu: only issue xgmi cmd when it is enabled drm/amdgpu/psp: terminate xgmi ta in suspend and hw_fini phase Signed-off-by: NHawking Zhang <Hawking.Zhang@amd.com> Acked-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: NHuang Rui <ray.huang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Hawking Zhang 提交于
psp_xgmi_invoke is the helper function to issue ta cmd to firmware Signed-off-by: NHawking Zhang <Hawking.Zhang@amd.com> Acked-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: NHuang Rui <ray.huang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Hawking Zhang 提交于
Add helper functions for the psp xgmi ta. Signed-off-by: NHawking Zhang <Hawking.Zhang@amd.com> Acked-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: NHuang Rui <ray.huang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Hawking Zhang 提交于
Add ucode handling for psp xgmi ta firmware. Signed-off-by: NHawking Zhang <Hawking.Zhang@amd.com> Acked-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 06 11月, 2018 1 次提交
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由 Hawking Zhang 提交于
Hard-code submission fence is not a sustainable way as there is more and more run-time psp kernel mode submission from driver to fw Signed-off-by: NHawking Zhang <Hawking.Zhang@amd.com> Acked-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: NHuang Rui <ray.huang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 11 10月, 2018 1 次提交
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由 Rex Zhu 提交于
The variable clean is unnecessary. Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NRex Zhu <Rex.Zhu@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 14 9月, 2018 2 次提交
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由 Alex Deucher 提交于
Treat them all as Raven rather than adding a new picasso asic type. This simplifies a lot of code and also handles the case of rv2 chips with the 0x15d8 pci id. It also fixes dmcu fw handling for picasso. Acked-by: NHuang Rui <ray.huang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Likun Gao 提交于
Same as raven for now. Signed-off-by: NLikun Gao <Likun.Gao@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: NHuang Rui <ray.huang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 28 8月, 2018 3 次提交
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由 Huang Rui 提交于
The status field must be 0 after FW is loaded. Signed-off-by: NHuang Rui <ray.huang@amd.com> Acked-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Feifei Xu 提交于
Enlarge the PSP TMR SIZE to 4M for dual UVD fw front-door loading. Signed-off-by: NFeifei Xu <Feifei.Xu@amd.com> Reviewed-by: NEvan Quan <evan.quan@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Feifei Xu 提交于
Add psp 11.0 code for vega20 and enable it. PSP is the security processor for the GPU. It handles firmware loading and GPU resets among other things. v2: whitespace fix, enable support, adjust reg includes (Alex) Signed-off-by: NFeifei Xu <Feifei.Xu@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: NHuang Rui <ray.huang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 14 8月, 2018 1 次提交
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由 James Zhu 提交于
Update tmr mc address with firmware loading address which is returned from PSP firmware Signed-off-by: NJames Zhu <James.Zhu@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Acked-by: NHuang Rui <ray.huang@amd.com> Reviewed-by: NLikun Gao <Likun.Gao@amd.com> Signed-off-by: NLikun Gao <Likun.Gao@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
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- 17 5月, 2018 1 次提交
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由 Feifei Xu 提交于
The same as vega10 for now. Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NFeifei Xu <Feifei.Xu@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 16 5月, 2018 1 次提交
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由 Huang Rui 提交于
When system uses fw direct loading, then psp context structure won't be initiliazed. And it is also unable to execute mode reset. [ 434.601474] amdgpu 0000:0c:00.0: GPU reset begin! [ 434.694326] amdgpu 0000:0c:00.0: GPU reset [ 434.743152] BUG: unable to handle kernel NULL pointer dereference at 0000000000000058 [ 434.838474] IP: psp_gpu_reset+0xc/0x30 [amdgpu] [ 434.893532] PGD 406ed9067 [ 434.893533] P4D 406ed9067 [ 434.926376] PUD 400b46067 [ 434.959217] PMD 0 [ 435.033379] Oops: 0000 [#1] SMP [ 435.072573] Modules linked in: amdgpu(OE) chash(OE) gpu_sched(OE) ttm(OE) drm_kms_helper(OE) drm(OE) fb_sys_fops syscopyarea sysfillrect sysimgblt rpcsec_gss_krb5 auth_rpcgss nfsv4 nfs lockd grace fscache snd_hda_codec_realtek snd_hda_codec_generic snd_hda_codec_hdmi snd_hda_intel snd_hda_codec snd_hda_core snd_hwdep snd_pcm edac_mce_amd snd_seq_midi snd_seq_midi_event kvm_amd snd_rawmidi kvm irqbypass crct10dif_pclmul crc32_pclmul snd_seq ghash_clmulni_intel snd_seq_device pcbc snd_timer eeepc_wmi aesni_intel snd asus_wmi aes_x86_64 sparse_keymap crypto_simd glue_helper joydev soundcore wmi_bmof cryptd video i2c_piix4 shpchp 8250_dw i2c_designware_platform mac_hid i2c_designware_core sunrpc parport_pc ppdev lp parport autofs4 hid_generic igb usbhid dca ptp mxm_wmi pps_core ahci hid i2c_algo_bit [ 435.931754] libahci wmi Signed-off-by: NHuang Rui <ray.huang@amd.com> Reviewed-by: NEvan Quan <evan.quan@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 12 4月, 2018 1 次提交
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由 Huang Rui 提交于
When system uses fw direct loading, then psp context structure won't be initiliazed. And it is also unable to execute mode reset. [ 434.601474] amdgpu 0000:0c:00.0: GPU reset begin! [ 434.694326] amdgpu 0000:0c:00.0: GPU reset [ 434.743152] BUG: unable to handle kernel NULL pointer dereference at 0000000000000058 [ 434.838474] IP: psp_gpu_reset+0xc/0x30 [amdgpu] [ 434.893532] PGD 406ed9067 [ 434.893533] P4D 406ed9067 [ 434.926376] PUD 400b46067 [ 434.959217] PMD 0 [ 435.033379] Oops: 0000 [#1] SMP [ 435.072573] Modules linked in: amdgpu(OE) chash(OE) gpu_sched(OE) ttm(OE) drm_kms_helper(OE) drm(OE) fb_sys_fops syscopyarea sysfillrect sysimgblt rpcsec_gss_krb5 auth_rpcgss nfsv4 nfs lockd grace fscache snd_hda_codec_realtek snd_hda_codec_generic snd_hda_codec_hdmi snd_hda_intel snd_hda_codec snd_hda_core snd_hwdep snd_pcm edac_mce_amd snd_seq_midi snd_seq_midi_event kvm_amd snd_rawmidi kvm irqbypass crct10dif_pclmul crc32_pclmul snd_seq ghash_clmulni_intel snd_seq_device pcbc snd_timer eeepc_wmi aesni_intel snd asus_wmi aes_x86_64 sparse_keymap crypto_simd glue_helper joydev soundcore wmi_bmof cryptd video i2c_piix4 shpchp 8250_dw i2c_designware_platform mac_hid i2c_designware_core sunrpc parport_pc ppdev lp parport autofs4 hid_generic igb usbhid dca ptp mxm_wmi pps_core ahci hid i2c_algo_bit [ 435.931754] libahci wmi Signed-off-by: NHuang Rui <ray.huang@amd.com> Reviewed-by: NEvan Quan <evan.quan@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 22 3月, 2018 1 次提交
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由 Alex Deucher 提交于
Same as vega10 for now. Acked-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: NFeifei Xu <Feifei.Xu@amd.com>
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- 15 3月, 2018 1 次提交
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由 Alex Deucher 提交于
We already checked and returned early in most of the IP functions, fill in the rest as well. Reviewed-by: NRex Zhu <rezhu@amd.com> Acked-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 20 2月, 2018 2 次提交
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由 Alex Deucher 提交于
The IP soft reset interface is for per IP reset but it was being abused for adapter reset on soc15 asics. Adjust the interface to make it explicit. Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
This way we can make all of the IP specific functions static, and we only need a single entry point into the PSP IP modules. Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 05 12月, 2017 2 次提交
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由 Monk Liu 提交于
for SR-IOV when doing gpu reset this routine shouldn't do resource allocating otherwise memory leak Signed-off-by: NMonk Liu <Monk.Liu@amd.com> Acked-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Monk Liu 提交于
since now gpu reset is unified with gpu_recover for both bare-metal and SR-IOV: 1)rename in_sriov_reset to in_gpu_reset 2)move lock_reset from adev->virt to adev Signed-off-by: NMonk Liu <Monk.Liu@amd.com> Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 29 11月, 2017 1 次提交
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由 Alex Deucher 提交于
This reverts commit 446947b4. this patch is incorrrect, amdgpu_ucode_bo_fini always called after gfx_hw_fini. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 21 11月, 2017 1 次提交
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由 Wang Hongcheng 提交于
If gfx_v8_0_hw_fini is called after amdgpu_ucode_fini_bo, we will hit KCQ disabled failed. Let amdgpu_ucode_fini_bo run after gfx_v8_0_hw_fini. BUG: SWDEV-135547 Reviewed-by: NRex Zhu <Rex.Zhu@amd.com> Signed-off-by: NWang Hongcheng <Annie.Wang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 20 10月, 2017 1 次提交
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由 Rex Zhu 提交于
fw ucode is corrupted after vf flr by PSP so ucode_init() is a must in psp_hw_init othewise KIQ/KCQ enabling will fail Revert "drm/amdgpu: refine code delete duplicated error handling" This reverts commit e57b87ff828f95efe992468e6d18c2c059b27aa9. Revert "drm/amdgpu: move amdgpu_ucode_init_bo to amdgpu_device.c" This reverts commit 815b8f8595148d06a64d2ce4282e8e80dfcb02f1. Reviewed-by: NMonk Liu <monk.liu@amd.com> Signed-off-by: NRex Zhu <Rex.Zhu@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 29 9月, 2017 1 次提交
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由 Rex Zhu 提交于
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NRex Zhu <Rex.Zhu@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 27 9月, 2017 3 次提交
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由 Monk Liu 提交于
this fix memory leak due to request_firmware after driver unloaded v2: release gmc firmware for gmc6/7/8 as well Signed-off-by: NMonk Liu <Monk.Liu@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Monk Liu 提交于
At least for SRIOV we found reload PSP fw during gpu reset cause PSP hang. Signed-off-by: NMonk Liu <Monk.Liu@amd.com> Acked-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Ken Wang 提交于
V2 Signed-off-by: NKen Wang <Ken.Wang@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Acked-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 13 9月, 2017 3 次提交
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由 Evan Quan 提交于
- v2: share code with CHIP_VEGA10 case Signed-off-by: NEvan Quan <evan.quan@amd.com> Reviewed-by: NJunwei Zhang <Jerry.Zhang@amd.com> Acked-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NHuang Rui <ray.huang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Evan Quan 提交于
Otherwise, the ring will fail to create on next resume. Signed-off-by: NEvan Quan <evan.quan@amd.com> Reviewed-by: NJunwei Zhang <Jerry.Zhang@amd.com> Acked-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NHuang Rui <ray.huang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Evan Quan 提交于
- v2: reuse the ring stop api in ring destory Signed-off-by: NEvan Quan <evan.quan@amd.com> Reviewed-by: NJunwei Zhang <Jerry.Zhang@amd.com> Acked-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NHuang Rui <ray.huang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 26 7月, 2017 5 次提交
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由 Junwei Zhang 提交于
Now asd firmware is not ready for psp v10, will enable it when it's available Signed-off-by: NJunwei Zhang <Jerry.Zhang@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Zhang, Jerry 提交于
v2: fix the SOS loading failure for PSP v3.1 Signed-off-by: NJunwei Zhang <Jerry.Zhang@amd.com> Cc: stable@vger.kernel.org Acked-by: Alex Deucher <alexander.deucher@amd.com> (v1) Acked-by: Huang Rui <ray.huang@amd.com> (v1) Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Junwei Zhang 提交于
Signed-off-by: NJunwei Zhang <Jerry.Zhang@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Junwei Zhang 提交于
Signed-off-by: NJunwei Zhang <Jerry.Zhang@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Junwei Zhang 提交于
Signed-off-by: NJunwei Zhang <Jerry.Zhang@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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