1. 13 2月, 2019 1 次提交
  2. 09 2月, 2019 2 次提交
  3. 06 2月, 2019 3 次提交
  4. 05 2月, 2019 5 次提交
  5. 01 2月, 2019 3 次提交
  6. 31 1月, 2019 1 次提交
    • C
      drm/amdgpu: Transfer fences to dmabuf importer · 6e11ea9d
      Chris Wilson 提交于
      amdgpu only uses shared-fences internally, but dmabuf importers rely on
      implicit write hazard tracking via the reservation_object.fence_excl.
      For example, the importer use the write hazard for timing a page flip to
      only occur after the exporter has finished flushing its write into the
      surface. As such, on exporting a dmabuf, we must either flush all
      outstanding fences (for we do not know which are writes and should have
      been exclusive) or alternatively create a new exclusive fence that is
      the composite of all the existing shared fences, and so will only be
      signaled when all earlier fences are signaled (ensuring that we can not
      be signaled before the completion of any earlier write).
      
      v2: reservation_object is already locked by amdgpu_bo_reserve()
      v3: Replace looping with get_fences_rcu and special case the promotion
      of a single shared fence directly to an exclusive fence, bypassing the
      fence array.
      v4: Drop the fence array ref after assigning to reservation_object
      
      Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107341
      Testcase: igt/amd_prime/amd-to-i915
      References: 8e94a46c ("drm/amdgpu: Attach exclusive fence to prime exported bo's. (v5)")
      Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
      Cc: Alex Deucher <alexander.deucher@amd.com>
      Cc: "Christian König" <christian.koenig@amd.com>
      Reviewed-by: N"Christian König" <christian.koenig@amd.com>
      Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
      6e11ea9d
  7. 29 1月, 2019 7 次提交
  8. 25 1月, 2019 6 次提交
    • A
      drm/msm: avoid unused function warning · a840f690
      Arnd Bergmann 提交于
      drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c:368:13: error: 'dpu_plane_danger_signal_ctrl' defined but not used [-Werror=unused-function]
      
      Fixes: 7b2e7ade ("drm/msm/dpu: Make dpu_plane_danger_signal_ctrl void")
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      Signed-off-by: NAnders Roxell <anders.roxell@linaro.org>
      Signed-off-by: NRob Clark <robdclark@gmail.com>
      a840f690
    • J
      drm/msm: Add __printf verification · 023014e7
      Joe Perches 提交于
      Add a few __printf attribute specifiers to routines that
      could use them.
      Signed-off-by: NJoe Perches <joe@perches.com>
      Signed-off-by: NRob Clark <robdclark@gmail.com>
      023014e7
    • D
      drm/msm: Fix A6XX support for opp-level · a3c5e2cd
      Douglas Anderson 提交于
      The bindings for Qualcomm opp levels changed after being Acked but
      before landing.  Thus the code in the GPU driver that was relying on
      the old bindings is now broken.
      
      Let's change the code to match the new bindings by adjusting the old
      string 'qcom,level' to the new string 'opp-level'.  See the patch
      ("dt-bindings: opp: Introduce opp-level bindings").
      
      NOTE: we will do additional cleanup to totally remove the string from
      the code and use the new dev_pm_opp_get_level() but we'll do it in a
      future patch.  This will facilitate getting the important code fix in
      sooner without having to deal with cross-maintainer dependencies.
      
      This patch needs to land before the patch ("arm64: dts: sdm845: Add
      gpu and gmu device nodes") since if a tree contains the device tree
      patch but not this one you'll get a crash at bootup.
      
      Fixes: 4b565ca5 ("drm/msm: Add A6XX device support")
      Signed-off-by: NDouglas Anderson <dianders@chromium.org>
      Reviewed-by: NJordan Crouse <jcrouse@codeaurora.org>
      Signed-off-by: NRob Clark <robdclark@gmail.com>
      a3c5e2cd
    • R
      drm/msm: honor GPU_READONLY flag · bbc2cd07
      Rob Clark 提交于
      Signed-off-by: NRob Clark <robdclark@gmail.com>
      bbc2cd07
    • J
      drm/msm/gpu: Remove hardcoded interrupt name · 878411ae
      Jordan Crouse 提交于
      Every GPU core only has one interrupt so there isn't any
      value in looking up the interrupt by name. Remove the name (which
      is legacy anyway) and use platform_get_irq() instead.
      Signed-off-by: NJordan Crouse <jcrouse@codeaurora.org>
      Reviewed-by: NDouglas Anderson <dianders@chromium.org>
      Signed-off-by: NRob Clark <robdclark@gmail.com>
      878411ae
    • A
      drm/msm/gpu: fix building without debugfs · c878a628
      Arnd Bergmann 提交于
      When debugfs is disabled, but coredump is turned on, the adreno driver fails to build:
      
      drivers/gpu/drm/msm/adreno/a3xx_gpu.c:460:4: error: 'struct msm_gpu_funcs' has no member named 'show'
         .show = adreno_show,
          ^~~~
      drivers/gpu/drm/msm/adreno/a3xx_gpu.c:460:11: note: (near initialization for 'funcs.base')
      drivers/gpu/drm/msm/adreno/a3xx_gpu.c:460:11: error: initialization of 'void (*)(struct msm_gpu *, struct msm_gem_submit *, struct msm_file_private *)' from incompatible pointer type 'void (*)(struct msm_gpu *, struct msm_gpu_state *, struct drm_printer *)' [-Werror=incompatible-pointer-types]
      drivers/gpu/drm/msm/adreno/a3xx_gpu.c:460:11: note: (near initialization for 'funcs.base.submit')
      drivers/gpu/drm/msm/adreno/a4xx_gpu.c:546:4: error: 'struct msm_gpu_funcs' has no member named 'show'
      drivers/gpu/drm/msm/adreno/a5xx_gpu.c:1460:4: error: 'struct msm_gpu_funcs' has no member named 'show'
      drivers/gpu/drm/msm/adreno/a6xx_gpu.c:769:4: error: 'struct msm_gpu_funcs' has no member named 'show'
      drivers/gpu/drm/msm/msm_gpu.c: In function 'msm_gpu_devcoredump_read':
      drivers/gpu/drm/msm/msm_gpu.c:289:12: error: 'const struct msm_gpu_funcs' has no member named 'show'
      
      Adjust the #ifdef to make it build again.
      
      Fixes: c0fec7f5 ("drm/msm/gpu: Capture the GPU state on a GPU hang")
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      Signed-off-by: NRob Clark <robdclark@gmail.com>
      c878a628
  9. 24 1月, 2019 1 次提交
  10. 23 1月, 2019 1 次提交
  11. 22 1月, 2019 2 次提交
  12. 18 1月, 2019 2 次提交
  13. 17 1月, 2019 1 次提交
  14. 16 1月, 2019 3 次提交
  15. 15 1月, 2019 2 次提交