- 12 2月, 2021 1 次提交
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由 Subbaraya Sundeep 提交于
NIX uses unique channel numbers to identify the packet sources/sinks like CGX,LBK and SDP. The channel numbers assigned to each block are hardwired in CN9xxx silicon. The fixed channel numbers in CN9xxx are: 0x0 | a << 8 | b - LBK(0..3)_CH(0..63) 0x0 | a << 8 - Reserved 0x700 | a - SDP_CH(0..255) 0x800 | a << 8 | b << 4 | c - CGX(0..7)_LMAC(0..3)_CH(0..15) All the channels in the above fixed enumerator(with maximum number of blocks) are not required since some chips have less number of blocks. For CN10K silicon the channel numbers need to be programmed by software in each block with the base channel number and range of channels. This patch calculates and assigns the channel numbers to efficiently distribute the channel number range(0-4095) among all the blocks. The assignment is made based on the actual number of blocks present and also contiguously leaving no holes. The channel numbers remaining after the math are used as new CPT replay channels present in CN10K. Also since channel numbers are not fixed the transmit channel link number needed by AF consumers is calculated by AF and sent along with nix_lf_alloc mailbox response. Signed-off-by: NSubbaraya Sundeep <sbhatta@marvell.com> Signed-off-by: NGeetha sowjanya <gakula@marvell.com> Signed-off-by: NSunil Goutham <sgoutham@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 18 11月, 2020 6 次提交
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由 Subbaraya Sundeep 提交于
Since mailbox message for installing flows is in place, remove the RXVLAN_ALLOC mbox message which is redundant. Signed-off-by: NSubbaraya Sundeep <sbhatta@marvell.com> Signed-off-by: NSunil Goutham <sgoutham@marvell.com> Signed-off-by: NNaveen Mamindlapalli <naveenm@marvell.com> Signed-off-by: NJakub Kicinski <kuba@kernel.org>
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由 Naveen Mamindlapalli 提交于
This patch introduces new mailbox mesages to retrieve a given MCAM entry or base flow steering rule of a VF installed by its parent PF. This helps while updating the existing MCAM rules with out re-framing the whole mailbox request again. The INSTALL FLOW mailbox consumer can read-modify-write the existing entry. Similarly while installing new flow rules for a VF, the base flow steering rule match creteria is copied to the new flow rule and the deltas are appended to the new rule. Signed-off-by: NNaveen Mamindlapalli <naveenm@marvell.com> Co-developed-by: NVamsi Attunuru <vattunuru@marvell.com> Signed-off-by: NVamsi Attunuru <vattunuru@marvell.com> Signed-off-by: NSunil Goutham <sgoutham@marvell.com> Signed-off-by: NJakub Kicinski <kuba@kernel.org>
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由 Naveen Mamindlapalli 提交于
This patch adds support for ndo_set_vf_mac, ndo_set_vf_vlan and ndo_get_vf_config handlers. The traffic redirection based on the VF mac address or vlan id is done by installing MCAM rules. Reserved RX_VTAG_TYPE7 in each NIXLF for VF VLAN which strips the VLAN tag from ingress VLAN traffic. The NIX PF allocates two MCAM entries for VF VLAN feature, one used for ingress VTAG strip and another entry for egress VTAG insertion. This patch also updates the MAC address in PF installed VF VLAN rule upon receiving nix_lf_start_rx mbox request for VF since Administrative Function driver will assign a valid MAC addr in nix_lf_start_rx function. Signed-off-by: NNaveen Mamindlapalli <naveenm@marvell.com> Co-developed-by: NTomasz Duszynski <tduszynski@marvell.com> Signed-off-by: NTomasz Duszynski <tduszynski@marvell.com> Signed-off-by: NSunil Goutham <sgoutham@marvell.com> Signed-off-by: NHariprasad Kelam <hkelam@marvell.com> Signed-off-by: NJakub Kicinski <kuba@kernel.org>
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由 Subbaraya Sundeep 提交于
Added new mailbox messages to install and delete MCAM rules. These mailbox messages will be used for adding/deleting ethtool n-tuple filters by NIX PF. The installed MCAM rules are stored in a list that will be traversed later to delete the MCAM entries when the interface is brought down or when PCIe FLR is received. The delete mailbox supports deleting a single MCAM entry or range of entries or all the MCAM entries owned by the pcifunc. Each MCAM entry can be associated with a HW match stat entry if the mailbox requester wants to check the hit count for debugging. Modified adding default unicast DMAC match rule using install flow API. The default unicast DMAC match entry installed by Administrative Function is saved and can be changed later by the mailbox user to fit additional fields, or the default MCAM entry rule action can be used for other flow rules installed later. Modified rvu_mbox_handler_nix_lf_free mailbox to add a flag to disable or delete the MCAM entries. The MCAM entries are disabled when the interface is brought down and deleted in FLR handler. The disabled MCAM entries will be re-enabled when the interface is brought up again. Signed-off-by: NSubbaraya Sundeep <sbhatta@marvell.com> Signed-off-by: NSunil Goutham <sgoutham@marvell.com> Signed-off-by: NNaveen Mamindlapalli <naveenm@marvell.com> Signed-off-by: NJakub Kicinski <kuba@kernel.org>
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由 Subbaraya Sundeep 提交于
Key Extraction(KEX) profile decides how the packet metadata such as layer information and selected packet data bytes at each layer are placed in MCAM search key. This patch reads the configured KEX profile parameters to find out the bit position and bit mask for each field. The information is used when programming the MCAM match data by SW to match a packet flow and take appropriate action on the flow. This patch also verifies the mandatory fields such as channel and DMAC are not overwritten by the KEX configuration of other fields. Signed-off-by: NSubbaraya Sundeep <sbhatta@marvell.com> Signed-off-by: NSunil Goutham <sgoutham@marvell.com> Signed-off-by: NNaveen Mamindlapalli <naveenm@marvell.com> Signed-off-by: NJakub Kicinski <kuba@kernel.org>
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由 Subbaraya Sundeep 提交于
This patch adds support to verify the channel number sent by mailbox requester before writing MCAM entry for Ingress packets. Similarly for Egress packets, verifying the PF_FUNC sent by the mailbox user. Signed-off-by: NSubbaraya Sundeep <sbhatta@marvell.com> Signed-off-by: NKiran Kumar K <kirankumark@marvell.com> Signed-off-by: NSunil Goutham <sgoutham@marvell.com> Signed-off-by: NNaveen Mamindlapalli <naveenm@marvell.com> Signed-off-by: NJakub Kicinski <kuba@kernel.org>
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- 01 11月, 2020 1 次提交
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由 Subbaraya Sundeep 提交于
On 98xx silicon, NPC block has additional mcam entries, counters and NIX1 interfaces. Extended set of registers are present for the new mcam entries and counters. This patch does the following: - updates the register accessing macros to use extended set if present. - configures the MKEX profile for NIX1 interfaces also. - updates mcam entry write functions to use assigned NIX0/1 interfaces for the PF/VF. Signed-off-by: NSubbaraya Sundeep <sbhatta@marvell.com> Signed-off-by: NRakesh Babu <rsaladi2@marvell.com> Signed-off-by: NSunil Goutham <sgoutham@marvell.com> Signed-off-by: NJakub Kicinski <kuba@kernel.org>
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- 01 10月, 2020 1 次提交
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由 Subbaraya Sundeep 提交于
Packet replication feature present in Octeontx2 is a hardware linked list of PF and its VF interfaces so that broadcast packets are sent to all interfaces present in the list. It is driver job to add and delete a PF/VF interface to/from the list when the interface is brought up and down. This patch fixes the npc_enadis_default_entries function to handle broadcast replication properly if packet replication feature is present. Fixes: 40df309e ("octeontx2-af: Support to enable/disable default MCAM entries") Signed-off-by: NSubbaraya Sundeep <sbhatta@marvell.com> Signed-off-by: NGeetha sowjanya <gakula@marvell.com> Signed-off-by: NSunil Goutham <sgoutham@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 30 9月, 2020 1 次提交
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由 Stanislaw Kardach 提交于
Refactor KPU related NPC code gathering all configuration data in a structured format and putting it in one place (npc_profile.h). This increases readability and makes it easier to extend the profile configuration (as opposed to jumping between multiple header and source files). To do this: * Gather all KPU profile related data into a single adapter struct. * Convert the built-in MKEX definition to a structured one to streamline the MKEX loading. * Convert LT default register configuration into a structure, keeping default protocol settings in same file where identifiers for those protocols are defined. * Add a single point for KPU profile loading, so that its source may change in the future once proper interfaces for loading such config are in place. Signed-off-by: NStanislaw Kardach <skardach@marvell.com> Acked-by: NSunil Goutham <sgoutham@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 12 9月, 2020 1 次提交
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由 Rikard Falkeborn 提交于
These are never modified, so constify them to allow the compiler to place them in read-only memory. This moves about 25kB to read-only memory as seen by the output of the size command. Before: text data bss dec hex filename 296203 65464 1248 362915 589a3 drivers/net/ethernet/marvell/octeontx2/af/octeontx2_af.ko After: text data bss dec hex filename 321003 40664 1248 362915 589a3 drivers/net/ethernet/marvell/octeontx2/af/octeontx2_af.ko Signed-off-by: NRikard Falkeborn <rikard.falkeborn@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 25 8月, 2020 1 次提交
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由 Zyta Szpak 提交于
Four new mbox messages ids and handler are added in order to enable or disable timestamping procedure on tx and rx side. Additionally when PTP is enabled, the packet parser must skip over 8 bytes and start analyzing packet data there. To make NPC profiles work seemlesly PTR_ADVANCE of IKPU is set so that parsing can be done as before when all data pointers are shifted by 8 bytes automatically. Co-developed-by: NSubbaraya Sundeep <sbhatta@marvell.com> Signed-off-by: NSubbaraya Sundeep <sbhatta@marvell.com> Signed-off-by: NZyta Szpak <zyta@marvell.com> Signed-off-by: NSunil Goutham <sgoutham@marvell.com> Acked-by: NRichard Cochran <richardcochran@gmail.com> Acked-by: NJakub Kicinski <kuba@kernel.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 03 3月, 2020 1 次提交
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由 Linu Cherian 提交于
For retrieving info like interface MAC addresses, packet parser key extraction config etc currently a command is sent to firmware and firmware which periodically polls for commands, processes these and returns the info. This is resulting in interface initialization taking lot of time. To optimize this a memory region is shared between firmware and this driver, firmware while booting puts static info like these into that region for driver to read directly without using commands. With this - Logic for retrieving packet parser extraction config via commands is removed and repalced with using the shared 'fwdata' structure. - Now RVU MSIX vector address is also retrieved from this fwdata struct instead of from CSR. Otherwise when kexec/kdump crash kernel loads CSR will have a IOVA setup by primary kernel which impacts RVU PF/VF's interrupts. - Also added a mbox handler for PF/VF interfaces to retrieve their MAC addresses from AF. Signed-off-by: NLinu Cherian <lcherian@marvell.com> Signed-off-by: NChristina Jacob <cjacob@marvell.com> Signed-off-by: NRakesh Babu <rsaladi2@marvell.com> Signed-off-by: NSunil Goutham <sgoutham@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 15 11月, 2019 5 次提交
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由 Sunil Goutham 提交于
Ingress packet replication support has been added to 96xx B0 silicon. This patch enables using that feature to replicate ingress broadcast packets to PF and it's VFs. Also fixed below issues - VFs can also install NPC MCAM entry to forward broadcast pkts. Otherwise, unless PF's interface is UP, VFs will not receive bcast packets. - NPC MCAM entry is disabled when PF and all it's VFs are down. - Few corner cases in installing multicast entry list. Signed-off-by: NSunil Goutham <sgoutham@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Sunil Goutham 提交于
CN96xx initial silicon doesn't support all features pertaining to NIX transmit scheduling and shaping. - It supports a fixed topology of 1:1 mapped transmit limiters at all levels. - Supports DWRR only at SMQ/MDQ and TL1. - Doesn't support shaping and coloring. This patch adds HW capability structure by which each variant and skew of silicon can be differentiated by their supported features. And adds support for A0 silicon's transmit scheduler capabilities or rather limitations. Signed-off-by: NSunil Goutham <sgoutham@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Nithin Dabilpuram 提交于
Writing into NPC MCAM1 and MCAM0 registers are suppressed if they happened to form a reserved combination. Hence clear and disable MCAM entries before update. For HRM: [CAM(1)]<n>=1, [CAM(0)]<n>=1: Reserved. The reserved combination is not allowed. Hardware suppresses any write to CAM(0) or CAM(1) that would result in the reserved combination for any CAM bit. Signed-off-by: NNithin Dabilpuram <ndabilpuram@marvell.com> Signed-off-by: NSunil Goutham <sgoutham@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Hao Zheng 提交于
Updated NPC KPU packet parsing profile with support for following - Fragmentation support for IPv4 IPv6 outer header - NIX instruction header support - QinQ with TPID of 0x8100 as non inner most vlan tag, as legacy network equipments still generate QinQ packets with this configuration. - To better support RSS for tunnelled packets, udp based tunnel protocols such as vxlan, vxlan-gpe, geneve and gtpu are now captured into a separate layer E. Consequently, the inner packet headers are pushed one layer down to LF, LG, and LH accordingly. - Support for rfc7510 mpls in udp. Up to 4 MPLS labels can be parsed and captured in one layer LE. - Parser support for DSA, extended DSA and eDSA tags right after ethernet header by Marvell SOHO and Falcon switches. For extended DSA and eDSA tags, a special PKIND of 62 is used, as these tags don't contain a tpid field. - Higig2 protocol header parsing support, added a NPC_LT_LA_HIGIG2_ETHER for a combined header of HIGIG2 and Ethernet. Add a NPC_LT_LA_IH_NIX_HIGIG2_ETHER for a combined header of nix_ih, HIGIG2 and Ethernet on egress side. Also added 2 upper flags in LA to indicate the presence of nix_ih and HIGIG2. Other changes include - IPv4.TTL==0 IPv6.HLIM==0 check - Per RFC 1858, mark fragment offset == 1 as error - TCP invalid flags check - Separate error codes for outer and inner IPv4 checksum errors. - Fix a parser error when KPU parses incoming IPSec ESP and AH packets - NPC vtag capture/strip hardware expect tag pointer to point to tpid/ethertype instead of tci. So move lb_ptr to point to tpid/ethertype. - Fix npc parser error when parsing udp packets that don't have any payload. - For a single MCAM entry to match on packets with one or stacked vlan tags combine NPC_LT_LB_STAG and NPC_LT_LB_QINQ to NPC_LT_LB_STAG_QINQ. - NVGRE to have a separate ltype LD_NVGRE instead of combined with LD_GRE. - Reserve top LD/LTYPEs to support custom KPU profile fields. Signed-off-by: NHao Zheng <haoz@marvell.com> Signed-off-by: NSunil Goutham <sgoutham@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Sunil Goutham 提交于
Added support to display current NPC MCAM entries and counter's allocation status ín debugfs. cat /sys/kernel/debug/octeontx2/npc/mcam_info' will dump following info - MCAM Rx and Tx keysize - Total MCAM entries and counters - Current available count - Count of number of MCAM entries and counters allocated by a RVU PF/VF device. Also, one NPC MCAM counter (last one) is reserved and mapped to NPC RX_INTF's MISS_ACTION to count dropped packets due to no MCAM entry match. This pkt drop counter can be checked via debugfs. Signed-off-by: NSunil Goutham <sgoutham@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 04 12月, 2018 4 次提交
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由 Vamsi Attunuru 提交于
The following set of NPC registers allow the driver to configure NPC to generate different key value schemes to compare against packet payload in MCAM search. NPC_AF_INTF(0..1)_KEX_CFG NPC_AF_KEX_LDATA(0..1)_FLAGS_CFG NPC_AF_INTF(0..1)_LID(0..7)_LT(0..15)_LD(0..1)_CFG NPC_AF_INTF(0..1)_LDATA(0..1)_FLAGS(0..15)_CFG Currently, the AF driver populates these registers to configure the default values to address the most common use cases such as key generation for channel number + DMAC. The secure firmware stores different configuration value of these registers to enable different NPC use case along with the name for the lookup. Patch loads profile binary from secure firmware over the exiting CGX mailbox interface and apply the profile. AF driver shall fall back to the default configuration in case of any errors. The AF consumer driver can know the selected profile on response to NPC_GET_KEX_CFG mailbox by introducing mkex_pfl_name in the struct npc_get_kex_cfg_rsp. Signed-off-by: NVamsi Attunuru <vamsi.attunuru@marvell.com> Signed-off-by: NJerin Jacob <jerinj@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Vamsi Attunuru 提交于
This patch adds support for enabling RSS in promiscuous mode if RSS is already requested by the AF client. Signed-off-by: NVamsi Attunuru <vamsi.attunuru@marvell.com> Signed-off-by: NJerin Jacob <jerinj@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Jerin Jacob 提交于
This patch enables the inner IPv4 checksum and defines the error code for Rx inner and outer checksum errors. Setting ERRCODE as 1 so that CQE descriptor can be embedded valid checksum error code and the driver can interpret checksum error as ERRLEV = LID + 1 and ERRCODE = 1. Signed-off-by: NJerin Jacob <jerinj@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Sunil Goutham 提交于
At the time of initial broadcast packet replication table init, NIXLFs are not yet attached to PF_FUNCs. Hence skipped checking NIXLF while submitting MCE entry init instruction to NIX admin queue. Also did a minor cleanup while installing bcast match entry in packet parser unit i.e NPC. Signed-off-by: NSunil Goutham <sgoutham@marvell.com> Signed-off-by: NJerin Jacob <jerinj@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 20 11月, 2018 11 次提交
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由 Sunil Goutham 提交于
Errata 35038 Software sets NIX_AF_RX_SW_SYNC[ENA] to sync (flush) in-flight packets the RX data path before configuration changes (e.g. disabling one or more RQs). Hardware clears [ENA] to indicate sync is done An issue exists whereby NIX may clear NIX_AF_RX_SW_SYNC [ENA] too early. Errata 35057 NIX may corrupt internal state when conditional clocks turn off. So turnon all clocks by default. Errata 35786 Parse nibble enable NPC configuration for KEY generation has to be identical for both Rx and Tx interfaces. Also corrected endianness configuration for NIX i.e NIX_AF_CFG[AF_BE] is bit8 and not bit1. Signed-off-by: NSunil Goutham <sgoutham@marvell.com> Signed-off-by: NJerin Jacob <jerinj@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Tomasz Duszynski 提交于
Configure AF VFs such that they are able to talk over consecutive loopback channels. If 8 VFs are attached to AF then communication will work as below: TX RX lbk0 -> lbk1 lbk1 -> lbk0 lbk2 -> lbk3 lbk3 -> lbk2 lbk4 -> lbk5 lbk5 -> lbk4 lbk6 -> lbk7 lbk7 -> lbk6 Signed-off-by: NTomasz Duszynski <tduszynski@marvell.com> Signed-off-by: NSunil Goutham <sgoutham@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Tomasz Duszynski 提交于
This works by shadowing existing UCAST MCAM entry with a new one additionally matching either NPC_LT_LB_CTAG or NPC_LT_LB_STAG. For this to fully work one needs to send properly configured NIX_VTAG_CFG message afterwards i.e with strip and capture enabled and type set to 0. On receiving tagged packet NIX will remove outer VLAN and capture TCI in NIX_RX_PARSE_S. Also simplified RX Vtag configuration flow With this setting STRIP/CAPTURE VTAG actions separately would be possible. Following combinations are possible: STRIP, STRIP and CAPTURE, CAPTURE or nothing (0 disables respective actions). Signed-off-by: NTomasz Duszynski <tduszynski@marvell.com> Signed-off-by: NSunil Goutham <sgoutham@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Sunil Goutham 提交于
For a PF/VF with a NIXLF attached has default/reserved MCAM entries for receiving Ucast/Bcast/Promisc traffic. Ideally traffic should be forwarded to NIXLF only after it's contexts are initialized. This patch keeps these default entries disabled and adds mbox messages for a PF/VF to enable these once NPA/NIXLF initialization is done. Likewise while PF/VF is being teared down, it can send the disable mailbox message to stop receiving traffic. Signed-off-by: NSunil Goutham <sgoutham@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Santosh Shukla 提交于
Added basic default MKEX profile. This profile tells hardware what data to extract from packet and where to place it (bit offset) in final KEY generated for the parsed packet. Based on the bit placement of the packet data, MCAM entries have to programmed for matching. Also added a msg to retrieve this MKEX profile from PF/VF which inturn can process it to determine how MCAM entry has to be populated. Signed-off-by: NSantosh Shukla <sshukla@marvell.com> Signed-off-by: NYuri Tolstov <ytolstov@marvell.com> Signed-off-by: NSunil Goutham <sgoutham@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Sunil Goutham 提交于
A new mailbox message is added to support allocating a MCAM entry along with a counter and configuring it in one go. This reduces the amount of mailbox communication involved in installing a new MCAM rule. Signed-off-by: NSunil Goutham <sgoutham@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Sunil Goutham 提交于
Alloc memory to save MCAM 'entry to counter' mapping and since multiple entries can map to same counter, added counter's reference count tracking. Do 'entry to counter' mapping when a entry is being installed and mbox msg sender requested to configure a counter as well. Mapping is removed when a entry or counter is being freed or a explicit mbox msg is received to unmap them. Signed-off-by: NSunil Goutham <sgoutham@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Sunil Goutham 提交于
NPC HW has counters which can be mapped to MCAM entries to gather entry match statistics. This patch adds support to allocate, free, clear and retrieve stats of NPC MCAM counters. New mailbox messages have been added for this. Similar to MCAM entries both contiguous and non-contiguous counter allocation is supported. Signed-off-by: NSunil Goutham <sgoutham@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Sunil Goutham 提交于
Add support for a RVU PF/VF to enable, disable, configure and shuffle MCAM entries via mbox commands. This patch adds mailbox message formats and handling of these commands. As of now otherthan validating MCAM entry index, info like channel number e.t.c in MCAM config data sent by PF/VF are not validated. Also a max of 64 MCAM entries can be shuffled with a single mbox command. Signed-off-by: NSunil Goutham <sgoutham@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Sunil Goutham 提交于
This patch adds NPC MCAM entry management and support for allocating and freeing them via mailbox. Both contiguous and non-contiguous allocations are supported. Incase of contiguous, if request cannot be met then max contiguous number of available entries are allocated. High or low priority index allocation w.r.t a reference MCAM index is also supported. Signed-off-by: NSunil Goutham <sgoutham@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Stanislaw Kardach 提交于
Mailbox message handling is done in a workqueue context scheduled from interrupt handler. So resource locks does not need to be a spinlock. Therefore relax them into a mutex so that later on we may use them in routines that might sleep. Signed-off-by: NStanislaw Kardach <skardach@marvell.com> Signed-off-by: NSunil Goutham <sgoutham@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 23 10月, 2018 7 次提交
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由 Sunil Goutham 提交于
By default NIXLF is set in UCAST mode. This patch adds a new mailbox message which when sent by a RVU PF changes this default mode. When promiscuous mode is needed, the reserved promisc entry for each of RVU PF is setup to match against ingress channel number only, so that all pkts on that channel are accepted and forwarded to the mode change requesting PF_FUNC's NIXLF. PROMISC and ALLMULTI modes are supported only for PFs, for VFs only UCAST mode is supported. Signed-off-by: NSunil Goutham <sgoutham@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Sunil Goutham 提交于
This patch adds support for a RVU PF/VF to change NIX Rx flowkey algorithm index in NPC RX RSS_ACTION. eg: a ethtool command changing RSS algorithm for a netdev interface would trigger this change in NPC. If PF/VF doesn't specify any MCAM entry index then default UCAST entry of the NIXLF attached to PF/VF will be updated with RSS_ACTION and flowkey index. Signed-off-by: NSunil Goutham <sgoutham@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Sunil Goutham 提交于
Upon NIXLF_ALLOC install a unicast forwarding rule in NPC MCAM like below - Match pkt DMAC with NIXLF attached PF/VF's MAC address. - Ingress channel - Action is UCAST - Forward to PF_FUNC of this NIXLF And broadcast pkt forwarding rule as - Match L2B bit in MCAM search key - Ingress channel - Action is UCAST, for now, later it will be changed to MCAST. Only PFs can install this rule Upon NIXLF_FREE disable all MCAM entries in use by that NIXLF. Signed-off-by: NSunil Goutham <sgoutham@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Sunil Goutham 提交于
This patch adds some minimal configuration for NPC MCAM and LDATA extraction which is sufficient enough to install ucast/bcast/promiscuous forwarding rules. Below is the config done - LDATA extraction config to extract DMAC from pkt to offset 64bit in MCAM search key. - Set MCAM lookup keysize to 224bits - Set MCAM TX miss action to UCAST_DEFAULT - Set MCAM RX miss action to DROP Also inorder to have guaranteed space in MCAM to install ucast forwarding rule for each of RVU PF/VF, reserved one MCAM entry for each of NIXLF for ucast rule. And two entries for each of RVU PF. One for bcast pkt replication and other for promiscuous mode which allows all pkts received on a HW CGX/LBK channel. Signed-off-by: NSunil Goutham <sgoutham@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Sunil Goutham 提交于
Config NPC layer info from KPU profile into protocol checker to identify outer L2/IPv4/TCP/UDP headers in a packet. And enable IPv4 checksum validation. L3/L4 and L4 CSUM validation will be enabled by PF/VF drivers by configuring NIX_AF_LF(0..127)_RX_CFG via mbox i.e 'nix_lf_alloc_req->rx_cfg' Also enable setting of NPC_RESULT_S[L2B] when an outer L2 broadcast address is detected. This will help in installing NPC MCAM rules for broadcast packets. Signed-off-by: NSunil Goutham <sgoutham@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Geetha sowjanya 提交于
For each CGX LMAC that is mapped to a RVU PF, allocate a pkind and config the same in CGX. For a received packet at CGX LMAC interface this pkind is used by NPC block to start parsing of packet. Signed-off-by: NGeetha sowjanya <gakula@marvell.com> Signed-off-by: NSunil Goutham <sgoutham@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Sunil Goutham 提交于
This patch configures all 16 KPUs and iKPU (pkinds) with the KPU parser profile defined in npc_profile.h. Each KPU engine has a 128 entry CAM, only CAM entries which are listed in the profile are enabled and rest are left disabled. Also - Memory is allocated for pkind's bitmap and PFFUNC, interface channel mapping. - Added all CSR offsets of NPC HW block. Signed-off-by: NSunil Goutham <sgoutham@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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