- 30 11月, 2020 30 次提交
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由 Ofir Bitton 提交于
Once FW security is enabled there is no access to PLL registers, need to read values from FW using a dedicated interface. Signed-off-by: NOfir Bitton <obitton@habana.ai> Reviewed-by: NOded Gabbay <ogabbay@kernel.org> Signed-off-by: NOded Gabbay <ogabbay@kernel.org>
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由 Moti Haimovski 提交于
This commit refactors the MMU code to support PCI MMU page tables residing on host and DCORE MMU residing on the device DRAM at the same time. This is needed for future devices as on GAUDI and GOYA we have a single MMU where its page tables always reside on DRAM. Signed-off-by: NMoti Haimovski <mhaimovski@habana.ai> Reviewed-by: NOded Gabbay <ogabbay@kernel.org> Signed-off-by: NOded Gabbay <ogabbay@kernel.org>
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由 Moti Haimovski 提交于
This commit fixes an incorrect error message Signed-off-by: NMoti Haimovski <mhaimovski@habana.ai> Reviewed-by: NOded Gabbay <ogabbay@kernel.org> Signed-off-by: NOded Gabbay <ogabbay@kernel.org>
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由 farah kassabri 提交于
In cases of multi-tenants, administrators may want to prevent data leakage between users running on the same device one after another. To do that the driver can scrub the internal memory (both SRAM and DRAM) after a user finish to use the memory. Because in GAUDI the driver allows only one application to use the device at a time, it can scrub the memory when user app close FD. In future devices where we have MMU on the DRAM, we can scrub the DRAM memory with a finer granularity (page granularity) when the user allocates the memory. This feature is not supported in Goya. To allow users that want to debug their applications, we add a kernel module parameter to load the driver with this feature disabled. Signed-off-by: Nfarah kassabri <fkassabri@habana.ai> Reviewed-by: NOded Gabbay <ogabbay@kernel.org> Signed-off-by: NOded Gabbay <ogabbay@kernel.org>
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由 Ofir Bitton 提交于
Skip relevant HW configurations once FW security is enabled because these configurations are being performed by FW. Signed-off-by: NOfir Bitton <obitton@habana.ai> Reviewed-by: NOded Gabbay <ogabbay@kernel.org> Signed-off-by: NOded Gabbay <ogabbay@kernel.org>
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由 Ofir Bitton 提交于
Add support for fetching security indication from FW. This indication is needed in order to skip unnecessary initializations done by FW. Signed-off-by: NOfir Bitton <obitton@habana.ai> Reviewed-by: NOded Gabbay <ogabbay@kernel.org> Signed-off-by: NOded Gabbay <ogabbay@kernel.org>
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由 farah kassabri 提交于
Fix cs counters structure in uapi to be one flat structure instead of two instances of the same other structure. use atomic read/increment for context counters so we could use one structure for both aggregated and context counters. Signed-off-by: Nfarah kassabri <fkassabri@habana.ai> Reviewed-by: NOded Gabbay <ogabbay@kernel.org> Signed-off-by: NOded Gabbay <ogabbay@kernel.org>
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由 Ofir Bitton 提交于
Today driver is able to load a whole FW binary into a specific location on ASIC. We add support for loading sections from the same FW binary into different loactions. Signed-off-by: NOfir Bitton <obitton@habana.ai> Reviewed-by: NOded Gabbay <ogabbay@kernel.org> Signed-off-by: NOded Gabbay <ogabbay@kernel.org>
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由 Oded Gabbay 提交于
GCC 7.3.1 20180303 (Red Hat 7.3.1-5) complains that collective_engine_id might be used uninitialized. Signed-off-by: NOded Gabbay <ogabbay@kernel.org>
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由 Ofir Bitton 提交于
Remove unreachable code in gaudi collective flow. Signed-off-by: NOfir Bitton <obitton@habana.ai> Reviewed-by: NOded Gabbay <ogabbay@kernel.org> Signed-off-by: NOded Gabbay <ogabbay@kernel.org>
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由 Oded Gabbay 提交于
Although we get a valid cs type from the callee, in case new values will be added in the future, it is best to check the expected values in that function. Signed-off-by: NOded Gabbay <ogabbay@kernel.org>
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由 Oded Gabbay 提交于
In GAUDI we don't have an MMU towards the HBM device memory. Therefore, the user access that memory directly through physical address (via the different engines) without the need to go through the driver to allocate/free memory on the HBM. For system monitoring purposes, the driver will keep track of the HBM usage. This can be done as long as the user accurately reports the allocations and releases of HBM memory, through the existing MEMORY IOCTL uapi. Signed-off-by: NOded Gabbay <ogabbay@kernel.org>
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由 Ofir Bitton 提交于
Implement sync stream collective for GAUDI. Need to allocate additional resources for that and add ctx_fini() to clean up those resources. Signed-off-by: NOfir Bitton <obitton@habana.ai> Reviewed-by: NOded Gabbay <ogabbay@kernel.org> Signed-off-by: NOded Gabbay <ogabbay@kernel.org>
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由 Ofir Bitton 提交于
DMA5 QMAN is designated to be used for reduction process, hence it will be no longer configured as external queue. Signed-off-by: NOfir Bitton <obitton@habana.ai> Reviewed-by: NOded Gabbay <ogabbay@kernel.org> Signed-off-by: NOded Gabbay <ogabbay@kernel.org>
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由 Ofir Bitton 提交于
Define new API for collective wait support and modify sync stream common flow. In addition add kernel CB allocation support for internal queues. Signed-off-by: NOfir Bitton <obitton@habana.ai> Reviewed-by: NOded Gabbay <ogabbay@kernel.org> Signed-off-by: NOded Gabbay <ogabbay@kernel.org>
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由 Tal Cohen 提交于
In the future there will be situations where queues can accept either kernel allocated CBs or user allocated CBs, depending on different states. Therefore, instead of using a boolean variable of kernel/user allocated CB, we need to use a bitmask to indicate that, which will allow to combine the two options. Add a flag to the uapi so the user will be able to indicate whether the CB was allocated by kernel or by user. Of course the driver validates that. Signed-off-by: NTal Cohen <talcohen@habana.ai> Reviewed-by: NOded Gabbay <ogabbay@kernel.org> Signed-off-by: NOded Gabbay <ogabbay@kernel.org>
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由 Oded Gabbay 提交于
Initialize the QMANs that are responsible to submit doorbells to the NIC engines. Add support for stopping and disabling them, and reset them as part of the hard-reset procedure of GAUDI. This will allow the user to submit work to the NICs. Add support for receiving events on QMAN errors from the firmware. However, the nic_ports_mask is still initialized to 0. That means this code won't initialize the QMANs just yet. That will be in a later patch. Signed-off-by: NOmer Shpigelman <oshpigelman@habana.ai> Reviewed-by: NOded Gabbay <ogabbay@kernel.org> Signed-off-by: NOded Gabbay <ogabbay@kernel.org>
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由 Oded Gabbay 提交于
Configure the security properties of the NIC IP. This is to prevent the user process from doing something with the NIC that he shouldn't do. e.g. crash the server, steal data, etc. Signed-off-by: NOmer Shpigelman <oshpigelman@habana.ai> Reviewed-by: NOded Gabbay <ogabbay@kernel.org> Signed-off-by: NOded Gabbay <ogabbay@kernel.org>
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由 Oded Gabbay 提交于
Add new structures and messages that the driver use to interact with the firmware to receive information and events (errors) about GAUDI's NIC. Signed-off-by: NOmer Shpigelman <oshpigelman@habana.ai> Reviewed-by: NOded Gabbay <ogabbay@kernel.org> Signed-off-by: NOded Gabbay <ogabbay@kernel.org>
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由 Oded Gabbay 提交于
Add auto-generated header files that describe the NIC QMANs registers used by the driver. Signed-off-by: NOmer Shpigelman <oshpigelman@habana.ai> Reviewed-by: NOded Gabbay <ogabbay@kernel.org> Signed-off-by: NOded Gabbay <ogabbay@kernel.org>
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由 Oded Gabbay 提交于
We already check if queue index is smaller than max queues a few lines above this check so no need to check this again. Signed-off-by: NOded Gabbay <ogabbay@kernel.org>
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由 Ofir Bitton 提交于
Refactor sync stream implementation by reducing function length for better readability. Signed-off-by: NOfir Bitton <obitton@habana.ai> Reviewed-by: NOded Gabbay <ogabbay@kernel.org> Signed-off-by: NOded Gabbay <ogabbay@kernel.org>
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由 Ofir Bitton 提交于
Support advanced monitor functionality to monitor more than a single SOB. In addition expand all CB generation functions with buffer offset in order to put in them multiple packets that are generated by different functions. Signed-off-by: NOfir Bitton <obitton@habana.ai> Reviewed-by: NOded Gabbay <ogabbay@kernel.org> Signed-off-by: NOded Gabbay <ogabbay@kernel.org>
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由 Ofir Bitton 提交于
Refactor sync stream implementation by adding more structures for better readability. In addition reducing allocated resources. Signed-off-by: NOfir Bitton <obitton@habana.ai> Reviewed-by: NOded Gabbay <ogabbay@kernel.org> Signed-off-by: NOded Gabbay <ogabbay@kernel.org>
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由 Oded Gabbay 提交于
In case we are running without MMU enabled (debug mode), no need to initialize the VM module in the driver. Signed-off-by: NOded Gabbay <ogabbay@kernel.org>
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由 Oded Gabbay 提交于
No need to print when the driver starts to initialize the H/W. Drivers should be silent when everything is OK. Signed-off-by: NOded Gabbay <ogabbay@kernel.org>
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由 Oded Gabbay 提交于
The driver now loads the firmware in two stages. For debugging purposes we need to support situations where only the first stage firmware is loaded. Therefore, use a bitmask to determine which F/W is loaded Signed-off-by: NOded Gabbay <ogabbay@kernel.org>
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由 Oded Gabbay 提交于
F/W can be loaded but device CPU queues disabled. In that case, HWMON should be disabled. This is only relevant when debugging Signed-off-by: NOded Gabbay <ogabbay@kernel.org>
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由 Ofir Bitton 提交于
Currently mmu_prepare is located at context switch. Since we support a single context, no reason to reconfigure the MMU registers every context switch. Signed-off-by: NOfir Bitton <obitton@habana.ai> Reviewed-by: NOded Gabbay <ogabbay@kernel.org> Signed-off-by: NOded Gabbay <ogabbay@kernel.org>
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由 Oded Gabbay 提交于
In case we will have multiple contexts/processes, we can't just increment aggregated counters. We need to make them atomic as they can be incremented by multiple processes Signed-off-by: NOded Gabbay <ogabbay@kernel.org>
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- 28 11月, 2020 10 次提交
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由 Mathieu Poirier 提交于
CC drivers/hwtracing/coresight/coresight-cti-core.o CC drivers/hwtracing/coresight/coresight-cti-platform.o CC drivers/hwtracing/coresight/coresight-cti-sysfs.o drivers/hwtracing/coresight/coresight-stm.c:109: warning: Function parameter or member 'guaranteed' not described in 'channel_space' Signed-off-by: NMathieu Poirier <mathieu.poirier@linaro.org> Link: https://lore.kernel.org/r/20201127175256.1092685-16-mathieu.poirier@linaro.orgSigned-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Mathieu Poirier 提交于
CC drivers/hwtracing/coresight/coresight-etm4x-core.o CC drivers/hwtracing/coresight/coresight-etm4x-sysfs.o CC drivers/hwtracing/coresight/coresight-stm.o drivers/hwtracing/coresight/coresight-tpiu.c:53: warning: Cannot understand * @base: memory mapped base address for this component. on line 53 - I thought it was a doc line CC drivers/hwtracing/coresight/coresight-cpu-debug.o CC drivers/hwtracing/coresight/coresight-catu.o Signed-off-by: NMathieu Poirier <mathieu.poirier@linaro.org> Link: https://lore.kernel.org/r/20201127175256.1092685-15-mathieu.poirier@linaro.orgSigned-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Mathieu Poirier 提交于
CC drivers/hwtracing/coresight/coresight-etm4x-sysfs.o CC drivers/hwtracing/coresight/coresight-stm.o drivers/hwtracing/coresight/coresight-core.c:440: warning: Function parameter or member 'csdev' not described in 'coresight_disable_source' drivers/hwtracing/coresight/coresight-core.c:670: warning: Function parameter or member 'csdev' not described in 'coresight_get_ref' drivers/hwtracing/coresight/coresight-core.c:687: warning: Function parameter or member 'csdev' not described in 'coresight_put_ref' drivers/hwtracing/coresight/coresight-core.c:758: warning: Function parameter or member 'sink' not described in '_coresight_build_path' CC drivers/hwtracing/coresight/coresight-cpu-debug.o CC drivers/hwtracing/coresight/coresight-catu.o Signed-off-by: NMathieu Poirier <mathieu.poirier@linaro.org> Link: https://lore.kernel.org/r/20201127175256.1092685-14-mathieu.poirier@linaro.orgSigned-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Mao Jinlong 提交于
alloc_pages_node() return should be checked before calling dma_map_page() to make sure that valid page is mapped or else it can lead to aborts as below: Unable to handle kernel paging request at virtual address ffffffc008000000 Mem abort info: <snip>... pc : __dma_inv_area+0x40/0x58 lr : dma_direct_map_page+0xd8/0x1c8 Call trace: __dma_inv_area tmc_pages_alloc tmc_alloc_data_pages tmc_alloc_sg_table tmc_init_etr_sg_table tmc_alloc_etr_buf tmc_enable_etr_sink_sysfs tmc_enable_etr_sink coresight_enable_path coresight_enable enable_source_store dev_attr_store sysfs_kf_write Fixes: 99443ea1 ("coresight: Add generic TMC sg table framework") Cc: stable@vger.kernel.org Reviewed-by: NSuzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: NMao Jinlong <jinlmao@codeaurora.org> Signed-off-by: NSai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> Signed-off-by: NMathieu Poirier <mathieu.poirier@linaro.org> Link: https://lore.kernel.org/r/20201127175256.1092685-13-mathieu.poirier@linaro.orgSigned-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Kaixu Xia 提交于
Fix the following coccinelle warnings: ./drivers/hwtracing/coresight/coresight-tmc-etr.c:957:2-15: WARNING: Assignment of 0/1 to bool variable Fix them by assigning boolean values. Reported-by: NTosk Robot <tencent_os_robot@tencent.com> Signed-off-by: NKaixu Xia <kaixuxia@tencent.com> Signed-off-by: NMathieu Poirier <mathieu.poirier@linaro.org> Link: https://lore.kernel.org/r/20201127175256.1092685-12-mathieu.poirier@linaro.orgSigned-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Sai Prakash Ranjan 提交于
There was a report of NULL pointer dereference in ETF enable path for perf CS mode with PID monitoring. It is almost 100% reproducible when the process to monitor is something very active such as chrome and with ETF as the sink, not ETR. But code path shows that ETB has a similar path as ETF, so there could be possible NULL pointer dereference crash in ETB as well. Currently in a bid to find the pid, the owner is dereferenced via task_pid_nr() call in etb_enable_perf() and with owner being NULL, we can get a NULL pointer dereference, so have a similar fix as ETF where we cache PID in alloc_buffer() callback which is called as the part of etm_setup_aux(). Fixes: 75d7dbd3 ("coresight: etb10: Add support for CPU-wide trace scenarios") Cc: stable@vger.kernel.org Signed-off-by: NSai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> Signed-off-by: NMathieu Poirier <mathieu.poirier@linaro.org> Link: https://lore.kernel.org/r/20201127175256.1092685-11-mathieu.poirier@linaro.orgSigned-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Sai Prakash Ranjan 提交于
There was a report of NULL pointer dereference in ETF enable path for perf CS mode with PID monitoring. It is almost 100% reproducible when the process to monitor is something very active such as chrome and with ETF as the sink and not ETR. Currently in a bid to find the pid, the owner is dereferenced via task_pid_nr() call in tmc_enable_etf_sink_perf() and with owner being NULL, we get a NULL pointer dereference. Looking at the ETR and other places in the kernel, ETF and the ETB are the only places trying to dereference the task(owner) in tmc_enable_etf_sink_perf() which is also called from the sched_in path as in the call trace. Owner(task) is NULL even in the case of ETR in tmc_enable_etr_sink_perf(), but since we cache the PID in alloc_buffer() callback and it is done as part of etm_setup_aux() when allocating buffer for ETR sink, we never dereference this NULL pointer and we are safe. So lets do the same thing with ETF and cache the PID to which the cs_buffer belongs in tmc_alloc_etf_buffer() as done for ETR. This will also remove the unnecessary function calls(task_pid_nr()) since we are caching the PID. Easily reproducible running below: perf record -e cs_etm/@tmc_etf0/ -N -p <pid> Unable to handle kernel NULL pointer dereference at virtual address 0000000000000548 Mem abort info: ESR = 0x96000006 EC = 0x25: DABT (current EL), IL = 32 bits SET = 0, FnV = 0 EA = 0, S1PTW = 0 Data abort info: ISV = 0, ISS = 0x00000006 CM = 0, WnR = 0 <snip>... Call trace: tmc_enable_etf_sink+0xe4/0x280 coresight_enable_path+0x168/0x1fc etm_event_start+0x8c/0xf8 etm_event_add+0x38/0x54 event_sched_in+0x194/0x2ac group_sched_in+0x54/0x12c flexible_sched_in+0xd8/0x120 visit_groups_merge+0x100/0x16c ctx_flexible_sched_in+0x50/0x74 ctx_sched_in+0xa4/0xa8 perf_event_sched_in+0x60/0x6c perf_event_context_sched_in+0x98/0xe0 __perf_event_task_sched_in+0x5c/0xd8 finish_task_switch+0x184/0x1cc schedule_tail+0x20/0xec ret_from_fork+0x4/0x18 Fixes: 880af782 ("coresight: tmc-etf: Add support for CPU-wide trace scenarios") Cc: stable@vger.kernel.org Signed-off-by: NSai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> Signed-off-by: NMathieu Poirier <mathieu.poirier@linaro.org> Link: https://lore.kernel.org/r/20201127175256.1092685-10-mathieu.poirier@linaro.orgSigned-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Qi Liu 提交于
As THIS_MODULE has been set in platform_driver_register(), so remove it from static funnel driver and static replicator driver to avoid set it twice. Signed-off-by: NQi Liu <liuqi115@huawei.com> Signed-off-by: NMathieu Poirier <mathieu.poirier@linaro.org> Link: https://lore.kernel.org/r/20201127175256.1092685-9-mathieu.poirier@linaro.orgSigned-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Suzuki K Poulose 提交于
TRCVIPCSSCTLR is not present if the TRCIDR4.NUMPC > 0. Thus we should only access the register if it is present, preventing any undesired behavior. Cc: stable@vger.kernel.org Signed-off-by: NSuzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: NMathieu Poirier <mathieu.poirier@linaro.org> Link: https://lore.kernel.org/r/20201127175256.1092685-8-mathieu.poirier@linaro.orgSigned-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Suzuki K Poulose 提交于
TRCPROCSELR is not implemented if the TRCIDR3.NUMPROC == 0. Skip accessing the register in such cases. Cc: stable@vger.kernel.org Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Cc: Mike Leach <mike.leach@linaro.org> Signed-off-by: NSuzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: NMathieu Poirier <mathieu.poirier@linaro.org> Link: https://lore.kernel.org/r/20201127175256.1092685-7-mathieu.poirier@linaro.orgSigned-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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