- 25 10月, 2018 1 次提交
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由 David Francis 提交于
[Why] Carrizo and Stoney have severe corruption when trying to power 4k 60 monitors over HDMI connectors that support 4k 60. Carrizo and Stoney require retimers and redrivers to support 4k 60 over HDMI. This driver does not currently support these. Thus, 4k 60 HDMI (and all other modes requiring over 300MHz) should be disabled. [How] Reduce the dce11 HDMI pixel clock cap to 300000kHz. Signed-off-by: NDavid Francis <David.Francis@amd.com> Reviewed-by: NRoman Li <Roman.Li@amd.com> Acked-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 10 10月, 2018 2 次提交
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由 Jun Lei 提交于
[why] ddc engines were recently changed to be independently tracked from pipe count. the change was reflected in resource constructor but not in destructor. this manifests as a memory leak when pipe harvesting is enabled, since not all constructed ddc engines are freed [how] make destructor symmetric with constructor for all dcX_resource Signed-off-by: NJun Lei <Jun.Lei@amd.com> Reviewed-by: NAric Cyr <Aric.Cyr@amd.com> Acked-by: NLeo Li <sunpeng.li@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Eric Yang 提交于
[Why] All ASICS we support has YCbCr support, so the check is unnecessary, the currently logic in validate output also returns true all the time, so the unneccessary logic is removed Signed-off-by: NEric Yang <Eric.Yang2@amd.com> Reviewed-by: NTony Cheng <Tony.Cheng@amd.com> Acked-by: NLeo Li <sunpeng.li@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 15 9月, 2018 1 次提交
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由 Charlene Liu 提交于
We were not providing the correct pixel clocks to DML for marks calculation. Signed-off-by: NCharlene Liu <charlene.liu@amd.com> Reviewed-by: NDmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Acked-by: NLeo Li <sunpeng.li@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 11 9月, 2018 1 次提交
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由 Hersen Wu 提交于
[why] AMD Stoney reference board, there are only 2 pipes (not include underlay), and 3 connectors. resource creation, only 2 I2C/AUX engines are created. Within dc_link_aux_transfer, when pin_data_en =2, refer to enengines[ddc_pin->pin_data->en] = NULL. NULL point is referred later causing system crash. [how] each asic design has fixed number of ddc engines at hw side. for each ddc engine, create its i2x/aux engine at sw side. Signed-off-by: NHersen Wu <hersenxs.wu@amd.com> Reviewed-by: NTony Cheng <Tony.Cheng@amd.com> Acked-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 28 8月, 2018 1 次提交
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由 David Francis 提交于
[Why] I2C code did not match dc resource model and was generally unpleasant [How] Move code into new svelte dce_i2c files, replacing various i2c objects with two structs: dce_i2c_sw and dce_i2c_hw. Fully split sw and hw code paths. Remove all redundant declarations. Use address lists to distinguish between versions. Change dce80 code to newer register access macros. Signed-off-by: NDavid Francis <David.Francis@amd.com> Reviewed-by: NTony Cheng <Tony.Cheng@amd.com> Acked-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 27 7月, 2018 1 次提交
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由 Bhawanpreet Lakha 提交于
[Why] engine and aux_engine are unnecessary layers we want to remove this layer. [How] flatten engine and aux engine structs into one struct called aux_engine and remove all references to the engine struct. Signed-off-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Reviewed-by: NHarry Wentland <Harry.Wentland@amd.com> Acked-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 25 7月, 2018 1 次提交
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由 Bhawanpreet Lakha 提交于
[Why] Aux engine is created from i2caux layer. We want to remove this layer and use the engine directly. [How] Decouple aux engine from i2caux. Move aux engine related code to dce folder and use dc resource pool to manage the engine. And use the engine functions directly Signed-off-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Reviewed-by: NHarry Wentland <Harry.Wentland@amd.com> Acked-by: NLeo Li <sunpeng.li@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 14 7月, 2018 1 次提交
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由 Nicholas Kazlauskas 提交于
- Removed dal/dm/dc loggers from linux, switched to kernel prints - Modified functions that used these directly to use macros - dc_logger support is completely dropped from Linux Signed-off-by: NNicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: NHarry Wentland <Harry.Wentland@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 06 7月, 2018 2 次提交
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由 Dmytro Laktyushkin 提交于
No functional change. Signed-off-by: NDmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: NNikola Cornij <Nikola.Cornij@amd.com> Acked-by: NHarry Wentland <harry.wentland@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Dmytro Laktyushkin 提交于
Signed-off-by: NDmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: NTony Cheng <Tony.Cheng@amd.com> Acked-by: NHarry Wentland <harry.wentland@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 16 6月, 2018 1 次提交
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由 Alex Deucher 提交于
Just enable it always. This was leftover from feature bring up. Reviewed-by: NHarry Wentland <harry.wentland@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 12 4月, 2018 1 次提交
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由 Julian Parkin 提交于
Block FP16 scaling in validate_resources codepath. Signed-off-by: NJulian Parkin <jparkin@amd.com> Reviewed-by: NTony Cheng <Tony.Cheng@amd.com> Acked-by: NHarry Wentland <harry.wentland@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 08 3月, 2018 3 次提交
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由 Shirish S 提交于
In dce110, the plane configuration is such that plane 0 or the primary plane should be rendered with only RGB data. This patch adds the validation to ensure that no video data is rendered on plane 0. Signed-off-by: NShirish S <shirish.s@amd.com> Reviewed-by: NTony Cheng <Tony.Cheng@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Shirish S 提交于
CZ & ST support uptil a limit 2:1 downscaling, this patch adds validate_plane hook, that shall be used to validate the plane attributes sent by the user space based on dce110 capabilities. Signed-off-by: NShirish S <shirish.s@amd.com> Reviewed-by: NHarry Wentland <Harry.Wentland@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Shirish S 提交于
In dce110, the plane configuration is such that plane 0 or the primary plane should be rendered with only RGB data. This patch adds the validation to ensure that no video data is rendered on plane 0. Signed-off-by: NShirish S <shirish.s@amd.com> Reviewed-by: NTony Cheng <Tony.Cheng@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 06 3月, 2018 3 次提交
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由 Shirish S 提交于
CZ & ST support uptil a limit 2:1 downscaling, this patch adds validate_plane hook, that shall be used to validate the plane attributes sent by the user space based on dce110 capabilities. Signed-off-by: NShirish S <shirish.s@amd.com> Reviewed-by: NHarry Wentland <Harry.Wentland@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Bhawanpreet Lakha 提交于
Created a DC_LOGGER define. This is used to pass the logger into the macros. Anywhere we need to use the logger we need to define DC_LOGGER Signed-off-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Reviewed-by: NTony Cheng <Tony.Cheng@amd.com> Acked-by: NHarry Wentland <harry.wentland@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Bhawanpreet Lakha 提交于
Created MACROS for all log levels. Also Replaced usage of dm_logger_write to the defined MACROS Signed-off-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Reviewed-by: NTony Cheng <Tony.Cheng@amd.com> Acked-by: NHarry Wentland <harry.wentland@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 20 2月, 2018 2 次提交
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由 Yongqiang Sun 提交于
Use tg count in resource pool for further reference. Signed-off-by: NYongqiang Sun <yongqiang.sun@amd.com> Reviewed-by: NTony Cheng <Tony.Cheng@amd.com> Acked-by: NHarry Wentland <harry.wentland@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Yongqiang Sun 提交于
In case of some pipes are fused, pipe_idx should not be used to program pipe regs. Instead of that, BE and FE inst number should be used for reg index. Signed-off-by: NYongqiang Sun <yongqiang.sun@amd.com> Reviewed-by: NTony Cheng <Tony.Cheng@amd.com> Acked-by: NHarry Wentland <harry.wentland@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 08 12月, 2017 1 次提交
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由 Alex Deucher 提交于
These files were missing it before. Acked-by: NHarry Wentland <harry.wentland@amd.com> Acked-by: NFelix Kuehling <Felix.Kuehling@amd.com> Acked-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 05 12月, 2017 2 次提交
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由 Anthony Koo 提交于
Some features should only be enabled on APUs or should not be enabled on APUs. Signed-off-by: NAnthony Koo <anthony.koo@amd.com> Reviewed-by: NTony Cheng <Tony.Cheng@amd.com> Acked-by: NHarry Wentland <Harry.Wentland@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
These files were missing it before. Acked-by: NHarry Wentland <harry.wentland@amd.com> Acked-by: NFelix Kuehling <Felix.Kuehling@amd.com> Acked-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 29 11月, 2017 1 次提交
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由 Colin Ian King 提交于
Currently in the case where some of the allocations fail for dce110_tgv, dce110_xfmv, dce110_miv or dce110_oppv then the exit return path ends up leaking allocated objects. Fix this by kfree'ing them before returning. Also re-work the comparison of the null pointers to use the !ptr idiom. Detected by CoverityScan, CID#1460246, 1460325, 1460324, 1460392 ("Resource Leak") Fixes: c4562236b3bc ("drm/amd/dc: Add dc display driver (v2)") Signed-off-by: NColin Ian King <colin.king@canonical.com> Reviewed-by: NHarry Wentland <harry.wentland@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 22 10月, 2017 2 次提交
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由 Shirish S 提交于
Currently FBC is guarded with ENABLE_FBC macro, which needs to be manually enabled in Makefile. This patch moves it to Kconfig so that there wont be any need to additional patch to be carried for enabling or disabling on every SoC. Signed-off-by: NShirish S <shirish.s@amd.com> Reviewed-by: NRoman Li <Roman.Li@amd.com> Acked-by: NHarry Wentland <Harry.Wentland@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Roman Li 提交于
- fixed wrong index in dce110_validate_surface_sets() - formatted for better readability Signed-off-by: NRoman Li <Roman.Li@amd.com> Reviewed-by: NHarry Wentland <Harry.Wentland@amd.com> igned-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 07 10月, 2017 1 次提交
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由 Dave Airlie 提交于
Don't bother checking for it. Found with the cocci ifnullfree.cocci script. Signed-off-by: NDave Airlie <airlied@redhat.com> Reviewed-by: NHarry Wentland <harry.wentland@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 30 9月, 2017 7 次提交
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由 Dave Airlie 提交于
This never returned anything else. Signed-off-by: NDave Airlie <airlied@redhat.com> Reviewed-by: NHarry Wentland <harry.wentland@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Dave Airlie 提交于
This removes any remaining pointless return codepaths from the DCE code. Signed-off-by: NDave Airlie <airlied@redhat.com> Reviewed-by: NHarry Wentland <harry.wentland@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Dave Airlie 提交于
This never returns anything but true. Signed-off-by: NDave Airlie <airlied@redhat.com> Reviewed-by: NHarry Wentland <harry.wentland@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Dave Airlie 提交于
This doesn't return anything except true. Signed-off-by: NDave Airlie <airlied@redhat.com> Reviewed-by: NHarry Wentland <harry.wentland@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Dave Airlie 提交于
This only ever returned true. Signed-off-by: NDave Airlie <airlied@redhat.com> Reviewed-by: NHarry Wentland <harry.wentland@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Dave Airlie 提交于
The checks weren't useful here really. Signed-off-by: NDave Airlie <airlied@redhat.com> Reviewed-by: NHarry Wentland <harry.wentland@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Dave Airlie 提交于
This can't fail as is. Signed-off-by: NDave Airlie <airlied@redhat.com> Reviewed-by: NHarry Wentland <harry.wentland@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 29 9月, 2017 1 次提交
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由 Harry Wentland 提交于
Abstractions are frowned upon. cocci script: virtual context virtual patch virtual org virtual report @@ expression ptr; @@ - dm_alloc(ptr) + kzalloc(ptr, GFP_KERNEL) @@ expression ptr, size; @@ - dm_realloc(ptr, size) + krealloc(ptr, size, GFP_KERNEL) @@ expression ptr; @@ - dm_free(ptr) + kfree(ptr) v2: use GFP_KERNEL, not GFP_ATOMIC. add cocci script Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NHarry Wentland <harry.wentland@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 27 9月, 2017 4 次提交
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由 Shirish S 提交于
For MPO to work with per surface rendering and flipping, the previous logic of restricting plane[1] only as underlay needs to be removed. validate_surface_sets() now checks only the width and height bounds in case of underlay rather than checking format. Without this patch one cannot set underlay only. Signed-off-by: NShirish S <shirish.s@amd.com> Reviewed-by: NHarry Wentland <Harry.Wentland@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Harry Wentland 提交于
Signed-off-by: NHarry Wentland <harry.wentland@amd.com> Reviewed-by: NAndrey Grodzovsky <Andrey.Grodzovsky@amd.com> Acked-by: NHarry Wentland <Harry.Wentland@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Andrey Grodzovsky 提交于
dis_clk is single instance across pipes. Signed-off-by: NAndrey Grodzovsky <Andrey.Grodzovsky@amd.com> Reviewed-by: NHarry Wentland <Harry.Wentland@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Jerry Zuo 提交于
Rename all the dc validate_context to dc_state and dc current_context to current_state. Signed-off-by: NJerry Zuo <Jerry.Zuo@amd.com> Reviewed-by: NHarry Wentland <Harry.Wentland@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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