1. 03 3月, 2014 4 次提交
  2. 08 1月, 2014 1 次提交
  3. 19 8月, 2013 1 次提交
  4. 14 7月, 2013 1 次提交
    • M
      drm/radeon: add missing ttm_eu_backoff_reservation to radeon_bo_list_validate · 1b6e5fd5
      Maarten Lankhorst 提交于
      Op 10-07-13 12:03, Markus Trippelsdorf schreef:
      > On 2013.07.10 at 11:56 +0200, Maarten Lankhorst wrote:
      >> Op 10-07-13 11:46, Markus Trippelsdorf schreef:
      >>> On 2013.07.10 at 11:29 +0200, Maarten Lankhorst wrote:
      >>>> Op 10-07-13 11:22, Markus Trippelsdorf schreef:
      >>>>> By simply copy/pasting a big document under LibreOffice my system hangs
      >>>>> itself up. Only a hard reset gets it working again.
      >>>>> see also: https://bugs.freedesktop.org/show_bug.cgi?id=66551
      >>>>>
      >>>>> I've bisected the issue to:
      >>>>>
      >>>>> commit ecff665f
      >>>>> Author: Maarten Lankhorst <m.b.lankhorst@gmail.com>
      >>>>> Date:   Thu Jun 27 13:48:17 2013 +0200
      >>>>>
      >>>>>     drm/ttm: make ttm reservation calls behave like reservation calls
      >>>>>
      >>>>>     This commit converts the source of the val_seq counter to
      >>>>>     the ww_mutex api. The reservation objects are converted later,
      >>>>>     because there is still a lockdep splat in nouveau that has to
      >>>>>     resolved first.
      >>>>>
      >>>>>     Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com>
      >>>>>     Reviewed-by: Jerome Glisse <jglisse@redhat.com>
      >>>>>     Signed-off-by: Dave Airlie <airlied@redhat.com>
      >>>> Hey,
      >>>>
      >>>> Can you try current head with CONFIG_PROVE_LOCKING set and post the
      >>>> lockdep splat from dmesg, if any? If there is any locking issue
      >>>> lockdep should warn about it.  Lockdep will turn itself off after the
      >>>> first splat, so if the lockdep splat happens before running the
      >>>> affected parts those will have to be fixed first.
      >>> There was an unrelated EDAC lockdep splat, so I simply disabled it.
      
      > >>> This is what I get:
      
      >>> Jul 10 11:40:44 x4 kernel: ================================================
      >>> Jul 10 11:40:44 x4 kernel: [ BUG: lock held when returning to user space! ]
      >>> Jul 10 11:40:44 x4 kernel: 3.10.0-08587-g496322bc #35 Not tainted
      >>> Jul 10 11:40:44 x4 kernel: ------------------------------------------------
      >>> Jul 10 11:40:44 x4 kernel: X/211 is leaving the kernel with locks still held!
      >>> Jul 10 11:40:44 x4 kernel: 2 locks held by X/211:
      >>> Jul 10 11:40:44 x4 kernel: #0:  (reservation_ww_class_acquire){+.+.+.}, at: [<ffffffff813279f0>] radeon_bo_list_validate+0x20/0xd0
      >>> Jul 10 11:40:44 x4 kernel: #1:  (reservation_ww_class_mutex){+.+.+.}, at: [<ffffffff81309306>] ttm_eu_reserve_buffers+0x126/0x4b0
      >>> Jul 10 11:40:52 x4 kernel: SysRq : Emergency Sync
      >>> Jul 10 11:40:53 x4 kernel: Emergency Sync complete
      >>>
      >> Thanks, exactly what I thought. I missed a backoff somewhere..
      >>
      >> Does the below patch fix it?
      > Yes. Thank you for your quick reply.
      
      8<------
      If radeon_cs_parser_relocs fails ttm_eu_backoff_reservation doesn't get called.
      This left open a bug where ttm_eu_reserve_buffers succeeded but the bo's were
      not unlocked afterwards:
      
      Jul 10 11:40:44 x4 kernel: ================================================
      Jul 10 11:40:44 x4 kernel: [ BUG: lock held when returning to user space! ]
      Jul 10 11:40:44 x4 kernel: 3.10.0-08587-g496322bc #35 Not tainted
      Jul 10 11:40:44 x4 kernel: ------------------------------------------------
      Jul 10 11:40:44 x4 kernel: X/211 is leaving the kernel with locks still held!
      Jul 10 11:40:44 x4 kernel: 2 locks held by X/211:
      Jul 10 11:40:44 x4 kernel: #0:  (reservation_ww_class_acquire){+.+.+.}, at: [<ffffffff813279f0>] radeon_bo_list_validate+0x20/0xd0
      Jul 10 11:40:44 x4 kernel: #1:  (reservation_ww_class_mutex){+.+.+.}, at: [<ffffffff81309306>] ttm_eu_reserve_buffers+0x126/0x4b0
      Jul 10 11:40:52 x4 kernel: SysRq : Emergency Sync
      Jul 10 11:40:53 x4 kernel: Emergency Sync complete
      
      This is a regression caused by commit ecff665f.
      "drm/ttm: make ttm reservation calls behave like reservation calls"
      Reported-by: NMarkus Trippelsdorf <markus@trippelsdorf.de>
      Tested-by: NMarkus Trippelsdorf <markus@trippelsdorf.de>
      Signed-off-by: NMaarten Lankhorst <maarten.lankhorst@canonical.com>
      Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
      1b6e5fd5
  5. 28 6月, 2013 3 次提交
  6. 31 5月, 2013 1 次提交
  7. 09 4月, 2013 3 次提交
  8. 18 1月, 2013 1 次提交
  9. 14 12月, 2012 1 次提交
  10. 13 12月, 2012 1 次提交
  11. 10 12月, 2012 2 次提交
  12. 08 12月, 2012 1 次提交
  13. 20 11月, 2012 1 次提交
  14. 07 11月, 2012 1 次提交
  15. 24 10月, 2012 2 次提交
  16. 03 10月, 2012 1 次提交
  17. 21 9月, 2012 3 次提交
  18. 21 8月, 2012 1 次提交
  19. 13 8月, 2012 1 次提交
  20. 25 7月, 2012 2 次提交
  21. 21 6月, 2012 1 次提交
  22. 23 5月, 2012 2 次提交
  23. 02 4月, 2012 1 次提交
  24. 28 3月, 2012 1 次提交
  25. 20 3月, 2012 1 次提交
  26. 13 2月, 2012 1 次提交
    • J
      drm/radeon: add support for evergreen/ni tiling informations v11 · 285484e2
      Jerome Glisse 提交于
      evergreen and northern island gpu needs more informations for 2D tiling
      than previous r6xx/r7xx. Add field to tiling ioctl to allow userspace
      to provide those.
      
      The v8 cs checking change to track color view on r6xx/r7xx doesn't
      affect old userspace as old userspace always emited 0 for this register.
      
      v2 fix r6xx/r7xx 2D tiling computation
      v3 fix r6xx/r7xx height align for untiled surface & add support for
         tile split on evergreen and newer
      v4 improve tiling debugging output
      v5 fix tile split code for evergreen and newer
      v6 set proper tile split for crtc register
      v7 fix tile split limit value
      v8 add COLOR_VIEW checking to r6xx/r7xx checker, add evergreen cs
         checking, update safe reg for r600, evergreen and cayman.
         Evergreen checking need some work around for stencil alignment
         issues
      v9 fix tile split value range, fix compressed texture handling and
         mipmap calculation, allow evergreen check to be silencious in
         front of current broken userspace (depth/stencil alignment issue)
      v10 fix eg 3d texture and compressed texture, fix r600 depth array,
          fix r600 color view computation, add support for evergreen stencil
          split
      v11 more verbose debugging in some case
      Signed-off-by: NJerome Glisse <jglisse@redhat.com>
      Signed-off-by: NDave Airlie <airlied@redhat.com>
      285484e2
  27. 06 1月, 2012 1 次提交
    • J
      drm/radeon: GPU virtual memory support v22 · 721604a1
      Jerome Glisse 提交于
      Virtual address space are per drm client (opener of /dev/drm).
      Client are in charge of virtual address space, they need to
      map bo into it by calling DRM_RADEON_GEM_VA ioctl.
      
      First 16M of virtual address space is reserved by the kernel.
      
      Once using 2 level page table we should be able to have a small
      vram memory footprint for each pt (there would be one pt for all
      gart, one for all vram and then one first level for each virtual
      address space).
      
      Plan include using the sub allocator for a common vm page table
      area and using memcpy to copy vm page table in & out. Or use
      a gart object and copy things in & out using dma.
      
      v2: agd5f fixes:
      - Add vram base offset for vram pages.  The GPU physical address of a
      vram page is FB_OFFSET + page offset.  FB_OFFSET is 0 on discrete
      cards and the physical bus address of the stolen memory on
      integrated chips.
      - VM_CONTEXT1_PROTECTION_FAULT_DEFAULT_ADDR covers all vmid's >= 1
      
      v3: agd5f:
      - integrate with the semaphore/multi-ring stuff
      
      v4:
      - rebase on top ttm dma & multi-ring stuff
      - userspace is now in charge of the address space
      - no more specific cs vm ioctl, instead cs ioctl has a new
        chunk
      
      v5:
      - properly handle mem == NULL case from move_notify callback
      - fix the vm cleanup path
      
      v6:
      - fix update of page table to only happen on valid mem placement
      
      v7:
      - add tlb flush for each vm context
      - add flags to define mapping property (readable, writeable, snooped)
      - make ring id implicit from ib->fence->ring, up to each asic callback
        to then do ring specific scheduling if vm ib scheduling function
      
      v8:
      - add query for ib limit and kernel reserved virtual space
      - rename vm->size to max_pfn (maximum number of page)
      - update gem_va ioctl to also allow unmap operation
      - bump kernel version to allow userspace to query for vm support
      
      v9:
      - rebuild page table only when bind and incrementaly depending
        on bo referenced by cs and that have been moved
      - allow virtual address space to grow
      - use sa allocator for vram page table
      - return invalid when querying vm limit on non cayman GPU
      - dump vm fault register on lockup
      
      v10: agd5f:
      - Move the vm schedule_ib callback to a standalone function, remove
        the callback and use the existing ib_execute callback for VM IBs.
      
      v11:
      - rebase on top of lastest Linus
      
      v12: agd5f:
      - remove spurious backslash
      - set IB vm_id to 0 in radeon_ib_get()
      
      v13: agd5f:
      - fix handling of RADEON_CHUNK_ID_FLAGS
      
      v14:
      - fix va destruction
      - fix suspend resume
      - forbid bo to have several different va in same vm
      
      v15:
      - rebase
      
      v16:
      - cleanup left over of vm init/fini
      
      v17: agd5f:
      - cs checker
      
      v18: agd5f:
      - reworks the CS ioctl to better support multiple rings and
      VM.  Rather than adding a new chunk id for VM, just re-use the
      IB chunk id and add a new flags for VM mode.  Also define additional
      dwords for the flags chunk id to define the what ring we want to use
      (gfx, compute, uvd, etc.) and the priority.
      
      v19:
      - fix cs fini in weird case of no ib
      - semi working flush fix for ni
      - rebase on top of sa allocator changes
      
      v20: agd5f:
      - further CS ioctl cleanups from Christian's comments
      
      v21: agd5f:
      - integrate CS checker improvements
      
      v22: agd5f:
      - final cleanups for release, only allow VM CS on cayman
      Signed-off-by: NJerome Glisse <jglisse@redhat.com>
      Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
      Signed-off-by: NDave Airlie <airlied@redhat.com>
      721604a1