- 07 4月, 2017 2 次提交
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由 Richard Genoud 提交于
This adds support for the Winstar Display Co. WF35LTIACD 3.5" QVGA TFT LCD panel, which can be supported by the simple panel driver. Acked-by: NRob Herring <robh@kernel.org> Signed-off-by: NRichard Genoud <richard.genoud@gmail.com> Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Yannick Fertre 提交于
Add simple-panel support for the Ampire AM-480272H3TMQW-T01H, which is a 4.3" WQVGA panel. Signed-off-by: NYannick Fertre <yannick.fertre@st.com> Signed-off-by: NThierry Reding <treding@nvidia.com>
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- 26 1月, 2017 4 次提交
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由 Stefan Agner 提交于
The display has a 18-Bit parallel LCD interface, require DE to be active high and data driven by the controller on falling pixel clock edge (display samples on rising edge). Signed-off-by: NStefan Agner <stefan@agner.ch> Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Maxime Ripard 提交于
The E231732 is a 7" panel with a resolution of 1024x600. Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com> [treding@nvidia.com: add missing device tree binding] Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Gary Bisson 提交于
The Tianma TM070JDHG30 is a 7" LVDS display with a resolution of 1280x800. http://usa.tianma.com/products-technology/product/tm070jdhg30-00 You can also find this product along with a FT5x06 touch controller from Boundary Devices: https://boundarydevices.com/product/bd070lic2/Signed-off-by: NGary Bisson <gary.bisson@boundarydevices.com> Acked-by: NRob Herring <robh@kernel.org> Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Caesar Wang 提交于
The BOE NV101WXMN51 is a 10.1" WXGA color active matrix TFT LCD module using amorphous silicon TFT's as an active switching devices. It can be supported by the simple-panel driver. Read the panel default EDID information: EDID MODE DETAILS name = <NULL> pixel_clock = 71900 lvds_dual_channel = 0 refresh = 0 ha = 1280 hbl = 160 hso = 48 hspw = 32 hborder = 0 va = 800 vbl = 32 vso = 3 vspw = 5 vborder = 0 phsync = + pvsync = - x_mm = 0 y_mm = 0 drm_display_mode .hdisplay = 1280 .hsync_start = 1328 .hsync_end = 1360 .htotal = 1440 .vdisplay = 800 .vsync_start = 803 .vsync_end = 808 .vtotal = 832 There are two modes in the EDID: Detailed mode1: Clock 71.900 MHz, 216 mm x 135 mm 1280 1328 1360 1440 hborder 0 800 803 808 832 vborder 0 +hsync -vsync Detailed mode2: Clock 57.500 MHz, 216 mm x 135 mm 1280 1328 1360 1440 hborder 0 800 803 808 832 vborder 0 +hsync -vsync Support both of these modes on the panel. Signed-off-by: NCaesar Wang <wxt@rock-chips.com> Reviewed-by: NDouglas Anderson <dianders@chromium.org> Reviewed-by: NStéphane Marchesin <marcheu@chromium.org> Signed-off-by: NThierry Reding <treding@nvidia.com>
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- 07 12月, 2016 2 次提交
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由 Lucas Stach 提交于
This adds support for the AU Optronics G185HAN01 18.5" LVDS FullHD TFT LCD panel, which can be supported by the simple panel driver. Signed-off-by: NLucas Stach <l.stach@pengutronix.de> Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Lucas Stach 提交于
This adds support for the AU Optronics G133HAN01 13.3" LVDS FullHD TFT LCD panel, which can be supported by the simple panel driver. Signed-off-by: NLucas Stach <l.stach@pengutronix.de> Signed-off-by: NThierry Reding <treding@nvidia.com>
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- 06 12月, 2016 4 次提交
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由 Lucas Stach 提交于
Convert from a single mode to display timings, which allow to describe the minimum/maximium blanking and clock rates, add enable/disable delays and provide the bus format. Signed-off-by: NLucas Stach <l.stach@pengutronix.de> Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 zain wang 提交于
The Sharp LQ123P1JX31 panel support 8 bits per component. Signed-off-by: Nzain wang <wzz@rock-chips.com> Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Chen-Yu Tsai 提交于
In the loop on .timings, we should check .num_timings to see if it's the only mode specified, not .num_modes, which should be used with .modes. Fixes: cda55372 ("drm/panel: simple: Set appropriate mode type") Signed-off-by: NChen-Yu Tsai <wens@csie.org> Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Randy Li 提交于
The Chunghwa CLAA070WP03XG is a 7" 1280x800 panel, which can be supported by the simple panel driver. Signed-off-by: NRandy Li <ayaka@soulik.info> Signed-off-by: NThierry Reding <treding@nvidia.com>
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- 19 10月, 2016 3 次提交
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由 Fabien Lahoudere 提交于
Add New Vision Display 7.0" 800 RGB x 480 TFT LCD panel Signed-off-by: NFabien Lahoudere <fabien.lahoudere@collabora.co.uk> Acked-by: NRob Herring <robh@kernel.org> Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Haixia Shi 提交于
The AUO T215HVN01 is a 21.5" FHD (1920x1080) color TFT LCD panel. This panel is used on the Acer Chromebase 21.5-inch All-in-One (DC221HQ). Link to spec: http://www.udmgroup.com/ftp/T215HVN01.0.pdf v2: fix alphabetical order v3: remove minor revision suffix ".0" and add link to spec v4: add dt-binding documentation Signed-off-by: NHaixia Shi <hshi@chromium.org> Tested-by: NHaixia Shi <hshi@chromium.org> Reviewed-by: NStéphane Marchesin <marcheu@chromium.org> Cc: Emil Velikov <emil.l.velikov@gmail.com> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: David Airlie <airlied@linux.ie> Cc: Rob Herring <robh+dt@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Acked-by: NRob Herring <robh@kernel.org> Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Gustaf Lindström 提交于
The Sharp 15" LQ150X1LG11 panel is an XGA TFT LCD panel. The simple-panel driver is used to get support for essential functionality of the panel. Signed-off-by: NGustaf Lindström <gl@axentia.se> Signed-off-by: NPeter Rosin <peda@axentia.se> [treding@nvidia.com: change .bpc from 8 to 6] Signed-off-by: NThierry Reding <treding@nvidia.com>
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- 16 9月, 2016 4 次提交
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由 Jonathan Liu 提交于
The format is RGB888 not RGB666. Signed-off-by: NJonathan Liu <net147@gmail.com> Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Brian Norris 提交于
Taking our cue from commit a42f6e3f ("drm/panel: simple: Add delay timing for Sharp LQ123P1JX31"), let's add timings: .prepare = t1 + t3 .enable = t7 .unprepare = t11 + 12 Without this, the panel may not be given enough time to come up. Signed-off-by: NBrian Norris <briannorris@chromium.org> Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Marek Vasut 提交于
This display expects DE pin and data lines to be active high, add the necessary flags. Signed-off-by: NMarek Vasut <marex@denx.de> Cc: Philipp Zabel <p.zabel@pengutronix.de> Cc: Thierry Reding <treding@nvidia.com> Reviewed-by: NPhilipp Zabel <p.zabel@pengutronix.de> Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Michael Olbrich 提交于
This patch adds support for Innolux Corporation 10.1" G101ICE-L01 WXGA (1280x800) LVDS panel to the simple-panel driver. Signed-off-by: NMichael Olbrich <m.olbrich@pengutronix.de> Signed-off-by: NLucas Stach <l.stach@pengutronix.de> Signed-off-by: NThierry Reding <treding@nvidia.com>
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- 24 8月, 2016 1 次提交
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由 Yakir Yang 提交于
According to page 16 of the Sharp LQ123P1JX31 datasheet, we need to add the missing delay timing. Panel prepare time should be t1 (0.5 to 10 ms) plus t3 (0 to 100 ms), panel enable time should equal to t7 (0 to 50 ms) and panel unprepare time should be t11 (1 to 50 ms) plus t12 (500 ms). Signed-off-by: NYakir Yang <ykk@rock-chips.com> Reviewed-by: NSean Paul <seanpaul@chromium.org> Signed-off-by: NThierry Reding <treding@nvidia.com>
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- 11 7月, 2016 7 次提交
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由 Douglas Anderson 提交于
The Starry KR122EA0SRA is a 12.2", 1920x1200 TFT-LCD panel connected using eDP interfaces. EDID shows: Detailed mode: Clock 147.000 MHz, 263 mm x 164 mm 1920 1936 1952 1984 hborder 0 1200 1215 1217 1235 vborder 0 -hsync -vsync Manufacturer-specified data, tag 15 ASCII string: STARRY ASCII string: KR122EA0SRA Signed-off-by: NDouglas Anderson <dianders@chromium.org> Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Joshua Clayton 提交于
Add simple-panel support for the Sharp LQ101K1LY04, which is a 10" WXGA (1280x800) LVDS panel. Signed-off-by: NJoshua Clayton <stillcompiling@gmail.com> Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Yakir Yang 提交于
The LG LP079QX1-SP0V is an 7.9" QXGA TFT with LED Backlight unit and 32 pins eDP interface. This module supports 1536x2048 mode. Signed-off-by: NYakir Yang <ykk@rock-chips.com> Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Yakir Yang 提交于
The Sharp LQ123P1JX31 is an 12.3", 2400x1600 TFT-LCD panel connected using eDP interfaces. Signed-off-by: NYakir Yang <ykk@rock-chips.com> Reviewed-by: NDoug Anderson <dianders@chromium.org> Tested-by: NDoug Anderson <dianders@chromium.org> Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Yakir Yang 提交于
The Samsung LSN122DL01-C01 is an 12.2" 2560x1600 (WQXGA) TFT-LCD panel connected using eDP interfaces. Signed-off-by: NYakir Yang <ykk@rock-chips.com> Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Yakir Yang 提交于
The LG LP097QX1-SPA1 is an 9.7", 2048x1536 (QXGA) TFT-LCD panel connected using eDP interfaces. Signed-off-by: NYakir Yang <ykk@rock-chips.com> Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Thierry Reding 提交于
Some backlight drivers ignore the power property and instead only use the state property. Fixup the panel driver to set the state property in addition to the power property. Signed-off-by: NThierry Reding <treding@nvidia.com>
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- 13 6月, 2016 1 次提交
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由 Thierry Reding 提交于
This blank line was introduced in commit c8521969 ("drm/panel: simple: Add support for BOE TV080WUM-NL0"), likely by mistake. Reviewed-by: NDaniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: NThierry Reding <treding@nvidia.com>
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- 10 6月, 2016 1 次提交
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由 Thierry Reding 提交于
Both the Innolux ZJ070NA-01P and Samsung LTN101NT05 were listing the horizontal and vertical resolutions in the size.width and size.height fields, whereas they should contain the physical dimensions of the panel. Signed-off-by: NThierry Reding <treding@nvidia.com>
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- 12 5月, 2016 6 次提交
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由 Bhuvanchandra DV 提交于
Add support for TPK U.S.A. LLC Fusion 7", 10.1" panels to the DRM simple panel driver. Signed-off-by: NBhuvanchandra DV <bhuvanchandra.dv@toradex.com> Acked-by: NRob Herring <robh@kernel.org> Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Riccardo Bortolato 提交于
Add support for the Innolux AT070TN92 panel. Signed-off-by: NRiccardo Bortolato <bortolato@navaltechitalia.it> Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Boris Brezillon 提交于
drm_display_mode_from_videomode() already calls drm_mode_set_name() on the provided mode. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com> [treding@nvidia.com: slightly reword commit message] Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Boris Brezillon 提交于
All modes exposed by simple panels should be tagged as driver defined modes. Moreover, if a panel supports only one mode, this mode is obviously the preferred one. Doing this also fix a problem occurring when a 'video=' parameter is passed on the kernel command line. In some cases the user provided mode will be preferred over the simple panel ones, which might result in unpredictable behavior. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Reviewed-by: NNicolas Ferre <nicolas.ferre@atmel.com> Tested-by: NNicolas Ferre <nicolas.ferre@atmel.com> [treding@nvidia.com: reshuffle some code for consistency] Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Maxime Ripard 提交于
Add support for the Olimex LCD-OLinuXino-4.3TS panel to the DRM simple panel driver. It is a 480x272 panel connected through a 24-bits RGB interface. Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Acked-by: NRob Herring <robh@kernel.org> Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Eric Anholt 提交于
This is a basic TFT panel with a 40-pin FPC connector on it. The specification doesn't define timings, but the Adafruit instructions were setting up 800x480 CVT. v2: Add .bus_format and vsync/hsync flags. Signed-off-by: NEric Anholt <eric@anholt.net> Acked-by: NRob Herring <robh@kernel.org> [treding@nvidia.com: keep entries properly sorted] Signed-off-by: NThierry Reding <treding@nvidia.com>
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- 06 5月, 2016 2 次提交
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由 Stefan Agner 提交于
The drivers current default configuration drives the pixel data on rising edge of the pixel clock. However, most display sample data on rising edge... This leads to color shift artefacts visible especially at edges. This patch changes the relevant defines to be useful and actually set the bits, and changes pixel clock polarity to drive the pixel data on falling edge by default. The patch also adds an explicit pixel clock polarity flag to the display introduced with the driver (NEC WQVGA "nec,nl4827hc19-05b") using the new bus_flags field to retain the initial behavior. Signed-off-by: NStefan Agner <stefan@agner.ch>
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由 Stefan Agner 提交于
Introduce bus_flags to specify display bus properties like signal polarities. This is useful for parallel display buses, e.g. to specify the pixel clock or data enable polarity. Suggested-by: NThierry Reding <thierry.reding@gmail.com> Acked-by: NPhilipp Zabel <p.zabel@pengutronix.de> Acked-by: NManfred Schlaegl <manfred.schlaegl@gmx.at> Acked-by: NDaniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: NStefan Agner <stefan@agner.ch>
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- 03 3月, 2016 3 次提交
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由 Maciej S. Szmigiero 提交于
Add support for United Radiant Technology UMSH-8596MD-xT 7.0" WVGA TFT LCD panels in the simple-panel driver. Signed-off-by: NMaciej S. Szmigiero <mail@maciej.szmigiero.name> Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Jitao Shi 提交于
The LG lp120up1 TFT LCD panel with eDP interface is a 12.0" 1920x1280 panel, which can be supported by the simple panel driver. Signed-off-by: NJitao Shi <jitao.shi@mediatek.com> Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Akshay Bhat 提交于
Set hsync/vsync to active low for g121x1_l03 panel to match the recommended setting in the datasheet. Signed-off-by: NAkshay Bhat <akshay.bhat@timesys.com> Signed-off-by: NThierry Reding <treding@nvidia.com>
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