提交 eaeebffa 编写于 作者: S Stefan Agner 提交者: Thierry Reding

drm/panel: simple: Specify bus width and flags for EDT displays

The display has a 18-Bit parallel LCD interface, require DE to be
active high and data driven by the controller on falling pixel
clock edge (display samples on rising edge).
Signed-off-by: NStefan Agner <stefan@agner.ch>
Signed-off-by: NThierry Reding <treding@nvidia.com>
上级 e6c2f066
......@@ -802,6 +802,8 @@ static const struct panel_desc edt_et057090dhu = {
.width = 115,
.height = 86,
},
.bus_format = MEDIA_BUS_FMT_RGB666_1X18,
.bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_NEGEDGE,
};
static const struct drm_display_mode edt_etm0700g0dh6_mode = {
......@@ -826,6 +828,8 @@ static const struct panel_desc edt_etm0700g0dh6 = {
.width = 152,
.height = 91,
},
.bus_format = MEDIA_BUS_FMT_RGB666_1X18,
.bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_NEGEDGE,
};
static const struct drm_display_mode foxlink_fl500wvr00_a0t_mode = {
......
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