- 27 3月, 2012 1 次提交
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由 Russell King 提交于
Last night's randconfig and the allnoconfig builds spat out the following warning while building: warning: (ARM) selects HAVE_BPF_JIT which has unmet direct dependencies (NET) Acked-by: NMircea Gherzan <mgherzan@gmail.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 26 3月, 2012 1 次提交
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由 Russell King 提交于
Now that Neponset, UCB1x00 and SA1111 are all converted to use the IRQ allocation interfaces, we can enable sparse IRQ support for SA11x0 platforms.
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- 24 3月, 2012 6 次提交
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由 Linus Walleij 提交于
This converts the Integrator AP/CP to use sparse IRQs. Tested on both machines. Acked-by: NRob Herring <rob.herring@calxeda.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Mircea Gherzan 提交于
Based of Matt Evans's PPC64 implementation. The compiler generates ARM instructions but interworking is supported for Thumb2 kernels. Supports both little and big endian. Unaligned loads are emitted for ARMv6+. Not all the BPF opcodes that deal with ancillary data are supported. The scratch memory of the filter lives on the stack. Hardware integer division is used if it is available. Enabled in the same way as for x86-64 and PPC64: echo 1 > /proc/sys/net/core/bpf_jit_enable A value greater than 1 enables opcode output. Signed-off-by: NMircea Gherzan <mgherzan@gmail.com> Acked-by: NDavid S. Miller <davem@davemloft.net> Acked-by: NEric Dumazet <eric.dumazet@gmail.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Rabin Vincent 提交于
Add the arch-specific code to support jump labels for ARM and Thumb-2. This code will only be activated on compilers that are capable of building it. It has been tested with GCC 4.6 patched with the patch from GCC bug 48637. Cc: Jason Baron <jbaron@redhat.com> Signed-off-by: NRabin Vincent <rabin@rab.in> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
On Versatile Express, the PCI Express buses are broken and unusable, so we aren't going to support PCI/ISA IO cycles on this platform. Remove the PCI/ISA IO inb et.al. support for this platform. Acked-by: NCatalin Marinas <catalin.marinas@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Imre Kaloz 提交于
Wire up support for the XZ decompressor Signed-off-by: NImre Kaloz <kaloz@openwrt.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
Nothing but RiscPC makes use of the Acorn timekeeping code, so move it into mach-rpc. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 07 3月, 2012 1 次提交
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由 Heiko Stuebner 提交于
The S3C2416 now reuses the dma selection of the S3C2443. Therefore it is not necessary to keep the S3C2416_DMA option around. Signed-off-by: NHeiko Stuebner <heiko@sntech.de> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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- 03 3月, 2012 3 次提交
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由 Kukjin Kim 提交于
This patch moves S3C2443 stuff into mach-s3c24xx/ directory so that we can merge the s3c24 series' directories to the just one mach-s3c24xx/ directory. Cc: Ben Dooks <ben-linux@fluff.org> Cc: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Kukjin Kim 提交于
This patch moves S3C2410 stuff into mach-s3c24xx/ directory so that we can merge the s3c24 series' directories to the just one mach-s3c24xx/ directory. And this patch is including following. - re-ordered alphabetically by option text at Kconfig and Makefile - removed unused option, MACH_N35 - fixed duplcated option name, S3C2410_DMA to S3C24XX_DMA which is in plat-s3c24xx/ Cc: Ben Dooks <ben-linux@fluff.org> Cc: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Kukjin Kim 提交于
This patch changes the ARCH name to "ARCH_S3C24XX" for Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, and S3C2450 SoCs so that we can merge the mach-xxx directories and plat-s3c24xx dir. to just one mach-s3c24xx for them. I think this should be sent to upstream via samsung tree because this touches many samsung stuff. Cc: Dmitry Torokhov <dmitry.torokhov@gmail.com> Cc: Richard Purdie <rpurdie@rpsys.net> Cc: Chris Ball <cjb@laptop.org> Cc: David Woodhouse <dwmw2@infradead.org> Cc: Alessandro Zummo <a.zummo@towertech.it> Cc: Grant Likely <grant.likely@secretlab.ca> Cc: Greg Kroah-Hartman <gregkh@suse.de> [for the gadget part:] Acked-by: NFelipe Balbi <balbi@ti.com> [for the framebuffer (video) part:] Acked-by: NFlorian Tobias Schandinat <FlorianSchandinat@gmx.de> [For the watchdog-part:] Acked-by: NWim Van Sebroeck <wim@iguana.be> Cc: Sangbeom Kim <sbkim73@samsung.com> Cc: Liam Girdwood <lrg@ti.com> Cc: Mark Brown <broonie@opensource.wolfsonmicro.com> Cc: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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- 01 3月, 2012 2 次提交
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由 Nicolas Ferre 提交于
Add an irqdomain for the AIC interrupt controller. The device tree support is mapping the registers and is using the irq_domain_add_legacy() to manage hwirq translation. The documentation is describing the meaning of the two cells required for using this "interrupt-controller" in a device tree node. Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Acked-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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由 Arnd Bergmann 提交于
There is no way to build U8500 kernels without an MMU at this point because of dependencies on MMU-only functions. As long as nobody is interested in fixing this, let's just disable the platforms for nommu kernels. Signed-off-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NMathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 29 2月, 2012 1 次提交
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由 Philippe Langlais 提交于
This is due to the increased number of AB8500 GPIOs. Signed-off-by: NPhilippe Langlais <philippe.langlais@linaro.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 28 2月, 2012 2 次提交
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由 Paul Parsons 提交于
The hx4700 platform has 72 board gpios: 64 ASIC3 gpios numbered 192..255, and 8 EGPIO gpios numbered 256..263 (plus a 9th which is not used). Thus the new CONFIG_ARCH_NR_GPIO config option must be set to 264. Signed-off-by: NPaul Parsons <lost.distance@yahoo.com> Acked-by: NPhilipp Zabel <philipp.zabel@gmail.com> Signed-off-by: NHaojian Zhuang <haojian.zhuang@gmail.com>
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由 Jett.Zhou 提交于
Add rtc clock support and clean clock support for gpio. Signed-off-by: NJett.Zhou <jtzhou@marvell.com> signed-off-by: NHaojian Zhuang <haojian.zhuang@marvell.com>
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- 27 2月, 2012 1 次提交
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由 Will Deacon 提交于
Erratum #743622 affects all r2 variants of the Cortex-A9 processor, so ensure that the workaround is applied regardless of the revision. Cc: <stable@vger.kernel.org> Reported-by: NRussell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: NWill Deacon <will.deacon@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 22 2月, 2012 1 次提交
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由 Rob Herring 提交于
Only 3 platforms need arch_ret_to_user macro, so add ARCH_HAS_RET_TO_USER kconfig option and make iop13xx, iop32x and iop33x select it. Signed-off-by: NRob Herring <rob.herring@calxeda.com> Acked-by: NNicolas Pitre <nico@linaro.org>
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- 10 2月, 2012 1 次提交
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由 Rob Herring 提交于
Add a sched_clock support for the sp804 timer. The clocksource timer can optionally initialize itself as sched_clock timer. Signed-off-by: NRob Herring <rob.herring@calxeda.com>
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- 03 2月, 2012 4 次提交
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Following removal announce and addition to feature-removal-schedule.txt, here is the actual source code deletion for Atmel CAP9 family. Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Marc Zyngier 提交于
All sched_clock() providers have been converted to the sched_clock framework, which also provides a jiffy based implementation for the platforms that do not provide a counter. It is now possible to make the sched_clock framework mandatory, effectively preventing new platforms to add new sched_clock() functions, which would be detrimental to the single zImage work. Acked-by: NNicolas Pitre <nico@linaro.org> Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
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由 Marc Zyngier 提交于
Prima2 has its own sched_clock() implementation, which gets in the way of a single zImage. Moving to the common sched_clock framework makes the code slightly cleaner (the mapping hack in sched_clock() goes away...). Acked-by: NBarry Song <baohua.song@csr.com> Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
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由 Marc Zyngier 提交于
Davinci has its own sched_clock() implementation, which gets in the way of a single zImage. Moving to the common sched_clock framework makes the code slightly cleaner. Acked-by: NSekhar Nori <nsekhar@ti.com> Cc: Kevin Hilman <khilman@ti.com> Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
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- 31 1月, 2012 1 次提交
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由 Rob Herring 提交于
irqs.h is optional now for SPARSE_IRQ, so select it and remove mach/irqs.h from highbank. Signed-off-by: NRob Herring <rob.herring@calxeda.com>
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- 26 1月, 2012 1 次提交
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由 Rob Herring 提交于
On ARM, we don't want SPARSE_IRQ to be a user visible option. Make SPARSE_IRQ visible based on MAY_HAVE_SPARSE_IRQ instead of depending on HAVE_SPARSE_IRQ. With this, SPARSE_IRQ is not visible on C6X and ARM. Signed-off-by: NRob Herring <rob.herring@calxeda.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Mark Salter <msalter@redhat.com> Cc: Aurelien Jacquiot <a-jacquiot@ti.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Ingo Molnar <mingo@redhat.com> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Cc: linux-c6x-dev@linux-c6x.org Cc: linuxppc-dev@lists.ozlabs.org Cc: linux-sh@vger.kernel.org
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- 23 1月, 2012 1 次提交
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由 Will Deacon 提交于
To ensure correct alignment of cacheline-aligned data, the maximum cacheline size needs to be known at compile time. Since Cortex-A8 and Cortex-A15 have 64-byte cachelines (and it is likely that there will be future ARMv7 implementations with the same line size) then it makes sense to assume that CPU_V7 implies a 64-byte L1 cacheline size. For CPUs with smaller caches, this will result in some harmless padding but will help with single zImage work and avoid hitting subtle bugs with misaligned data structures. Signed-off-by: NWill Deacon <will.deacon@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 19 1月, 2012 1 次提交
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由 Russell King 提交于
This reverts commit edf3ff5b. This revert is necessary to revert the broken "RTC: sa1100: support sa1100, pxa and mmp soc families" change.
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- 11 1月, 2012 1 次提交
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由 David Daney 提交于
Randomization of PIE load address is hard coded in binfmt_elf.c for X86 and ARM. Create a new Kconfig variable (CONFIG_ARCH_BINFMT_ELF_RANDOMIZE_PIE) for this and use it instead. Thus architecture specific policy is pushed out of the generic binfmt_elf.c and into the architecture Kconfig files. X86 and ARM Kconfigs are modified to select the new variable so there is no change in behavior. A follow on patch will select it for MIPS too. Signed-off-by: NDavid Daney <david.daney@cavium.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Ingo Molnar <mingo@redhat.com> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Alexander Viro <viro@zeniv.linux.org.uk> Acked-by: NH. Peter Anvin <hpa@zytor.com> Cc: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 05 1月, 2012 1 次提交
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由 Hans J. Koch 提交于
The Telechips subarchitecture is being completely removed. Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Harry Sievers <hsievers@csselectronic.com> Signed-off-by: NHans J. Koch <hjk@hansjkoch.de>
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- 28 12月, 2011 2 次提交
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由 Shawn Guo 提交于
This patch adds clk_prepare/clk_unprepare for mxs clock api by renaming the existing non-atomic clk_enable/clk_disable to clk_prepare/clk_unprepare and adding a pair of dummy clk_enable/clk_disable. Then with selecting HAVE_CLK_PREPARE for mxs clock, we can fix the mutex locking warning that has been reported for a few times. Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Jett.Zhou 提交于
Signed-off-by: NJett.Zhou <jtzhou@marvell.com> Acked-by: NHaojian Zhuang <haojian.zhuang@gmail.com> Acked-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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- 24 12月, 2011 5 次提交
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Add default value for CONFIG_ARCH_NR_GPIO to Kconfig and remove the definition in gpio.h. We can't remove gpio.h yet as asm/gpio.h still includes it. Signed-off-by: NPeter De Schrijver <pdeschrijver@nvidia.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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Add default value for CONFIG_ARCH_NR_GPIO to Kconfig and remove the definition in gpio.h. Signed-off-by: NPeter De Schrijver <pdeschrijver@nvidia.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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Change ARCH_NR_GPIO into a Kconfig variable as suggested by Russel King. This makes ARCH_NR_GPIO single zImage friendly. The default value for tegra is defined as well. Signed-off-by: NPeter De Schrijver <pdeschrijver@nvidia.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Dave Martin 提交于
Activation conditions for a workaround should not be encoded in the workaround's direct dependencies if this makes otherwise reasonable configuration choices impossible. This patches uses the SMP/UP patching facilities instead to compile out the workaround if the configuration means that it is definitely not needed. This means that configs for buggy silicon can simply select ARM_ERRATA_751472, without preventing a UP kernel from being built or duplicatiing knowledge about when to activate the workaround. This seems the correct way to do things, because the erratum is a property of the silicon, irrespective of what the kernel config happens to be. Signed-off-by: NDave Martin <dave.martin@linaro.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Dave Martin 提交于
Activation conditions for a workaround should not be encoded in the workaround's direct dependencies if this makes otherwise reasonable configuration choices impossible. The workaround for erratum 720789 only affects a code path which is not active in UP kernels; hence it should be safe to turn on in UP kernels, without penalty. This patch simply removes the extra dependency on SMP from Kconfig. This means that configs for buggy silicon can simply select ARM_ERRATA_720789, without preventing a UP kernel from being built or duplicatiing knowledge about when to activate the workaround. Signed-off-by: NDave Martin <dave.martin@linaro.org> Acked-by: NWill Deacon <will.deacon@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 19 12月, 2011 3 次提交
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由 Dave Martin 提交于
If running in the Normal World on a TrustZone-enabled SoC, Linux does not have complete control over the L2 cache controller configuration. The kernel cannot work reliably on such platforms without the l2x0 cache support code built in. This patch unconditionally enables l2x0 support for the Highbank SoC. Thanks to Rob Herring for this suggestion. [1] [1] http://lists.infradead.org/pipermail/linux-arm-kernel/2011-November/074495.htmlSigned-off-by: NDave Martin <dave.martin@linaro.org> Acked-by: NRob Herring <rob.herring@calxeda.com>
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由 Dave Martin 提交于
Making SMP depend on (huge list of MACH_ and ARCH_ configs) is bothersome to maintain and likely to lead to merge conflicts. This patch moves the knowledge of which platforms are SMP-capable to the individual machines. To enable this, a new HAVE_SMP config option is introduced to allow machines to indicate that they can run in a SMP configuration. Signed-off-by: NDave Martin <dave.martin@linaro.org> Acked-by: NLinus Walleij <linus.walleij@linaro.org> (for nomadik, ux500) Acked-by: NTony Lindgren <tony@atomide.com> (for omap) Acked-by: NKukjin Kim <kgene.kim@samsung.com> (for exynos) Acked-by: NSascha Hauer <s.hauer@pengutronix.de> (for imx) Acked-by: NOlof Johansson <olof@lixom.net> (for tegra)
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由 Dave Martin 提交于
Making CACHE_L2X0 depend on (huge list of MACH_ and ARCH_ configs) is bothersome to maintain and likely to lead to merge conflicts. This patch moves the knowledge of which platforms have a L2x0 or PL310 cache controller to the individual machines. To enable this, a new MIGHT_HAVE_CACHE_L2X0 config option is introduced to allow machines to indicate that they may have such a cache controller independently of each other. Boards/SoCs which cannot reliably operate without the L2 cache controller support will need to select CACHE_L2X0 directly from their own Kconfigs instead. This applies to some TrustZone-enabled boards where Linux runs in the Normal World, for example. Signed-off-by: NDave Martin <dave.martin@linaro.org> Acked-by: NAnton Vorontsov <cbouatmailru@gmail.com> (for cns3xxx) Acked-by: NTony Lindgren <tony@atomide.com> (for omap) Acked-by: NShawn Guo <shawn.guo@linaro.org> (for imx) Acked-by: NKukjin Kim <kgene.kim@samsung.com> (for exynos) Acked-by: NSascha Hauer <s.hauer@pengutronix.de> (for imx) Acked-by: NOlof Johansson <olof@lixom.net> (for tegra)
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