- 08 11月, 2017 1 次提交
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由 Miquel Raynal 提交于
Add ethtool statistics support by reading the GOP statistics from the hardware counters. Also implement a workqueue to gather the statistics every second or some 32-bit counters could overflow. Suggested-by: NStefan Chulski <stefanc@marvell.com> Signed-off-by: NMiquel Raynal <miquel.raynal@free-electrons.com> Reviewed-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 01 11月, 2017 6 次提交
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由 Antoine Tenart 提交于
Two functions were always used to set the DMA addresses in Tx descriptors, because this address is split into a base+offset in the descriptors. A mask was used to come up with the base and offset addresses and two functions were called, mvpp2_txdesc_dma_addr_set() and mvpp2_txdesc_offset_set(). This patch moves the base+offset calculation logic to mvpp2_txdesc_dma_addr_set(), and removes mvpp2_txdesc_offset_set() to simplify things. Signed-off-by: NAntoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Antoine Tenart 提交于
Cosmetic patch using the MVPP2_AGGR_TXQ_SIZE everywhere instead of the size field of aggr_txq, as the size never change and is always equal to the MVPP2_AGGR_TXQ_SIZE define. Signed-off-by: NAntoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Antoine Tenart 提交于
Too many TSO descriptors can be required for the default queue size, when using small MSS values for example. Prevent this by adding a maximum number of allowed TSO segments (300). In addition set a stop and a wake thresholds to stop the queue when there's no room for a 1 "worst case scenario skb". Wake up the queue when the number of descriptors is low enough. Signed-off-by: NAntoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Antoine Tenart 提交于
This patch initialize the RSS tables to evenly (depending on the packets RSS hashes) distribute the packets across port Rx queues. This helps to handle packets on different CPUs to improve performances, as more queues will be used in parallel. Signed-off-by: NAntoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Antoine Tenart 提交于
So far only the Rx FIFO size was initialized. For PPv2.2 the Tx FIFO size can be set as well. This patch initializes the Tx FIFO size for PPv2.2 controllers to 3K. Signed-off-by: NAntoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Antoine Tenart 提交于
The Rx FIFO size was set to the same value for all ports. This patch sets it depending on the maximum speed a given port can handle. This is only working for PPv2.2. Signed-off-by: NAntoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 26 10月, 2017 3 次提交
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由 Antoine Tenart 提交于
This patch replaces GFP_KERNEL by GFP_ATOMIC to avoid sleeping in the ndo_set_rx_mode() call which is called with BH disabled. Fixes: 3f518509 ("ethernet: Add new driver for Marvell Armada 375 network unit") Signed-off-by: NAntoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Antoine Tenart 提交于
When calling mvpp2_prs_mac_multi_set() from mvpp2_prs_mac_init(), two parameters (the port index and the table index) are inverted. Fixes this. Fixes: 3f518509 ("ethernet: Add new driver for Marvell Armada 375 network unit") Signed-off-by: NAntoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Antoine Tenart 提交于
This patch fixes a typo in the mvpp2_prs_tcam_data_cmp() function, as the shift value is inverted with the data. Fixes: 3f518509 ("ethernet: Add new driver for Marvell Armada 375 network unit") Signed-off-by: NAntoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 24 10月, 2017 3 次提交
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由 Antoine Tenart 提交于
When Tx IRQs are used, txq_bufs_free() can be called from both the Tx path and from NAPI poll(). This led to CPU stalls as if these two tasks (Tx and Poll) are scheduled on two CPUs at the same time, DMA unmapping operations are done on the same txq buffers. This patch adds a check not to call txq_done() from the Tx path if Tx interrupts are used as it does not make sense to do so. Fixes: edc660fa ("net: mvpp2: replace TX coalescing interrupts with hrtimer") Signed-off-by: NAntoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Antoine Tenart 提交于
The TSO header buffers are coming from a per cpu pool and should not be unmapped as they are reused. The PPv2 driver was unmapping all descriptors buffers unconditionally. This patch fixes this by checking the buffers dma addresses before unmapping them, and by not unmapping those who are located in the TSO header pool. Fixes: 186cd4d4 ("net: mvpp2: software tso support") Signed-off-by: NAntoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Yan Markman 提交于
TSO headers are managed with txq index and therefore should be aligned with the txq size, not with the aggregated txq size. Fixes: 186cd4d4 ("net: mvpp2: software tso support") Reported-by: NMarc Zyngier <marc.zyngier@arm.com> Signed-off-by: NYan Markman <ymarkman@marvell.com> Signed-off-by: NAntoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 02 10月, 2017 1 次提交
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由 Gregory CLEMENT 提交于
On Armada 7K/8K we need to explicitly enable the bus clock. The bus clock is optional because not all the SoCs need them but at least for Armada 7K/8K it is actually mandatory. The binding documentation is updating accordingly. Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 29 9月, 2017 3 次提交
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由 Antoine Tenart 提交于
This patch stops the internal MAC Tx clock from being enabled as the internal clock isn't used. The definition used for the bit controlling this behaviour is renamed as well as it was wrongly named (bit 4 of GMAC_CTRL_2_REG). Fixes: 3919357f ("net: mvpp2: initialize the GMAC when using a port") Signed-off-by: NAntoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Yan Markman 提交于
The private port_list array has a list of pointers to mvpp2_port instances. This list is allocated given the number of ports enabled in the device tree, but the pointers are set using the port-id property. If on a single port is enabled, the port_list array will be of size 1, but when registering the port, if its id is not 0 the driver will crash. Other crashes were encountered in various situations. This fixes the issue by using an index not equal to the value of the port-id property. Fixes: 3f518509 ("ethernet: Add new driver for Marvell Armada 375 network unit") Signed-off-by: NAntoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: NYan Markman <ymarkman@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Stefan Chulski 提交于
Parsing fragmentation detection failed due to wrong configured parser TCAM entry's. Some traffic was marked as fragmented in RX descriptor, even it wasn't IP fragmented. The hardware also failed to calculate checksums which lead to use software checksum and caused performance degradation. Fixes: 3f518509 ("ethernet: Add new driver for Marvell Armada 375 network unit") Signed-off-by: NAntoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: NStefan Chulski <stefanc@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 20 9月, 2017 1 次提交
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由 Antoine Tenart 提交于
Remove a goto in the PPv2 tx function which jumps to the next line anyway. This is a cosmetic commit. Signed-off-by: NAntoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 04 9月, 2017 3 次提交
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由 Antoine Tenart 提交于
When using a mac address described in the device tree, a check is made to see if it is valid. When it's not, no fallback is defined. This patches tries to get the mac address from h/w (or use a random one if the h/w one isn't valid) when the dt mac address isn't valid. Signed-off-by: NAntoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Antoine Tenart 提交于
The MAC retrieval logic is using a variable to store an h/w stored mac address and checks this mac against invalid ones before using it. But the mac address is only read from h/w when using PPv2.1. So when using PPv2.2 it defaults to its init state. This patches fixes the logic to only check if the h/w mac is valid when actually retrieving a mac from h/w. Signed-off-by: NAntoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Antoine Tenart 提交于
The MAC retrieval has a quite complicated logic (which is broken). Moves it to its own function to prepare for patches fixing its logic, so that reviews are easier. Signed-off-by: NAntoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 02 9月, 2017 3 次提交
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由 Antoine Tenart 提交于
This patch adds the GoP link interrupt support for when a port isn't connected to a PHY. Because of this the phylib callback is never called and the link status management isn't done. This patch use the GoP link interrupt in such cases to still have a minimal link management. Without this patch ports not connected to a PHY cannot work. Signed-off-by: NAntoine Tenart <antoine.tenart@free-electrons.com> Tested-by: NMarcin Wojtas <mw@semihalf.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Antoine Tenart 提交于
There is not necessarily a PHY between the GoP and the physical port. However, the driver currently makes the "phy" property mandatory, contrary to what is stated in the device tree bindings. This patch makes the PHY optional, and aligns the PPv2 driver on its device tree documentation. However if a PHY is provided, the GoP link interrupt won't be used. With this patch switches directly connected to the serdes lanes and SFP ports on the Armada 8040-db and Armada 7040-db can be used if the link interrupt is described in the device tree. Signed-off-by: NAntoine Tenart <antoine.tenart@free-electrons.com> Tested-by: NMarcin Wojtas <mw@semihalf.com> Reviewed-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Antoine Tenart 提交于
Convert all RGMII checks to use the phy_interface_mode_is_rgmii() helper. This is a cosmetic patch. Signed-off-by: NAntoine Tenart <antoine.tenart@free-electrons.com> Reviewed-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 31 8月, 2017 5 次提交
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由 Antoine Tenart 提交于
This patch adds logic to reconfigure the comphy/GoP/MAC when the link state is updated at runtime. This is very useful on boards where many link speed are supported: depending on what is negotiated the PPv2 driver will automatically reconfigures the link between the PHY and the MAC. Signed-off-by: NAntoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Antoine Tenart 提交于
When using the XLG MAC, it does not make sense to force the GMAC autoneg parameters. This patch adds checks to only set the GMAC autoneg parameters when needed (i.e. when not using the XLG MAC). Signed-off-by: NAntoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Antoine Tenart 提交于
When the link status changes, the phylib calls the link_event function in the mvpp2 driver. Before this patch only the egress/ingress transmit was enabled/disabled. This patch adds more functionality to the link status management code by enabling/disabling the port per-cpu interrupts, and the port itself. The queues are now stopped as well, and the netif carrier helpers are called. Signed-off-by: NAntoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Antoine Tenart 提交于
The link_event function is somewhat complicated. This cosmetic patch simplifies it. Signed-off-by: NAntoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Antoine Tenart 提交于
On some platforms, the comphy is between the MAC GoP and the PHYs. The mvpp2 driver currently relies on the firmware/bootloader to configure the comphy. As a comphy driver was added to the generic PHY framework, this patch uses it in the mvpp2 driver to configure the comphy at boot time to avoid relying on the bootloader. Signed-off-by: NAntoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 29 8月, 2017 1 次提交
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由 Antoine Tenart 提交于
The mac address is only retrieved from h/w when using PPv2.1. Otherwise the variable holding it is still checked and used if it contains a valid value. As the variable isn't initialized to an invalid mac address value, we end up with random mac addresses which can be the same for all the ports handled by this PPv2 driver. Fixes this by initializing the h/w mac address variable to {0}, which is an invalid mac address value. This way the random assignation fallback is called and all ports end up with their own addresses. Signed-off-by: NAntoine Tenart <antoine.tenart@free-electrons.com> Fixes: 26975821 ("net: mvpp2: handle misc PPv2.1/PPv2.2 differences") Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 26 8月, 2017 1 次提交
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由 Antoine Ténart 提交于
The MVPP22_XLG_CTRL1_FRAMESIZELIMIT define is used as an offset, but is defined as BIT(0). Updated its name to contains "OFFS" as in offset and fix its value using the offset value, 0. Reported-by: NStefan Chulski <stefanc@marvell.com> Signed-off-by: NAntoine Tenart <antoine.tenart@free-electrons.com> Fixes: 76eb1b1d ("net: mvpp2: set maximum packet size for 10G ports") Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 24 8月, 2017 2 次提交
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由 Antoine Ténart 提交于
The patch uses the tso API to implement the tso functionality in Marvell PPv2 driver. Using iperf and 10G ports, using TSO shows a significant performance improvement by a factor 2 to reach around 9.5Gbps in TX; as well as a significant CPU usage drop (from 25% to 15%). Signed-off-by: NAntoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Antoine Ténart 提交于
The txq size is defined by MVPP2_AGGR_TXQ_SIZE, which is sometime not used directly but through variables. As it is a fixed value use the define everywhere in the driver. Signed-off-by: NAntoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 23 8月, 2017 7 次提交
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由 Antoine Ténart 提交于
The patch adds GoP (group of ports) initialization functions. The mvpp2 driver was relying on the firmware/bootloader initialization; this patch moves this setup to the mvpp2 driver. Signed-off-by: NAntoine Tenart <antoine.tenart@free-electrons.com> Tested-by: NMarcin Wojtas <mw@semihalf.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Stefan Chulski 提交于
Set maximum packet size for XLG 10G ports. Missing maximum packet size for XLG configuration will cause kernel panic if oversized packet is received by port. Signed-off-by: NStefan Chulski <stefanc@marvell.com> Signed-off-by: NAntoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Antoine Ténart 提交于
This adds a routine to initialize the XLG MAC at the port level when using a port and the XAUI/10GKR interface mode. This wasn't done until this commit, and the mvpp2 driver was relying on the bootloader/firmware initialization. This doesn't mean everything is configured in the mvpp2 driver now, but it helps reducing the gap. Signed-off-by: NAntoine Tenart <antoine.tenart@free-electrons.com> Tested-by: NMarcin Wojtas <mw@semihalf.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Antoine Ténart 提交于
This adds a routine to initialize the GMAC at the port level when using a port. This wasn't done until this commit, and the mvpp2 driver was relying on the bootloader/firmware initialization. This doesn't mean everything is configured in the mvpp2 driver now, but it helps reducing the gap. Signed-off-by: NAntoine Tenart <antoine.tenart@free-electrons.com> Tested-by: NMarcin Wojtas <mw@semihalf.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Antoine Ténart 提交于
This moves the mii configuration in the ndo_open path, to allow handling different mii configurations later and to switch between these configurations at runtime. Signed-off-by: NAntoine Tenart <antoine.tenart@free-electrons.com> Tested-by: NMarcin Wojtas <mw@semihalf.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Antoine Ténart 提交于
The macro defining the bit to toggle to bypass or not the synchronization module is wrongly named. Writing 1 will disable bypass. This patch s/MVPP22_CTRL4_SYNC_BYPASS/MVPP22_CTRL4_SYNC_BYPASS_DIS/. Signed-off-by: NAntoine Tenart <antoine.tenart@free-electrons.com> Tested-by: NMarcin Wojtas <mw@semihalf.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Antoine Ténart 提交于
Cosmetic patch to use the same formatting rules on all register definitions. Signed-off-by: NAntoine Tenart <antoine.tenart@free-electrons.com> Tested-by: NMarcin Wojtas <mw@semihalf.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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