- 07 8月, 2008 1 次提交
-
-
由 Russell King 提交于
There are 43 includes of asm/mach-types.h by files that don't reference anything from that file. Remove these unnecessary includes. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
-
- 16 5月, 2007 1 次提交
-
-
由 Dan Williams 提交于
WARNING: arch/arm/mach-iop13xx/built-in.o - Section mismatch: reference to .init.text:iop13xx_pcie_map_irq from .text between 'iop13xx_pci_setup' (at offset 0x7fc) and 'iop13xx_map_pci_memory' While fixing this warning I also recalled Adrian Bunk's recommendation to not use inline in .c files, as 'iop13xx_map_pci_memory' is needlessly inlined. Removing 'inline' uncovered some dead code so that is cleaned up as well. Signed-off-by: NDan Williams <dan.j.williams@intel.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
-
- 12 5月, 2007 1 次提交
-
-
由 Daniel Wolstenholme 提交于
Enable devices to signal interrupts via PCI memory cycles. rev6: * fix enable/disable typo, Michael Ellerman rev5: * fix up ack, enable, and disable for iop13xx_msi_chip rev4: * move smp compile fix to separate patch * use dynamic_irq_init in create_irq() * hookup mask/unmask routines in iop13xx_msi_chip rev3: * change msi.c to use linux/smp.h instead of asm/smp.h * call dynamic_irq_cleanup at destroy_irq time rev2: * destroy_irq did not take the full 128 bits of msi_irq_in_use into account * added missing '&' for calls to test_and_set_bit and clear_bit [ebiederm@xmission.com: review comments/suggestions] [dan.j.williams@intel.com: cleanups/forward port to 2.6-git] Signed-off-by: NDaniel Wolstenholme <daniel.e.wolstenholme@intel.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com> Acked-by: NEric W. Biederman <ebiederm@xmission.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
-
- 17 2月, 2007 1 次提交
-
-
由 Dan Williams 提交于
This functionality is replaced by cp6_trap Signed-off-by: NDan Williams <dan.j.williams@intel.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
-
- 14 2月, 2007 1 次提交
-
-
由 Dan Williams 提交于
Enable svc access to cp6 via an undefined instruction hook. Do not enable access for usr code. This patch also makes iop13xx select PLAT_IOP, this requires a small change to drivers/i2c/busses/i2c-iop3xx.c. Per Lennert Buytenhek's note, the cp6 trap routine is moved to arch/arm/plat-iop Per Nicolas Pitre's note, the cp_wait is skipped since the latency to return to the faulting function is longer than cp_wait. Signed-off-by: NDan Williams <dan.j.williams@intel.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
-
- 20 12月, 2006 1 次提交
-
-
由 Dan Williams 提交于
* use irq_chip * use handle_level_irq Signed-off-by: NDan Williams <dan.j.williams@intel.com> Signed-off-by: NLennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
-
- 08 12月, 2006 1 次提交
-
-
由 Dan Williams 提交于
The iop348 processor integrates an Xscale (XSC3 512KB L2 Cache) core with a Serial Attached SCSI (SAS) controller, multi-ported DDR2 memory controller, 3 Application Direct Memory Access (DMA) controllers, a 133Mhz PCI-X interface, a x8 PCI-Express interface, and other peripherals to form a system-on-a-chip RAID subsystem engine. The iop342 processor replaces the SAS controller with a second Xscale core for dual core embedded applications. The iop341 processor is the single core version of iop342. This patch supports the two Intel customer reference platforms iq81340mc for external storage and iq81340sc for direct attach (HBA) development. The developer's manual is available here: ftp://download.intel.com/design/iio/docs/31503701.pdf Changelog: * removed virtual addresses from resource definitions * cleaned up some unnecessary #include's Signed-off-by: NDan Williams <dan.j.williams@intel.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
-