All ARMv5 and older CPUs invalidate their caches in the early assembly
setup function, prior to enabling the MMU.  This is because the L1
cache should not contain any data relevant to the execution of the
kernel at this point; all data should have been flushed out to memory.

This requirement should also be true for ARMv6 and ARMv7 CPUs - indeed,
these typically do not search their caches when caching is disabled (as
it needs to be when the MMU is disabled) so this change should be safe.

ARMv7 allows there to be CPUs which search their caches while caching is
disabled, and it's permitted that the cache is uninitialised at boot;
for these, the architecture reference manual requires that an
implementation specific code sequence is used immediately after reset
to ensure that the cache is placed into a sane state.  Such
functionality is definitely outside the remit of the Linux kernel, and
must be done by the SoC's firmware before _any_ CPU gets to the Linux
kernel.

Changing the data cache clean+invalidate to a mere invalidate allows us
to get rid of a lot of platform specific hacks around this issue for
their secondary CPU bringup paths - some of which were buggy.
Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com>
Tested-by: NFlorian Fainelli <f.fainelli@gmail.com>
Tested-by: NHeiko Stuebner <heiko@sntech.de>
Tested-by: NDinh Nguyen <dinguyen@opensource.altera.com>
Acked-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: NShawn Guo <shawn.guo@linaro.org>
Tested-by: NThierry Reding <treding@nvidia.com>
Acked-by: NThierry Reding <treding@nvidia.com>
Tested-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Tested-by: NMichal Simek <michal.simek@xilinx.com>
Tested-by: NWei Xu <xuwei5@hisilicon.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

The default idle driver uses one state with the WFI instruction.
The default idle routine invokes WFI when no cpuidle driver is present.

The default cpuidle driver is pointless and does not give more than the
default idle routine and moreover it pulls all the mathematics tied with
the cpuidle governor for nothing, hence consuming more energy.

Remove the default driver, the related code and register the driver directly.

[compiled only - no board - no test]
Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Remove support for the legacy Cortex-A8 based sh7372 SoC.

The Linux kernel still lacks DT bindings for the sh7372 INTC
interrupt controller so DT multiplatform support is not possibile.

Also, the sh7372 SoC never went into mass production anyway so to
aid migration to DT multiplatform simply get rid of sh7372 support.
Signed-off-by: NMagnus Damm <damm+renesas@opensource.se>
Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

APMU resources are not common to all R-Car SoCs so don't share this data.
A subsequent patch will correct the CPU cores for the r8a7791.
Signed-off-by: NHisashi Nakamura <hisashi.nakamura.ak@renesas.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

All ARM mach-shmobile SoCs and boards now rely on DTS for
CPU Frequency information, so remove the unused function
shmobile_setup_delay(). While at it, make the function
shmobile_setup_delay_hz() static.
Signed-off-by: NMagnus Damm <damm+renesas@opensource.se>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

The dummy shmobile_smp_apmu_suspend_init() function provided when
CPU_IDLE is not set should not return a value as per the signature
of the function.

This problem appears to have been introduced by
867ba81f728f1daa ("ARM: shmobile: APMU: Add Core-Standby-state for Suspend
to RAM").

Cc: Keita Kobayashi <keita.kobayashi.ym@renesas.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

This patch add Core-Standby-state for Suspend to RAM.
Signed-off-by: NKeita Kobayashi <keita.kobayashi.ym@renesas.com>
Acked-by: NMagnus Damm <damm+renesas@opensource.se>
[horms+renesas@verge.net.au: rebase]
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Change location for common.h so it can be used as #include "common.h"
instead of the old style #include <mach/common.h>.
Signed-off-by: NMagnus Damm <damm+renesas@opensource.se>
Acked-by: NGeert Uytterhoeven <geert@linux-m68k.org>
Acked-by: NArnd Bergmann <arnd@arndb.de>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

I add a new file(cpufreq.c) for the following reasons.
- Registration of platform_device must be unified in SH-Mobile.
- We can't create a node of cpufreq drivers into device tree.
  (Because cpufreq driver is virtual device.)
Signed-off-by: NGaku Inami <gaku.inami.xw@bp.renesas.com>
Acked-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Introduce shmobile_init_delay() that gets CPU specific
parameters from DT and sets up the early delay from
there. This allows us to both remove frequency information
from the C code and consolidate existing code.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Signed-off-by: NGeert Uytterhoeven <geert+renesas@linux-m68k.org>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Remove shmobile_smp_scu_boot_secondary() since
it is no longer used. CPU boot vector setup is
instead handled by CPU notifiers.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Introduce shared APMU SMP code for mach-shmobile. Both SMP boot up
and CPU Hotplug is supported. This version does not use DT but
if needed this will be added as an incremental feature patch.

The code is designed around CONFIG_NR_CPUS and should in theory support
any number of APMUs, however due to the current DT-less static design
only a single APMU is supported.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Introduce shmobile_boot_size that can be used by
future SMP code to determine the size of the boot
code that needs to be copied to internal SRAM.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Expose shmobile_invalidate_start() in common.h for
mach-shmobile. This function will be used for boot of
secondary processors on future non-SCU SMP platforms.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Remove shmobile_smp_init_cpus() since all SMP platforms in
mach-shmobile now rely on DT for CPU core description instead
of for instance determining number of cores from the SCU.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Introduce the shared CPU Hotplug function shmobile_smp_cpu_disable()
for mach-shmobile. It is useful for the case when all CPUs may be
hotplugged, including CPU 0.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Add per-CPU SMP boot / sleep code that can be used by all
SoCs included in mach-shmobile.

The boot code reads out the per-CPU MPIDR id value and
matches it with the value stored for any CPU number, and
if there is a match and the boot function is set as well
then the boot function will be executed.

The sleep code simply uses WFI and then jumps back to the
boot code to see if anyone has asked to wake up that CPU,
if not it will sleep again.
Signed-off-by: NMagnus Damm <damm@opensource.se>
[horms+renesas@verge.net.au: Remove trailing whitespace]
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Add CPU Hotplug functions for SCU equipped mach-shmobile SoCs.

The functions shmobile_smp_scu_cpu_die() together with
shmobile_smp_scu_cpu_kill() perform basic shutdown and
allows checking of shutdown status. These are written
to work together with SMP boot code in  headsmp-scu.S.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Add SMP boot functions for SCU equipped mach-shmobile SoCs.

At this point shmobile_smp_scu_prepare_cpus() controls the SCU and
installs boot fn and arg, while shmobile_smp_scu_boot_secondary()
currently does nothing. In the future the boot function and arg
install code will be reworked, so the empty function is ground
work for that.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Remove shmobile_timer_init() since it now is unused.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Remove shmobile_secondary_vector_scu now when all SCU enabled
SMP platforms instead make use of shmobile_boot_scu. This
removes two inline virtual to physical address conversions.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Add a shmoible_boot_scu function that assumes that the base address
of the SCU is passed in r0. This code is free from inline virtual
to physical address conversion.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Add code for mach-shmobile to allow specifying boot function
and argument. Will initially be used for SMP together with SCU
but may in the future also be used for deep sleep resume. This
patch removes one inline virtual to physical address conversion.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Commit 688036b5 removed the function
'shmobile_enter_wfi' but we forgot to remove the definition in the header file.

Note this function is just an alias to 'cpu_do_idle()' wrapped into a cpuidle
function callback prototype which already exists with the default WFI state
and the arm_simple_enter function.

Remove the function prototype.
Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: NSimon Horman <horms+renesas@verge.net.au>
Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>

There is no reason each CPU's own function has to exist in common.h.
r8a7779_xxx() go to r8a7779.h
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

There is no reason each CPU's own function has to exist in common.h.
r8a7740_xxx() go to r8a7740.h
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

There is no reason each CPU's own function has to exist in common.h.
sh73a0_xxx() go to sh73a0.h
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

There is no reason each CPU's own function has to exist in common.h.
sh7372_xxx() go to sh7372.h
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Update the r8a7779 IRQ code to make use of the
INTC External IRQ pin driver for external
interrupt pins IRQ0 -> IRQ3.

The r8a7779 SoC can like older SH SoCs configure
to use the IRQ0 -> IRQ3 signals as individual
interrupts or a combined IRL mode.

Without this patch the r8a7779 SoC code does
not fully support external IRQ pins in individual
IRQ mode. The r8a7779 PFC code does not yet have
gpio_to_irq() support so no need to update such
code.

At this point the DT reference implementations
are not covered. In the future such code shall
tie in the INTC External IRQ pin driver via
DT, so this kind of verbose code is not needed
for the long term DT case.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Tested-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

move r8a7740_meram_workaround() to r8a7740 area
from r8a7779 area
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Each CPU Hotplug implementation for mach-shmobile
is now self-contained, so this change removes unused
helper code in hotplug.c. The two CPU Hotplug capable
SoCs sh73a0 and r8a7779 remain unchanged.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Do not initialise any early devices when using the minimal DT reference
code. Only the delay needs to be initialised.

Cc: Magnus Damm <magnus.damm@gmail.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Do not initialise any early devices when using the minimal DT reference
code. Only the delay needs to be initialised.

Cc: Magnus Damm <magnus.damm@gmail.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Update the code in headsmp-scu.S to use a global
shmobile_scu_base variable both for convenient SCU
base address storage and for the early SCU setup
code in shmobile_secondary_vector_scu.

With this patch applied r8a7779, sh73a0 and EMEV2
all make use of the global shmobile_scu_base
variable. However only sh73a0 makes use of the SCU
bring up code in shmobile_secondary_vector_scu.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Rename headsmp-sh73a0.S into headsmp-scu.S and
introduce shmobile_secondary_vector_scu().

The goal is to be able to share the function
above between all mach-shmobile SoCs that use
SCU for SMP. So far only sh73a0 use this.

At this time the SCU base address is still hard
coded in headsmp-scu.S to 0xf0000000, but this
will be changed in the future.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Allow a minimal setup of the r8a7779 SoC using a flattened device tree.
In particular, configure the i2c and ethernet controllers using a
flattened device tree.

SCI serial controller and TMU clock source, whose drivers do not yet
support configuration using a flattened device tree, are still configured
using C code in order to allow booting of a board with this SoC.

The ethernet controller also requires a regulator which is a board property.
A sample snippet DT for the marzen board is as follows:

/dts-v1/;
/include/ "r8a7779.dtsi"

/ {
	fixedregulator3v3: fixedregulator@0 {
		compatible = "regulator-fixed";
		regulator-name = "fixed-3.3V";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-boot-on;
		regulator-always-on;
	};
};

&lan0 {
	vddvario-supply = <&fixedregulator3v3>;
	vdd33a-supply = <&fixedregulator3v3>;
};
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

This allows the GIC interrupt controller of the  r8a7779 SoC to be
initialised using a flattened device tree blob.
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

---

v3
* Fix copy-paste error and use unique reg values for each CPU

v2
As suggested by Mark Rutland
* Add reg and device_type to cpus
* Remove #address-cells from gic

Method to disable any core to be used on platforms where CPU0 does not
need special treatment.
Signed-off-by: NUlrich Hecht <ulrich.hecht@gmail.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Allow a minimal setup of the sh73a0 SoC using a flattened device tree.
In particular, Configure the i2c controllers using a flattened device tree.

SCI serial controller and CMT clock source, whose drivers do not yet
support configuration using a flattened device tree, are still configured
using C code in order to allow booting of a board with this SoC.

*** Please note that the clock initialisation scheme used in
    this patch does not currently work with SMP as there
    is a yet to be resolved lock-up in workqueue initialisation.

    CONFIG_SMP must be disabled when using this code. ***

Includes update from Thierry Reding to no longer use gic_handle_irq()

Cc: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

fix