1. 05 2月, 2013 4 次提交
  2. 31 1月, 2013 2 次提交
  3. 25 1月, 2013 1 次提交
  4. 22 1月, 2013 1 次提交
  5. 19 1月, 2013 1 次提交
  6. 18 1月, 2013 2 次提交
  7. 02 12月, 2012 1 次提交
  8. 22 11月, 2012 1 次提交
  9. 15 11月, 2012 2 次提交
  10. 13 11月, 2012 1 次提交
  11. 12 11月, 2012 3 次提交
    • B
      pinctrl: sirf: enable the driver support new SiRFmarco SoC · d3e26f2f
      Barry Song 提交于
      The driver supports old up SiRFprimaII SoCs, this patch makes it support
      the new SiRFmarco as well.
      SiRFmarco, as a SMP SoC, adds new SIRFSOC_GPIO_PAD_EN_CLR registers, to
      disable GPIO pad, we should write 1 to the corresponding bit in the new
      CLEAR register instead of writing 0 to SIRFSOC_GPIO_PAD_EN.
      Signed-off-by: NBarry Song <Baohua.Song@csr.com>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      d3e26f2f
    • T
      pinctrl: mvebu: move to its own directory · 06763c74
      Thomas Petazzoni 提交于
      Like the spear platform, the mvebu platform has multiple files: one
      core file, and then one file per SoC family. More files will be added
      later, as support for mach-orion5x and mach-mv78xx0 SoCs is added to
      pinctrl-mvebu. For those reasons, having a separate subdirectory,
      drivers/pinctrl/mvebu/ makes sense, and it had already been suggested
      by Linus Wallej when the driver was originally submitted.
      Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      06763c74
    • T
      pinctrl: mvebu: allow plat-orion architectures to use pinctrl-mvebu · 55d2e40d
      Thomas Petazzoni 提交于
      The mach-kirkwood and mach-dove architectures have not yet been
      integrated into the mach-mvebu directory, which should ultimately
      contain the support for all Marvell SoCs from the Engineering Business
      Unit.
      
      However, before this can happen, we need to let mach-kirkwood and
      mach-dove use the pinctrl-mvebu driver, which supports the kirkwood
      and dove SoC families. In order to do that, we make this driver
      available as soon as PLAT_ORION is selected, instead of using
      ARCH_MVEBU as a condition. In the long term, PLAT_ORION should
      disappear and be fully replaced by ARCH_MVEBU, but the plan is to make
      the migration step by step, by first having the existing mach-*
      directories for Marvell SoCs converge on several infrastructures,
      including the pinctrl one.
      
      Also, like the spear pinctrl driver, we put all pinctrl-mvebu Kconfig
      options under a if, in order to avoid having certain options
      (PINCTRL_DOVE, PINCTRL_KIRKWOOD, etc.) selecting an option
      (PINCTLR_MVEBU) which itself has a dependency (on ARCH_MVEBU). In this
      a construct, the dependency is in fact ignored due to the selects.
      Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      55d2e40d
  12. 06 11月, 2012 1 次提交
    • A
      pinctrl: samsung and exynos need to depend on OF && GPIOLIB · 924da314
      Axel Lin 提交于
      This patch fixes below build error when !CONFIG_OF_GPIO.
      
        CC      drivers/pinctrl/pinctrl-samsung.o
      drivers/pinctrl/pinctrl-samsung.c: In function 'samsung_pinctrl_parse_dt_pins':
      drivers/pinctrl/pinctrl-samsung.c:557:19: warning: unused variable 'prop' [-Wunused-variable]
      drivers/pinctrl/pinctrl-samsung.c: In function 'samsung_gpiolib_register':
      drivers/pinctrl/pinctrl-samsung.c:797:5: error: 'struct gpio_chip' has no member named 'of_node'
      make[2]: *** [drivers/pinctrl/pinctrl-samsung.o] Error 1
      make[1]: *** [drivers/pinctrl] Error 2
      make: *** [drivers] Error 2
      
      The samsung pinctrl driver supports only device tree enabled
      platforms. Thus make PINCTRL_SAMSUNG depend on OF && GPIOLIB.
      
      The reason to depend on GPIOLIB is CONFIG_OF_GPIO only available
      when GPIOLIB is selected.
      
      Since PINCTRL_EXYNOS4 select PINCTRL_SAMSUNG, thus also make
      PINCTRL_EXYNOS4 depend on OF && GPIOLIB.
      Signed-off-by: NAxel Lin <axel.lin@ingics.com>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      924da314
  13. 13 10月, 2012 1 次提交
  14. 01 10月, 2012 1 次提交
    • S
      pinctrl: add bcm2835 driver · e1b2dc70
      Simon Arlott 提交于
      The BCM2835 GPIO module is a combined GPIO controller, (GPIO) interrupt
      controller, and pinmux/control device.
      
      Original driver by Simon Arlott.
      Rewrite including GPIO chip device by Chris Boot.
      
      Upstreaming changes by Stephen Warren:
      * Wrote DT binding documentation.
      * Changed brcm,function to an integer to more directly match the
        datasheet, and to match brcm,pins being an integer.
      * Implemented pull-up/down pin config.
      * Removed read-only DT property and related code. The restriction this
        implemented are driven by the board, not the GPIO HW block, so don't
        really make sense of a HW block binding, were in general incomplete
        (since they could only know about the few pins hard-coded into the
        Raspberry Pi B board design and not the uncommitted GPIOS), and are
        better represented simply by not writing incorrect data into pin
        configuration nodes.
      * Don't set GPIO_IN function select in gpio_request_enable() to avoid
        glitches; defer this to gpio_set_direction(). Consequently, removed
        empty bcm2835_pmx_gpio_request_enable().
      * Simplified enabled_irq_map[]; make it explicitly 1 entry per bank.
      * Lifted use of enabled_irq_map[] outside the per-interrupt loop in
        IRQ handler, thus fixing an issue where the code was indexing into
        enabled_irq_map[] by intra-bank GPIO ID, not global GPIO ID.
      * Removed locking in IRQ handler, since all other code uses
        spin_lock_irqsave() and so guarantees it doesn't run concurrently
        with the handler.
      * Moved duplicated BUILD_BUG_ON()s into probe(). Also check size of
        bcm2835_gpio_pins[].
      * Remove range-checking from bcm2835_pctl_get_groups_count() since we've
        decided to trust the pinctrl core.
      * Made bcm2835_pmx_gpio_disable_free() call bcm2835_pinctrl_fsel_set()
        directly for simplicity.
      * Fixed body of dt_free_map() to match latest dt_node_to_map().
      * Removed GPIO ownership check from bcm2835_pmx_enable() since the pinctrl
        core owns doing this.
      * Made irq_chip and pinctrl_gpio_range .name == MODULE_NAME so it's more
        descriptive.
      * Simplified remove(); removed call to non-existent
        pinctrl_remove_gpio_range(), remove early return on error.
      * Don't force gpiochip's base to 0. Set gpio_range.base to gpiochip's
        base GPIO number.
      * Error-handling cleanups in probe().
      * Switched to module_platform_driver() rather than open-coding.
      * Made pin, group, and function names lower-case.
      * s/broadcom/brcm/ in DT property names.
      * s/2708/2835/.
      * Fixed a couple minor checkpatch warnings, and other minor cleanup.
      Signed-off-by: NSimon Arlott <simon@fire.lp0.eu>
      Signed-off-by: NChris Boot <bootc@bootc.net>
      Signed-off-by: NStephen Warren <swarren@wwwdotorg.org>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      e1b2dc70
  15. 22 9月, 2012 5 次提交
  16. 13 9月, 2012 2 次提交
  17. 07 9月, 2012 2 次提交
  18. 03 9月, 2012 3 次提交
  19. 15 7月, 2012 1 次提交
  20. 04 7月, 2012 1 次提交
  21. 21 5月, 2012 2 次提交
  22. 15 5月, 2012 1 次提交
  23. 11 5月, 2012 1 次提交
    • L
      pinctrl/nomadik: implement pin configuration · d41af627
      Linus Walleij 提交于
      This implements the pin configuration interface for the
      Nomadik pin controller.
      
      As part of the exercise we add a bit in the pin_cfg_t for
      the Nomadik pinctrl driver that indicates if the pin should
      be forced into GPIO mode. This is not done to go behind the
      back of the GPIO subsystem, but to ensure that default modes
      can be set by hogs on boot and system suspend/resume states.
      It was used implicitly by the old code defining all config
      settings and modes in a single config word but we now have
      a split between pinmux and pinconf leading to the need to
      have this.
      
      We also add a bit for explicitly setting sleepmode of the
      pin. This was previously handled by custom calls with the
      _sleep() suffix, but we now have one single interface into
      the configuration so we replace this with a bit indicating
      that the pin shall be configured into sleep mode.
      
      Some of the configuration can be refactored later to use
      less custom fields on the pin_cfg_t but we are currently
      leaving the old function calls in place so we stay
      compatible.
      
      ChangeLog v1->v2:
      - Drop a hunk changing pinmuxing for GPIO and move it
        over to the preceding pinmux patch.
      Acked-by: NStephen Warren <swarren@wwwdotorg.org>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      d41af627