1. 29 1月, 2021 2 次提交
    • I
      mlxsw: spectrum_span: Do not overwrite policer configuration · b6f6881a
      Ido Schimmel 提交于
      The purpose of the delayed work in the SPAN module is to potentially
      update the destination port and various encapsulation parameters of SPAN
      agents that point to a VLAN device or a GRE tap. The destination port
      can change following the insertion of a new route, for example.
      
      SPAN agents that point to a physical port or the CPU port are static and
      never change throughout the lifetime of the SPAN agent. Therefore, skip
      over them in the delayed work.
      
      This fixes an issue where the delayed work overwrites the policer
      that was set on a SPAN agent pointing to the CPU. Modifying the delayed
      work to inherit the original policer configuration is error-prone, as
      the same will be needed for any new parameter.
      
      Fixes: 4039504e ("mlxsw: spectrum_span: Allow setting policer on a SPAN agent")
      Reviewed-by: NPetr Machata <petrm@nvidia.com>
      Signed-off-by: NIdo Schimmel <idosch@nvidia.com>
      Signed-off-by: NJakub Kicinski <kuba@kernel.org>
      b6f6881a
    • V
      stmmac: intel: Configure EHL PSE0 GbE and PSE1 GbE to 32 bits DMA addressing · 7cfc4486
      Voon Weifeng 提交于
      Fix an issue where dump stack is printed and Reset Adapter occurs when
      PSE0 GbE or/and PSE1 GbE is/are enabled. EHL PSE0 GbE and PSE1 GbE use
      32 bits DMA addressing whereas EHL PCH GbE uses 64 bits DMA addressing.
      
      [   25.535095] ------------[ cut here ]------------
      [   25.540276] NETDEV WATCHDOG: enp0s29f2 (intel-eth-pci): transmit queue 2 timed out
      [   25.548749] WARNING: CPU: 2 PID: 0 at net/sched/sch_generic.c:443 dev_watchdog+0x259/0x260
      [   25.558004] Modules linked in: 8021q bnep bluetooth ecryptfs snd_hda_codec_hdmi intel_gpy marvell intel_ishtp_loader intel_ishtp_hid iTCO_wdt mei_hdcp iTCO_vendor_support x86_pkg_temp_thermal kvm_intel dwmac_intel stmmac kvm igb pcs_xpcs irqbypass phylink snd_hda_intel intel_rapl_msr pcspkr dca snd_hda_codec i915 i2c_i801 i2c_smbus libphy intel_ish_ipc snd_hda_core mei_me intel_ishtp mei spi_dw_pci 8250_lpss spi_dw thermal dw_dmac_core parport_pc tpm_crb tpm_tis parport tpm_tis_core tpm intel_pmc_core sch_fq_codel uhid fuse configfs snd_sof_pci snd_sof_intel_byt snd_sof_intel_ipc snd_sof_intel_hda_common snd_sof_xtensa_dsp snd_sof snd_soc_acpi_intel_match snd_soc_acpi snd_intel_dspcfg ledtrig_audio snd_soc_core snd_compress ac97_bus snd_pcm snd_timer snd soundcore
      [   25.633795] CPU: 2 PID: 0 Comm: swapper/2 Tainted: G     U            5.11.0-rc4-intel-lts-MISMAIL5+ #5
      [   25.644306] Hardware name: Intel Corporation Elkhart Lake Embedded Platform/ElkhartLake LPDDR4x T4 RVP1, BIOS EHLSFWI1.R00.2434.A00.2010231402 10/23/2020
      [   25.659674] RIP: 0010:dev_watchdog+0x259/0x260
      [   25.664650] Code: e8 3b 6b 60 ff eb 98 4c 89 ef c6 05 ec e7 bf 00 01 e8 fb e5 fa ff 89 d9 4c 89 ee 48 c7 c7 78 31 d2 9e 48 89 c2 e8 79 1b 18 00 <0f> 0b e9 77 ff ff ff 0f 1f 44 00 00 48 c7 47 08 00 00 00 00 48 c7
      [   25.685647] RSP: 0018:ffffb7ca80160eb8 EFLAGS: 00010286
      [   25.691498] RAX: 0000000000000000 RBX: 0000000000000002 RCX: 0000000000000103
      [   25.699483] RDX: 0000000080000103 RSI: 00000000000000f6 RDI: 00000000ffffffff
      [   25.707465] RBP: ffff985709ce0440 R08: 0000000000000000 R09: c0000000ffffefff
      [   25.715455] R10: ffffb7ca80160cf0 R11: ffffb7ca80160ce8 R12: ffff985709ce039c
      [   25.723438] R13: ffff985709ce0000 R14: 0000000000000008 R15: ffff9857068af940
      [   25.731425] FS:  0000000000000000(0000) GS:ffff985864300000(0000) knlGS:0000000000000000
      [   25.740481] CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
      [   25.746913] CR2: 00005567f8bb76b8 CR3: 00000001f8e0a000 CR4: 0000000000350ee0
      [   25.754900] Call Trace:
      [   25.757631]  <IRQ>
      [   25.759891]  ? qdisc_put_unlocked+0x30/0x30
      [   25.764565]  ? qdisc_put_unlocked+0x30/0x30
      [   25.769245]  call_timer_fn+0x2e/0x140
      [   25.773346]  run_timer_softirq+0x1f3/0x430
      [   25.777932]  ? __hrtimer_run_queues+0x12c/0x2c0
      [   25.783005]  ? ktime_get+0x3e/0xa0
      [   25.786812]  __do_softirq+0xa6/0x2ef
      [   25.790816]  asm_call_irq_on_stack+0xf/0x20
      [   25.795501]  </IRQ>
      [   25.797852]  do_softirq_own_stack+0x5d/0x80
      [   25.802538]  irq_exit_rcu+0x94/0xb0
      [   25.806475]  sysvec_apic_timer_interrupt+0x42/0xc0
      [   25.811836]  asm_sysvec_apic_timer_interrupt+0x12/0x20
      [   25.817586] RIP: 0010:cpuidle_enter_state+0xd9/0x370
      [   25.823142] Code: 85 c0 0f 8f 0a 02 00 00 31 ff e8 22 d5 7e ff 45 84 ff 74 12 9c 58 f6 c4 02 0f 85 47 02 00 00 31 ff e8 7b a0 84 ff fb 45 85 f6 <0f> 88 ab 00 00 00 49 63 ce 48 2b 2c 24 48 89 c8 48 6b d1 68 48 c1
      [   25.844140] RSP: 0018:ffffb7ca800f7e80 EFLAGS: 00000206
      [   25.849996] RAX: ffff985864300000 RBX: 0000000000000003 RCX: 000000000000001f
      [   25.857975] RDX: 00000005f2028ea8 RSI: ffffffff9ec5907f RDI: ffffffff9ec62a5d
      [   25.865961] RBP: 00000005f2028ea8 R08: 0000000000000000 R09: 0000000000029d00
      [   25.873947] R10: 000000137b0e0508 R11: ffff9858643294e4 R12: ffff9858643336d0
      [   25.881935] R13: ffffffff9ef74b00 R14: 0000000000000003 R15: 0000000000000000
      [   25.889918]  cpuidle_enter+0x29/0x40
      [   25.893922]  do_idle+0x24a/0x290
      [   25.897536]  cpu_startup_entry+0x19/0x20
      [   25.901930]  start_secondary+0x128/0x160
      [   25.906326]  secondary_startup_64_no_verify+0xb0/0xbb
      [   25.911983] ---[ end trace b4c0c8195d0ba61f ]---
      [   25.917193] intel-eth-pci 0000:00:1d.2 enp0s29f2: Reset adapter.
      
      Fixes: 67c08ac4 ("net: stmmac: add EHL PSE0 & PSE1 1Gbps PCI info and PCI ID")
      Signed-off-by: NVoon Weifeng <weifeng.voon@intel.com>
      Co-developed-by: NMohammad Athari Bin Ismail <mohammad.athari.ismail@intel.com>
      Signed-off-by: NMohammad Athari Bin Ismail <mohammad.athari.ismail@intel.com>
      Link: https://lore.kernel.org/r/20210126100844.30326-1-mohammad.athari.ismail@intel.comSigned-off-by: NJakub Kicinski <kuba@kernel.org>
      7cfc4486
  2. 28 1月, 2021 1 次提交
  3. 27 1月, 2021 20 次提交
    • L
      net: fec: Fix temporary RMII clock reset on link up · c730ab42
      Laurent Badel 提交于
      fec_restart() does a hard reset of the MAC module when the link status
      changes to up. This temporarily resets the R_CNTRL register which controls
      the MII mode of the ENET_OUT clock. In the case of RMII, the clock
      frequency momentarily drops from 50MHz to 25MHz until the register is
      reconfigured. Some link partners do not tolerate this glitch and
      invalidate the link causing failure to establish a stable link when using
      PHY polling mode. Since as per IEEE802.3 the criteria for link validity
      are PHY-specific, what the partner should tolerate cannot be assumed, so
      avoid resetting the MII clock by using software reset instead of hardware
      reset when the link is up. This is generally relevant only if the SoC
      provides the clock to an external PHY and the PHY is configured for RMII.
      Signed-off-by: NLaurent Badel <laurentbadel@eaton.com>
      Signed-off-by: NJakub Kicinski <kuba@kernel.org>
      c730ab42
    • P
      net/mlx5: CT: Fix incorrect removal of tuple_nat_node from nat rhashtable · e2194a17
      Paul Blakey 提交于
      If a non nat tuple entry is inserted just to the regular tuples
      rhashtable (ct_tuples_ht) and not to natted tuples rhashtable
      (ct_nat_tuples_ht). Commit bc562be9 ("net/mlx5e: CT: Save ct entries
      tuples in hashtables") mixed up the return labels and names sot that on
      cleanup or failure we still try to remove for the natted tuples rhashtable.
      
      Fix that by correctly checking if a natted tuples insertion
      before removing it. While here make it more readable.
      
      Fixes: bc562be9 ("net/mlx5e: CT: Save ct entries tuples in hashtables")
      Reviewed-by: NRoi Dayan <roid@nvidia.com>
      Signed-off-by: NPaul Blakey <paulb@nvidia.com>
      Signed-off-by: NSaeed Mahameed <saeedm@nvidia.com>
      e2194a17
    • M
      net/mlx5e: Revert parameters on errors when changing MTU and LRO state without reset · 8355060f
      Maxim Mikityanskiy 提交于
      Sometimes, channel params are changed without recreating the channels.
      It happens in two basic cases: when the channels are closed, and when
      the parameter being changed doesn't affect how channels are configured.
      Such changes invoke a hardware command that might fail. The whole
      operation should be reverted in such cases, but the code that restores
      the parameters' values in the driver was missing. This commit adds this
      handling.
      
      Fixes: 2e20a151 ("net/mlx5e: Fail safe mtu and lro setting")
      Signed-off-by: NMaxim Mikityanskiy <maximmi@mellanox.com>
      Reviewed-by: NTariq Toukan <tariqt@nvidia.com>
      Signed-off-by: NSaeed Mahameed <saeedm@nvidia.com>
      8355060f
    • M
      net/mlx5e: Revert parameters on errors when changing trust state without reset · 912c9b5f
      Maxim Mikityanskiy 提交于
      Trust state may be changed without recreating the channels. It happens
      when the channels are closed, and when channel parameters (min inline
      mode) stay the same after changing the trust state. Changing the trust
      state is a hardware command that may fail. The current code didn't
      restore the channel parameters to their old values if an error happened
      and the channels were closed. This commit adds handling for this case.
      
      Fixes: 6e0504c6 ("net/mlx5e: Change inline mode correctly when changing trust state")
      Signed-off-by: NMaxim Mikityanskiy <maximmi@mellanox.com>
      Reviewed-by: NTariq Toukan <tariqt@nvidia.com>
      Signed-off-by: NSaeed Mahameed <saeedm@nvidia.com>
      912c9b5f
    • M
      net/mlx5e: Correctly handle changing the number of queues when the interface is down · 57ac4a31
      Maxim Mikityanskiy 提交于
      This commit addresses two issues related to changing the number of
      queues when the channels are closed:
      
      1. Missing call to mlx5e_num_channels_changed to update
      real_num_tx_queues when the number of TCs is changed.
      
      2. When mlx5e_num_channels_changed returns an error, the channel
      parameters must be reverted.
      
      Two Fixes: tags correspond to the first commits where these two issues
      were introduced.
      
      Fixes: 3909a12e ("net/mlx5e: Fix configuration of XPS cpumasks and netdev queues in corner cases")
      Fixes: fa374877 ("net/mlx5e: Handle errors from netif_set_real_num_{tx,rx}_queues")
      Signed-off-by: NMaxim Mikityanskiy <maximmi@mellanox.com>
      Reviewed-by: NTariq Toukan <tariqt@nvidia.com>
      Signed-off-by: NSaeed Mahameed <saeedm@nvidia.com>
      57ac4a31
    • P
      net/mlx5e: Fix CT rule + encap slow path offload and deletion · 89e39467
      Paul Blakey 提交于
      Currently, if a neighbour isn't valid when offloading tunnel encap rules,
      we offload the original match and replace the original action with
      "goto slow path" action. For this we use a temporary flow attribute based
      on the original flow attribute and then change the action. Flow flags,
      which among those is the CT flag, are still shared for the slow path rule
      offload, so we end up parsing this flow as a CT + goto slow path rule.
      
      Besides being unnecessary, CT action offload saves extra information in
      the passed flow attribute, such as created ct_flow and mod_hdr, which
      is lost onces the temporary flow attribute is freed.
      
      When a neigh is updated and is valid, we offload the original CT rule
      with original CT action, which again creates a ct_flow and mod_hdr
      and saves it in the flow's original attribute. Then we delete the slow
      path rule with a temporary flow attribute based on original updated
      flow attribute, and we free the relevant ct_flow and mod_hdr.
      
      Then when tc deletes this flow, we try to free the ct_flow and mod_hdr
      on the flow's attribute again.
      
      To fix the issue, skip all furture proccesing (CT/Sample/Split rules)
      in offload/unoffload of slow path rules.
      
      Call trace:
      [  758.850525] Unable to handle kernel NULL pointer dereference at virtual address 0000000000000218
      [  758.952987] Internal error: Oops: 96000005 [#1] PREEMPT SMP
      [  758.964170] Modules linked in: act_csum(E) act_pedit(E) act_tunnel_key(E) act_ct(E) nf_flow_table(E) xt_nat(E) ip6table_filter(E) ip6table_nat(E) xt_comment(E) ip6_tables(E) xt_conntrack(E) xt_MASQUERADE(E) nf_conntrack_netlink(E) xt_addrtype(E) iptable_filter(E) iptable_nat(E) bpfilter(E) br_netfilter(E) bridge(E) stp(E) llc(E) xfrm_user(E) overlay(E) act_mirred(E) act_skbedit(E) rdma_ucm(OE) rdma_cm(OE) iw_cm(OE) ib_ipoib(OE) ib_cm(OE) ib_umad(OE) esp6_offload(E) esp6(E) esp4_offload(E) esp4(E) xfrm_algo(E) mlx5_ib(OE) ib_uverbs(OE) geneve(E) ip6_udp_tunnel(E) udp_tunnel(E) nfnetlink_cttimeout(E) nfnetlink(E) mlx5_core(OE) act_gact(E) cls_flower(E) sch_ingress(E) openvswitch(E) nsh(E) nf_conncount(E) nf_nat(E) mlxfw(OE) psample(E) nf_conntrack(E) nf_defrag_ipv4(E) vfio_mdev(E) mdev(E) ib_core(OE) mlx_compat(OE) crct10dif_ce(E) uio_pdrv_genirq(E) uio(E) i2c_mlx(E) mlxbf_pmc(E) sbsa_gwdt(E) mlxbf_gige(E) gpio_mlxbf2(E) mlxbf_pka(E) mlx_trio(E) mlx_bootctl(E) bluefield_edac(E) knem(O)
      [  758.964225]  ip_tables(E) mlxbf_tmfifo(E) ipv6(E) crc_ccitt(E) nf_defrag_ipv6(E)
      [  759.154186] CPU: 5 PID: 122 Comm: kworker/u16:1 Tainted: G           OE     5.4.60-mlnx.52.gde81e85 #1
      [  759.172870] Hardware name: https://www.mellanox.com BlueField SoC/BlueField SoC, BIOS BlueField:3.5.0-2-gc1b5d64 Jan  4 2021
      [  759.195466] Workqueue: mlx5e mlx5e_rep_neigh_update [mlx5_core]
      [  759.207344] pstate: a0000005 (NzCv daif -PAN -UAO)
      [  759.217003] pc : mlx5_del_flow_rules+0x5c/0x160 [mlx5_core]
      [  759.228229] lr : mlx5_del_flow_rules+0x34/0x160 [mlx5_core]
      [  759.405858] Call trace:
      [  759.410804]  mlx5_del_flow_rules+0x5c/0x160 [mlx5_core]
      [  759.421337]  __mlx5_eswitch_del_rule.isra.43+0x5c/0x1c8 [mlx5_core]
      [  759.433963]  mlx5_eswitch_del_offloaded_rule_ct+0x34/0x40 [mlx5_core]
      [  759.446942]  mlx5_tc_rule_delete_ct+0x68/0x74 [mlx5_core]
      [  759.457821]  mlx5_tc_ct_delete_flow+0x160/0x21c [mlx5_core]
      [  759.469051]  mlx5e_tc_unoffload_fdb_rules+0x158/0x168 [mlx5_core]
      [  759.481325]  mlx5e_tc_encap_flows_del+0x140/0x26c [mlx5_core]
      [  759.492901]  mlx5e_rep_update_flows+0x11c/0x1ec [mlx5_core]
      [  759.504127]  mlx5e_rep_neigh_update+0x160/0x200 [mlx5_core]
      [  759.515314]  process_one_work+0x178/0x400
      [  759.523350]  worker_thread+0x58/0x3e8
      [  759.530685]  kthread+0x100/0x12c
      [  759.537152]  ret_from_fork+0x10/0x18
      [  759.544320] Code: 97ffef55 51000673 3100067f 54ffff41 (b9421ab3)
      [  759.556548] ---[ end trace fab818bb1085832d ]---
      
      Fixes: 4c3844d9 ("net/mlx5e: CT: Introduce connection tracking")
      Signed-off-by: NPaul Blakey <paulb@nvidia.com>
      Reviewed-by: NRoi Dayan <roid@nvidia.com>
      Reviewed-by: NVlad Buslov <vladbu@nvidia.com>
      Signed-off-by: NSaeed Mahameed <saeedm@nvidia.com>
      89e39467
    • M
      net/mlx5e: Disable hw-tc-offload when MLX5_CLS_ACT config is disabled · 156878d0
      Maor Dickman 提交于
      The cited commit introduce new CONFIG_MLX5_CLS_ACT kconfig variable
      to control compilation of TC hardware offloads implementation.
      When this configuration is disabled the driver is still wrongly
      reports in ethtool that hw-tc-offload is supported.
      
      Fixed by reporting hw-tc-offload is supported only when
      CONFIG_MLX5_CLS_ACT is enabled.
      
      Fixes: d956873f ("net/mlx5e: Introduce kconfig var for TC support")
      Signed-off-by: NMaor Dickman <maord@nvidia.com>
      Reviewed-by: NVlad Buslov <vladbu@nvidia.com>
      Signed-off-by: NSaeed Mahameed <saeedm@nvidia.com>
      156878d0
    • D
      net/mlx5: Maintain separate page trees for ECPF and PF functions · 0aa12847
      Daniel Jurgens 提交于
      Pages for the host PF and ECPF were stored in the same tree, so the ECPF
      pages were being freed along with the host PF's when the host driver
      unloaded.
      
      Combine the function ID and ECPF flag to use as an index into the
      x-array containing the trees to get a different tree for the host PF and
      ECPF.
      
      Fixes: c6168161 ("net/mlx5: Add support for release all pages event")
      Signed-off-by: NDaniel Jurgens <danielj@nvidia.com>
      Signed-off-by: NSaeed Mahameed <saeedm@nvidia.com>
      0aa12847
    • M
      net/mlx5e: Fix IPSEC stats · 45c9a308
      Maxim Mikityanskiy 提交于
      When IPSEC offload isn't active, the number of stats is not zero, but
      the strings are not filled, leading to exposing stats with empty names.
      Fix this by using the same condition for NUM_STATS and FILL_STRS.
      
      Fixes: 0aab3e1b ("net/mlx5e: IPSec, Expose IPsec HW stat only for supporting HW")
      Signed-off-by: NMaxim Mikityanskiy <maximmi@mellanox.com>
      Reviewed-by: NRaed Salem <raeds@nvidia.com>
      Reviewed-by: NTariq Toukan <tariqt@nvidia.com>
      Signed-off-by: NSaeed Mahameed <saeedm@nvidia.com>
      45c9a308
    • M
      net/mlx5e: Reduce tc unsupported key print level · 48470a90
      Maor Dickman 提交于
      "Unsupported key used:" appears in kernel log when flows with
      unsupported key are used, arp fields for example.
      
      OpenVSwitch was changed to match on arp fields by default that
      caused this warning to appear in kernel log for every arp rule, which
      can be a lot.
      
      Fix by lowering print level from warning to debug.
      
      Fixes: e3a2b7ed ("net/mlx5e: Support offload cls_flower with drop action")
      Signed-off-by: NMaor Dickman <maord@nvidia.com>
      Reviewed-by: NRoi Dayan <roid@nvidia.com>
      Reviewed-by: NSaeed Mahameed <saeedm@nvidia.com>
      Signed-off-by: NSaeed Mahameed <saeedm@nvidia.com>
      48470a90
    • P
      net/mlx5e: free page before return · 258ed19f
      Pan Bian 提交于
      Instead of directly return, goto the error handling label to free
      allocated page.
      
      Fixes: 5f29458b ("net/mlx5e: Support dump callback in TX reporter")
      Signed-off-by: NPan Bian <bianpan2016@163.com>
      Reviewed-by: NLeon Romanovsky <leonro@nvidia.com>
      Signed-off-by: NSaeed Mahameed <saeedm@nvidia.com>
      258ed19f
    • P
      net/mlx5e: E-switch, Fix rate calculation for overflow · 1fe3e316
      Parav Pandit 提交于
      rate_bytes_ps is a 64-bit field. It passed as 32-bit field to
      apply_police_params(). Due to this when police rate is higher
      than 4Gbps, 32-bit calculation ignores the carry. This results
      in incorrect rate configurationn the device.
      
      Fix it by performing 64-bit calculation.
      
      Fixes: fcb64c0f ("net/mlx5: E-Switch, add ingress rate support")
      Signed-off-by: NParav Pandit <parav@nvidia.com>
      Reviewed-by: NEli Cohen <elic@nvidia.com>
      Signed-off-by: NSaeed Mahameed <saeedm@nvidia.com>
      1fe3e316
    • R
      net/mlx5: Fix memory leak on flow table creation error flow · 487c6ef8
      Roi Dayan 提交于
      When we create the ft object we also init rhltable in ft->fgs_hash.
      So in error flow before kfree of ft we need to destroy that rhltable.
      
      Fixes: 693c6883 ("net/mlx5: Add hash table for flow groups in flow table")
      Signed-off-by: NRoi Dayan <roid@nvidia.com>
      Reviewed-by: NMaor Dickman <maord@nvidia.com>
      Signed-off-by: NSaeed Mahameed <saeedm@nvidia.com>
      487c6ef8
    • C
      igc: fix link speed advertising · 329a3678
      Corinna Vinschen 提交于
      Link speed advertising in igc has two problems:
      
      - When setting the advertisement via ethtool, the link speed is converted
        to the legacy 32 bit representation for the intel PHY code.
        This inadvertently drops ETHTOOL_LINK_MODE_2500baseT_Full_BIT (being
        beyond bit 31).  As a result, any call to `ethtool -s ...' drops the
        2500Mbit/s link speed from the PHY settings.  Only reloading the driver
        alleviates that problem.
      
        Fix this by converting the ETHTOOL_LINK_MODE_2500baseT_Full_BIT to the
        Intel PHY ADVERTISE_2500_FULL bit explicitly.
      
      - Rather than checking the actual PHY setting, the .get_link_ksettings
        function always fills link_modes.advertising with all link speeds
        the device is capable of.
      
        Fix this by checking the PHY autoneg_advertised settings and report
        only the actually advertised speeds up to ethtool.
      
      Fixes: 8c5ad0da ("igc: Add ethtool support")
      Signed-off-by: NCorinna Vinschen <vinschen@redhat.com>
      Signed-off-by: NTony Nguyen <anthony.l.nguyen@intel.com>
      329a3678
    • S
      i40e: acquire VSI pointer only after VF is initialized · 67a3c6b3
      Stefan Assmann 提交于
      This change simplifies the VF initialization check and also minimizes
      the delay between acquiring the VSI pointer and using it. As known by
      the commit being fixed, there is a risk of the VSI pointer getting
      changed. Therefore minimize the delay between getting and using the
      pointer.
      
      Fixes: 9889707b ("i40e: Fix crash caused by stress setting of VF MAC addresses")
      Signed-off-by: NStefan Assmann <sassmann@kpanic.de>
      Reviewed-by: NJacob Keller <jacob.e.keller@intel.com>
      Tested-by: NKonrad Jankowski <konrad0.jankowski@intel.com>
      Signed-off-by: NTony Nguyen <anthony.l.nguyen@intel.com>
      67a3c6b3
    • B
      ice: Fix MSI-X vector fallback logic · f3fe97f6
      Brett Creeley 提交于
      The current MSI-X enablement logic tries to enable best-case MSI-X
      vectors and if that fails we only support a bare-minimum set. This
      includes a single MSI-X for 1 Tx and 1 Rx queue and a single MSI-X
      for the OICR interrupt. Unfortunately, the driver fails to load when we
      don't get as many MSI-X as requested for a couple reasons.
      
      First, the code to allocate MSI-X in the driver tries to allocate
      num_online_cpus() MSI-X for LAN traffic without caring about the number
      of MSI-X actually enabled/requested from the kernel for LAN traffic.
      So, when calling ice_get_res() for the PF VSI, it returns failure
      because the number of available vectors is less than requested. Fix
      this by not allowing the PF VSI to allocation  more than
      pf->num_lan_msix MSI-X vectors and pf->num_lan_msix Rx/Tx queues.
      Limiting the number of queues is done because we don't want more than
      1 Tx/Rx queue per interrupt due to performance conerns.
      
      Second, the driver assigns pf->num_lan_msix = 2, to account for LAN
      traffic and the OICR. However, pf->num_lan_msix is only meant for LAN
      MSI-X. This is causing a failure when the PF VSI tries to
      allocate/reserve the minimum pf->num_lan_msix because the OICR MSI-X has
      already been reserved, so there may not be enough MSI-X vectors left.
      Fix this by setting pf->num_lan_msix = 1 for the failure case. Then the
      ICE_MIN_MSIX accounts for the LAN MSI-X and the OICR MSI-X needed for
      the failure case.
      
      Update the related defines used in ice_ena_msix_range() to align with
      the above behavior and remove the unused RDMA defines because RDMA is
      currently not supported. Also, remove the now incorrect comment.
      
      Fixes: 152b978a ("ice: Rework ice_ena_msix_range")
      Signed-off-by: NBrett Creeley <brett.creeley@intel.com>
      Tested-by: NTony Brelinski <tonyx.brelinski@intel.com>
      Signed-off-by: NTony Nguyen <anthony.l.nguyen@intel.com>
      f3fe97f6
    • B
      ice: Don't allow more channels than LAN MSI-X available · 943b881e
      Brett Creeley 提交于
      Currently users could create more channels than LAN MSI-X available.
      This is happening because there is no check against pf->num_lan_msix
      when checking the max allowed channels and will cause performance issues
      if multiple Tx and Rx queues are tied to a single MSI-X. Fix this by not
      allowing more channels than LAN MSI-X available in pf->num_lan_msix.
      
      Fixes: 87324e74 ("ice: Implement ethtool ops for channels")
      Signed-off-by: NBrett Creeley <brett.creeley@intel.com>
      Tested-by: NTony Brelinski <tonyx.brelinski@intel.com>
      Signed-off-by: NTony Nguyen <anthony.l.nguyen@intel.com>
      943b881e
    • N
      ice: update dev_addr in ice_set_mac_address even if HW filter exists · 13ed5e8a
      Nick Nunley 提交于
      Fix the driver to copy the MAC address configured in ndo_set_mac_address
      into dev_addr, even if the MAC filter already exists in HW. In some
      situations (e.g. bonding) the netdev's dev_addr could have been modified
      outside of the driver, with no change to the HW filter, so the driver
      cannot assume that they match.
      
      Fixes: 757976ab ("ice: Fix check for removing/adding mac filters")
      Signed-off-by: NNick Nunley <nicholas.d.nunley@intel.com>
      Tested-by: NTony Brelinski <tonyx.brelinski@intel.com>
      Signed-off-by: NTony Nguyen <anthony.l.nguyen@intel.com>
      13ed5e8a
    • N
      ice: Implement flow for IPv6 next header (extension header) · 1b0b0b58
      Nick Nunley 提交于
      This patch is based on a similar change to i40e by Slawomir Laba:
      "i40e: Implement flow for IPv6 next header (extension header)".
      
      When a packet contains an IPv6 header with next header which is
      an extension header and not a protocol one, the kernel function
      skb_transport_header called with such sk_buff will return a
      pointer to the extension header and not to the TCP one.
      
      The above explained call caused a problem with packet processing
      for skb with encapsulation for tunnel with ICE_TX_CTX_EIPT_IPV6.
      The extension header was not skipped at all.
      
      The ipv6_skip_exthdr function does check if next header of the IPV6
      header is an extension header and doesn't modify the l4_proto pointer
      if it points to a protocol header value so its safe to omit the
      comparison of exthdr and l4.hdr pointers. The ipv6_skip_exthdr can
      return value -1. This means that the skipping process failed
      and there is something wrong with the packet so it will be dropped.
      
      Fixes: a4e82a81 ("ice: Add support for tunnel offloads")
      Signed-off-by: NNick Nunley <nicholas.d.nunley@intel.com>
      Tested-by: NTony Brelinski <tonyx.brelinski@intel.com>
      Signed-off-by: NTony Nguyen <anthony.l.nguyen@intel.com>
      1b0b0b58
    • H
      ice: fix FDir IPv6 flexbyte · 29e2d9eb
      Henry Tieman 提交于
      The packet classifier would occasionally misrecognize an IPv6 training
      packet when the next protocol field was 0. The correct value for
      unspecified protocol is IPPROTO_NONE.
      
      Fixes: 165d80d6 ("ice: Support IPv6 Flow Director filters")
      Signed-off-by: NHenry Tieman <henry.w.tieman@intel.com>
      Reviewed-by: NPaul Menzel <pmenzel@molgen.mpg.de>
      Tested-by: NTony Brelinski <tonyx.brelinski@intel.com>
      Signed-off-by: NTony Nguyen <anthony.l.nguyen@intel.com>
      29e2d9eb
  4. 24 1月, 2021 1 次提交
  5. 23 1月, 2021 3 次提交
  6. 21 1月, 2021 2 次提交
  7. 20 1月, 2021 3 次提交
    • G
      sh_eth: Fix power down vs. is_opened flag ordering · f6a2e94b
      Geert Uytterhoeven 提交于
      sh_eth_close() does a synchronous power down of the device before
      marking it closed.  Revert the order, to make sure the device is never
      marked opened while suspended.
      
      While at it, use pm_runtime_put() instead of pm_runtime_put_sync(), as
      there is no reason to do a synchronous power down.
      
      Fixes: 7fa2955f ("sh_eth: Fix sleeping function called from invalid context")
      Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
      Reviewed-by: NSergei Shtylyov <sergei.shtylyov@gmail.com>
      Reviewed-by: NNiklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
      Link: https://lore.kernel.org/r/20210118150812.796791-1-geert+renesas@glider.beSigned-off-by: NJakub Kicinski <kuba@kernel.org>
      f6a2e94b
    • P
      Revert "RDMA/mlx5: Fix devlink deadlock on net namespace deletion" · de641d74
      Parav Pandit 提交于
      This reverts commit fbdd0049.
      
      Due to commit in fixes tag, netdevice events were received only in one net
      namespace of mlx5_core_dev. Due to this when netdevice events arrive in
      net namespace other than net namespace of mlx5_core_dev, they are missed.
      
      This results in empty GID table due to RDMA device being detached from its
      net device.
      
      Hence, revert back to receive netdevice events in all net namespaces to
      restore back RDMA functionality in non init_net net namespace. The
      deadlock will have to be addressed in another patch.
      
      Fixes: fbdd0049 ("RDMA/mlx5: Fix devlink deadlock on net namespace deletion")
      Link: https://lore.kernel.org/r/20210117092633.10690-1-leon@kernel.orgSigned-off-by: NParav Pandit <parav@nvidia.com>
      Signed-off-by: NLeon Romanovsky <leonro@nvidia.com>
      Signed-off-by: NJason Gunthorpe <jgg@nvidia.com>
      de641d74
    • G
      sh_eth: Make PHY access aware of Runtime PM to fix reboot crash · 02cae02a
      Geert Uytterhoeven 提交于
      Wolfram reports that his R-Car H2-based Lager board can no longer be
      rebooted in v5.11-rc1, as it crashes with an imprecise external abort.
      The issue can be reproduced on other boards (e.g. Koelsch with R-Car
      M2-W) too, if CONFIG_IP_PNP is disabled, and the Ethernet interface is
      down at reboot time:
      
          Unhandled fault: imprecise external abort (0x1406) at 0x00000000
          pgd = (ptrval)
          [00000000] *pgd=422b6835, *pte=00000000, *ppte=00000000
          Internal error: : 1406 [#1] ARM
          Modules linked in:
          CPU: 0 PID: 1105 Comm: init Tainted: G        W         5.10.0-rc1-00402-ge2f016cf #1048
          Hardware name: Generic R-Car Gen2 (Flattened Device Tree)
          PC is at sh_mdio_ctrl+0x44/0x60
          LR is at sh_mmd_ctrl+0x20/0x24
          ...
          Backtrace:
          [<c0451f30>] (sh_mdio_ctrl) from [<c0451fd4>] (sh_mmd_ctrl+0x20/0x24)
           r7:0000001f r6:00000020 r5:00000002 r4:c22a1dc4
          [<c0451fb4>] (sh_mmd_ctrl) from [<c044fc18>] (mdiobb_cmd+0x38/0xa8)
          [<c044fbe0>] (mdiobb_cmd) from [<c044feb8>] (mdiobb_read+0x58/0xdc)
           r9:c229f844 r8:c0c329dc r7:c221e000 r6:00000001 r5:c22a1dc4 r4:00000001
          [<c044fe60>] (mdiobb_read) from [<c044c854>] (__mdiobus_read+0x74/0xe0)
           r7:0000001f r6:00000001 r5:c221e000 r4:c221e000
          [<c044c7e0>] (__mdiobus_read) from [<c044c9d8>] (mdiobus_read+0x40/0x54)
           r7:0000001f r6:00000001 r5:c221e000 r4:c221e458
          [<c044c998>] (mdiobus_read) from [<c044d678>] (phy_read+0x1c/0x20)
           r7:ffffe000 r6:c221e470 r5:00000200 r4:c229f800
          [<c044d65c>] (phy_read) from [<c044d94c>] (kszphy_config_intr+0x44/0x80)
          [<c044d908>] (kszphy_config_intr) from [<c044694c>] (phy_disable_interrupts+0x44/0x50)
           r5:c229f800 r4:c229f800
          [<c0446908>] (phy_disable_interrupts) from [<c0449370>] (phy_shutdown+0x18/0x1c)
           r5:c229f800 r4:c229f804
          [<c0449358>] (phy_shutdown) from [<c040066c>] (device_shutdown+0x168/0x1f8)
          [<c0400504>] (device_shutdown) from [<c013de44>] (kernel_restart_prepare+0x3c/0x48)
           r9:c22d2000 r8:c0100264 r7:c0b0d034 r6:00000000 r5:4321fedc r4:00000000
          [<c013de08>] (kernel_restart_prepare) from [<c013dee0>] (kernel_restart+0x1c/0x60)
          [<c013dec4>] (kernel_restart) from [<c013e1d8>] (__do_sys_reboot+0x168/0x208)
           r5:4321fedc r4:01234567
          [<c013e070>] (__do_sys_reboot) from [<c013e2e8>] (sys_reboot+0x18/0x1c)
           r7:00000058 r6:00000000 r5:00000000 r4:00000000
          [<c013e2d0>] (sys_reboot) from [<c0100060>] (ret_fast_syscall+0x0/0x54)
      
      As of commit e2f016cf ("net: phy: add a shutdown procedure"),
      system reboot calls phy_disable_interrupts() during shutdown.  As this
      happens unconditionally, the PHY registers may be accessed while the
      device is suspended, causing undefined behavior, which may crash the
      system.
      
      Fix this by wrapping the PHY bitbang accessors in the sh_eth driver by
      wrappers that take care of Runtime PM, to resume the device when needed.
      Reported-by: NWolfram Sang <wsa+renesas@sang-engineering.com>
      Suggested-by: NAndrew Lunn <andrew@lunn.ch>
      Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
      Tested-by: NWolfram Sang <wsa+renesas@sang-engineering.com>
      Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com>
      Reviewed-by: NAndrew Lunn <andrew@lunn.ch>
      Signed-off-by: NJakub Kicinski <kuba@kernel.org>
      02cae02a
  8. 19 1月, 2021 1 次提交
  9. 16 1月, 2021 1 次提交
  10. 15 1月, 2021 2 次提交
    • Y
      net: stmmac: fix taprio configuration when base_time is in the past · fe28c53e
      Yannick Vignon 提交于
      The Synopsys TSN MAC supports Qbv base times in the past, but only up to a
      certain limit. As a result, a taprio qdisc configuration with a small
      base time (for example when treating the base time as a simple phase
      offset) is not applied by the hardware and silently ignored.
      
      This was observed on an NXP i.MX8MPlus device, but likely affects all
      TSN-variants of the MAC.
      
      Fix the issue by making sure the base time is in the future, pushing it by
      an integer amount of cycle times if needed. (a similar check is already
      done in several other taprio implementations, see for example
      drivers/net/ethernet/intel/igc/igc_tsn.c#L116 or
      drivers/net/dsa/sja1105/sja1105_ptp.h#L39).
      
      Fixes: b60189e0 ("net: stmmac: Integrate EST with TAPRIO scheduler API")
      Signed-off-by: NYannick Vignon <yannick.vignon@nxp.com>
      Link: https://lore.kernel.org/r/20210113131557.24651-2-yannick.vignon@oss.nxp.comSigned-off-by: NJakub Kicinski <kuba@kernel.org>
      fe28c53e
    • Y
      net: stmmac: fix taprio schedule configuration · b76889ff
      Yannick Vignon 提交于
      When configuring a 802.1Qbv schedule through the tc taprio qdisc on an NXP
      i.MX8MPlus device, the effective cycle time differed from the requested one
      by N*96ns, with N number of entries in the Qbv Gate Control List. This is
      because the driver was adding a 96ns margin to each interval of the GCL,
      apparently to account for the IPG. The problem was observed on NXP
      i.MX8MPlus devices but likely affected all devices relying on the same
      configuration callback (dwmac 4.00, 4.10, 5.10 variants).
      
      Fix the issue by removing the margins, and simply setup the MAC with the
      provided cycle time value. This is the behavior expected by the user-space
      API, as altering the Qbv schedule timings would break standards conformance.
      This is also the behavior of several other Ethernet MAC implementations
      supporting taprio, including the dwxgmac variant of stmmac.
      
      Fixes: 504723af ("net: stmmac: Add basic EST support for GMAC5+")
      Signed-off-by: NYannick Vignon <yannick.vignon@nxp.com>
      Link: https://lore.kernel.org/r/20210113131557.24651-1-yannick.vignon@oss.nxp.comSigned-off-by: NJakub Kicinski <kuba@kernel.org>
      b76889ff
  11. 14 1月, 2021 4 次提交