提交 a54cf482 编写于 作者: T Tony Lindgren 提交者: Zheng Zengkai

soc: ti: omap-prm: Fix occasional abort on reset deassert for dra7 iva

stable inclusion
from stable-5.10.27
commit f47a9b2570adafd274387d1b82a09fcb3424019f
bugzilla: 51493

--------------------------------

[ Upstream commit effe89e4 ]

On reset deassert, we must wait a bit after the rstst bit change before
we allow clockdomain autoidle again. Otherwise we get the following oops
sometimes on dra7 with iva:

Unhandled fault: imprecise external abort (0x1406) at 0x00000000
44000000.ocp:L3 Standard Error: MASTER MPU TARGET IVA_CONFIG (Read Link):
At Address: 0x0005A410 : Data Access in User mode during Functional access
Internal error: : 1406 [#1] SMP ARM
...
(sysc_write_sysconfig) from [<c0782cb0>] (sysc_enable_module+0xcc/0x260)
(sysc_enable_module) from [<c0782f0c>] (sysc_runtime_resume+0xc8/0x174)
(sysc_runtime_resume) from [<c0a3e1ac>] (genpd_runtime_resume+0x94/0x224)
(genpd_runtime_resume) from [<c0a33f0c>] (__rpm_callback+0xd8/0x180)

It is unclear what all devices this might affect, but presumably other
devices with the rstst bit too can be affected. So let's just enable the
delay for all the devices with rstst bit for now. Later on we may want to
limit the list to the know affected devices if needed.

Fixes: d30cd83f ("soc: ti: omap-prm: add support for denying idle for reset clockdomain")
Reported-by: NYongqin Liu <yongqin.liu@linaro.org>
Signed-off-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NSasha Levin <sashal@kernel.org>
Signed-off-by: NChen Jun <chenjun102@huawei.com>
Acked-by: N  Weilong Chen <chenweilong@huawei.com>
Signed-off-by: NZheng Zengkai <zhengzengkai@huawei.com>
上级 dd124ae7
...@@ -522,8 +522,12 @@ static int omap_reset_deassert(struct reset_controller_dev *rcdev, ...@@ -522,8 +522,12 @@ static int omap_reset_deassert(struct reset_controller_dev *rcdev,
reset->prm->data->name, id); reset->prm->data->name, id);
exit: exit:
if (reset->clkdm) if (reset->clkdm) {
/* At least dra7 iva needs a delay before clkdm idle */
if (has_rstst)
udelay(1);
pdata->clkdm_allow_idle(reset->clkdm); pdata->clkdm_allow_idle(reset->clkdm);
}
return ret; return ret;
} }
......
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