提交 93a3ddc2 编写于 作者: A Andrew Victor 提交者: Russell King

[ARM] 4151/1: AT91 / AVR32: Move at91_pdc.h to linux/atmel_pdc.h

The Atmel AT91 and AVR32 processor architectures share many of the same
peripherals.  The PDC (Peripheral Data Controller) registers are also
implemented within in a number of the on-chip peripherals (eg, USART,
MMC, SPI, SSC, etc).

In a attempt not to duplicate the register definitions in each
peripheral, or in each architecture, the at91_pdc.h header in
asm-arm/arch-at91 and asm-avr32/arch-at32ap has been replaced with
linux/atmel_pdc.h.

The definitions have also been renamed from AT91_PDC_* to ATMEL_PDC_*,
and the drivers updated accordingly.

Original patch from Nicolas Ferre.
Signed-off-by: NAndrew Victor <andrew@sanpeople.com>
Acked-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
上级 da11d02c
...@@ -64,6 +64,7 @@ ...@@ -64,6 +64,7 @@
#include <linux/err.h> #include <linux/err.h>
#include <linux/dma-mapping.h> #include <linux/dma-mapping.h>
#include <linux/clk.h> #include <linux/clk.h>
#include <linux/atmel_pdc.h>
#include <linux/mmc/host.h> #include <linux/mmc/host.h>
#include <linux/mmc/protocol.h> #include <linux/mmc/protocol.h>
...@@ -75,7 +76,6 @@ ...@@ -75,7 +76,6 @@
#include <asm/arch/cpu.h> #include <asm/arch/cpu.h>
#include <asm/arch/gpio.h> #include <asm/arch/gpio.h>
#include <asm/arch/at91_mci.h> #include <asm/arch/at91_mci.h>
#include <asm/arch/at91_pdc.h>
#define DRIVER_NAME "at91_mci" #define DRIVER_NAME "at91_mci"
...@@ -211,13 +211,13 @@ static void at91mci_pre_dma_read(struct at91mci_host *host) ...@@ -211,13 +211,13 @@ static void at91mci_pre_dma_read(struct at91mci_host *host)
/* Check to see if this needs filling */ /* Check to see if this needs filling */
if (i == 0) { if (i == 0) {
if (at91_mci_read(host, AT91_PDC_RCR) != 0) { if (at91_mci_read(host, ATMEL_PDC_RCR) != 0) {
pr_debug("Transfer active in current\n"); pr_debug("Transfer active in current\n");
continue; continue;
} }
} }
else { else {
if (at91_mci_read(host, AT91_PDC_RNCR) != 0) { if (at91_mci_read(host, ATMEL_PDC_RNCR) != 0) {
pr_debug("Transfer active in next\n"); pr_debug("Transfer active in next\n");
continue; continue;
} }
...@@ -234,12 +234,12 @@ static void at91mci_pre_dma_read(struct at91mci_host *host) ...@@ -234,12 +234,12 @@ static void at91mci_pre_dma_read(struct at91mci_host *host)
pr_debug("dma address = %08X, length = %d\n", sg->dma_address, sg->length); pr_debug("dma address = %08X, length = %d\n", sg->dma_address, sg->length);
if (i == 0) { if (i == 0) {
at91_mci_write(host, AT91_PDC_RPR, sg->dma_address); at91_mci_write(host, ATMEL_PDC_RPR, sg->dma_address);
at91_mci_write(host, AT91_PDC_RCR, sg->length / 4); at91_mci_write(host, ATMEL_PDC_RCR, sg->length / 4);
} }
else { else {
at91_mci_write(host, AT91_PDC_RNPR, sg->dma_address); at91_mci_write(host, ATMEL_PDC_RNPR, sg->dma_address);
at91_mci_write(host, AT91_PDC_RNCR, sg->length / 4); at91_mci_write(host, ATMEL_PDC_RNCR, sg->length / 4);
} }
} }
...@@ -303,7 +303,7 @@ static void at91mci_post_dma_read(struct at91mci_host *host) ...@@ -303,7 +303,7 @@ static void at91mci_post_dma_read(struct at91mci_host *host)
at91mci_pre_dma_read(host); at91mci_pre_dma_read(host);
else { else {
at91_mci_write(host, AT91_MCI_IER, AT91_MCI_RXBUFF); at91_mci_write(host, AT91_MCI_IER, AT91_MCI_RXBUFF);
at91_mci_write(host, AT91_PDC_PTCR, AT91_PDC_RXTDIS | AT91_PDC_TXTDIS); at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTDIS | ATMEL_PDC_TXTDIS);
} }
pr_debug("post dma read done\n"); pr_debug("post dma read done\n");
...@@ -320,7 +320,7 @@ static void at91_mci_handle_transmitted(struct at91mci_host *host) ...@@ -320,7 +320,7 @@ static void at91_mci_handle_transmitted(struct at91mci_host *host)
pr_debug("Handling the transmit\n"); pr_debug("Handling the transmit\n");
/* Disable the transfer */ /* Disable the transfer */
at91_mci_write(host, AT91_PDC_PTCR, AT91_PDC_RXTDIS | AT91_PDC_TXTDIS); at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTDIS | ATMEL_PDC_TXTDIS);
/* Now wait for cmd ready */ /* Now wait for cmd ready */
at91_mci_write(host, AT91_MCI_IDR, AT91_MCI_TXBUFE); at91_mci_write(host, AT91_MCI_IDR, AT91_MCI_TXBUFE);
...@@ -431,15 +431,15 @@ static unsigned int at91_mci_send_command(struct at91mci_host *host, struct mmc_ ...@@ -431,15 +431,15 @@ static unsigned int at91_mci_send_command(struct at91mci_host *host, struct mmc_
cmd->opcode, cmdr, cmd->arg, blocks, block_length, at91_mci_read(host, AT91_MCI_MR)); cmd->opcode, cmdr, cmd->arg, blocks, block_length, at91_mci_read(host, AT91_MCI_MR));
if (!data) { if (!data) {
at91_mci_write(host, AT91_PDC_PTCR, AT91_PDC_TXTDIS | AT91_PDC_RXTDIS); at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_TXTDIS | ATMEL_PDC_RXTDIS);
at91_mci_write(host, AT91_PDC_RPR, 0); at91_mci_write(host, ATMEL_PDC_RPR, 0);
at91_mci_write(host, AT91_PDC_RCR, 0); at91_mci_write(host, ATMEL_PDC_RCR, 0);
at91_mci_write(host, AT91_PDC_RNPR, 0); at91_mci_write(host, ATMEL_PDC_RNPR, 0);
at91_mci_write(host, AT91_PDC_RNCR, 0); at91_mci_write(host, ATMEL_PDC_RNCR, 0);
at91_mci_write(host, AT91_PDC_TPR, 0); at91_mci_write(host, ATMEL_PDC_TPR, 0);
at91_mci_write(host, AT91_PDC_TCR, 0); at91_mci_write(host, ATMEL_PDC_TCR, 0);
at91_mci_write(host, AT91_PDC_TNPR, 0); at91_mci_write(host, ATMEL_PDC_TNPR, 0);
at91_mci_write(host, AT91_PDC_TNCR, 0); at91_mci_write(host, ATMEL_PDC_TNCR, 0);
at91_mci_write(host, AT91_MCI_ARGR, cmd->arg); at91_mci_write(host, AT91_MCI_ARGR, cmd->arg);
at91_mci_write(host, AT91_MCI_CMDR, cmdr); at91_mci_write(host, AT91_MCI_CMDR, cmdr);
...@@ -452,7 +452,7 @@ static unsigned int at91_mci_send_command(struct at91mci_host *host, struct mmc_ ...@@ -452,7 +452,7 @@ static unsigned int at91_mci_send_command(struct at91mci_host *host, struct mmc_
/* /*
* Disable the PDC controller * Disable the PDC controller
*/ */
at91_mci_write(host, AT91_PDC_PTCR, AT91_PDC_RXTDIS | AT91_PDC_TXTDIS); at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTDIS | ATMEL_PDC_TXTDIS);
if (cmdr & AT91_MCI_TRCMD_START) { if (cmdr & AT91_MCI_TRCMD_START) {
data->bytes_xfered = 0; data->bytes_xfered = 0;
...@@ -481,8 +481,8 @@ static unsigned int at91_mci_send_command(struct at91mci_host *host, struct mmc_ ...@@ -481,8 +481,8 @@ static unsigned int at91_mci_send_command(struct at91mci_host *host, struct mmc_
pr_debug("Transmitting %d bytes\n", host->total_length); pr_debug("Transmitting %d bytes\n", host->total_length);
at91_mci_write(host, AT91_PDC_TPR, host->physical_address); at91_mci_write(host, ATMEL_PDC_TPR, host->physical_address);
at91_mci_write(host, AT91_PDC_TCR, host->total_length / 4); at91_mci_write(host, ATMEL_PDC_TCR, host->total_length / 4);
ier = AT91_MCI_TXBUFE; ier = AT91_MCI_TXBUFE;
} }
} }
...@@ -497,9 +497,9 @@ static unsigned int at91_mci_send_command(struct at91mci_host *host, struct mmc_ ...@@ -497,9 +497,9 @@ static unsigned int at91_mci_send_command(struct at91mci_host *host, struct mmc_
if (cmdr & AT91_MCI_TRCMD_START) { if (cmdr & AT91_MCI_TRCMD_START) {
if (cmdr & AT91_MCI_TRDIR) if (cmdr & AT91_MCI_TRDIR)
at91_mci_write(host, AT91_PDC_PTCR, AT91_PDC_RXTEN); at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTEN);
else else
at91_mci_write(host, AT91_PDC_PTCR, AT91_PDC_TXTEN); at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_TXTEN);
} }
return ier; return ier;
} }
......
...@@ -33,12 +33,13 @@ ...@@ -33,12 +33,13 @@
#include <linux/sysrq.h> #include <linux/sysrq.h>
#include <linux/tty_flip.h> #include <linux/tty_flip.h>
#include <linux/platform_device.h> #include <linux/platform_device.h>
#include <linux/atmel_pdc.h>
#include <asm/io.h> #include <asm/io.h>
#include <asm/mach/serial_at91.h> #include <asm/mach/serial_at91.h>
#include <asm/arch/board.h> #include <asm/arch/board.h>
#include <asm/arch/at91_pdc.h>
#ifdef CONFIG_ARM #ifdef CONFIG_ARM
#include <asm/arch/cpu.h> #include <asm/arch/cpu.h>
#include <asm/arch/gpio.h> #include <asm/arch/gpio.h>
......
/*
* include/asm-arm/arch-at91/at91_pdc.h
*
* Copyright (C) 2005 Ivan Kokshaysky
* Copyright (C) SAN People
*
* Peripheral Data Controller (PDC) registers.
* Based on AT91RM9200 datasheet revision E.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#ifndef AT91_PDC_H
#define AT91_PDC_H
#define AT91_PDC_RPR 0x100 /* Receive Pointer Register */
#define AT91_PDC_RCR 0x104 /* Receive Counter Register */
#define AT91_PDC_TPR 0x108 /* Transmit Pointer Register */
#define AT91_PDC_TCR 0x10c /* Transmit Counter Register */
#define AT91_PDC_RNPR 0x110 /* Receive Next Pointer Register */
#define AT91_PDC_RNCR 0x114 /* Receive Next Counter Register */
#define AT91_PDC_TNPR 0x118 /* Transmit Next Pointer Register */
#define AT91_PDC_TNCR 0x11c /* Transmit Next Counter Register */
#define AT91_PDC_PTCR 0x120 /* Transfer Control Register */
#define AT91_PDC_RXTEN (1 << 0) /* Receiver Transfer Enable */
#define AT91_PDC_RXTDIS (1 << 1) /* Receiver Transfer Disable */
#define AT91_PDC_TXTEN (1 << 8) /* Transmitter Transfer Enable */
#define AT91_PDC_TXTDIS (1 << 9) /* Transmitter Transfer Disable */
#define AT91_PDC_PTSR 0x124 /* Transfer Status Register */
#endif
/* /*
* include/asm-arm/arch-at91/at91_pdc.h * include/linux/atmel_pdc.h
* *
* Copyright (C) 2005 Ivan Kokshaysky * Copyright (C) 2005 Ivan Kokshaysky
* Copyright (C) SAN People * Copyright (C) SAN People
...@@ -13,24 +13,24 @@ ...@@ -13,24 +13,24 @@
* (at your option) any later version. * (at your option) any later version.
*/ */
#ifndef AT91_PDC_H #ifndef ATMEL_PDC_H
#define AT91_PDC_H #define ATMEL_PDC_H
#define AT91_PDC_RPR 0x100 /* Receive Pointer Register */ #define ATMEL_PDC_RPR 0x100 /* Receive Pointer Register */
#define AT91_PDC_RCR 0x104 /* Receive Counter Register */ #define ATMEL_PDC_RCR 0x104 /* Receive Counter Register */
#define AT91_PDC_TPR 0x108 /* Transmit Pointer Register */ #define ATMEL_PDC_TPR 0x108 /* Transmit Pointer Register */
#define AT91_PDC_TCR 0x10c /* Transmit Counter Register */ #define ATMEL_PDC_TCR 0x10c /* Transmit Counter Register */
#define AT91_PDC_RNPR 0x110 /* Receive Next Pointer Register */ #define ATMEL_PDC_RNPR 0x110 /* Receive Next Pointer Register */
#define AT91_PDC_RNCR 0x114 /* Receive Next Counter Register */ #define ATMEL_PDC_RNCR 0x114 /* Receive Next Counter Register */
#define AT91_PDC_TNPR 0x118 /* Transmit Next Pointer Register */ #define ATMEL_PDC_TNPR 0x118 /* Transmit Next Pointer Register */
#define AT91_PDC_TNCR 0x11c /* Transmit Next Counter Register */ #define ATMEL_PDC_TNCR 0x11c /* Transmit Next Counter Register */
#define AT91_PDC_PTCR 0x120 /* Transfer Control Register */ #define ATMEL_PDC_PTCR 0x120 /* Transfer Control Register */
#define AT91_PDC_RXTEN (1 << 0) /* Receiver Transfer Enable */ #define ATMEL_PDC_RXTEN (1 << 0) /* Receiver Transfer Enable */
#define AT91_PDC_RXTDIS (1 << 1) /* Receiver Transfer Disable */ #define ATMEL_PDC_RXTDIS (1 << 1) /* Receiver Transfer Disable */
#define AT91_PDC_TXTEN (1 << 8) /* Transmitter Transfer Enable */ #define ATMEL_PDC_TXTEN (1 << 8) /* Transmitter Transfer Enable */
#define AT91_PDC_TXTDIS (1 << 9) /* Transmitter Transfer Disable */ #define ATMEL_PDC_TXTDIS (1 << 9) /* Transmitter Transfer Disable */
#define AT91_PDC_PTSR 0x124 /* Transfer Status Register */ #define ATMEL_PDC_PTSR 0x124 /* Transfer Status Register */
#endif #endif
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