x86/cpufeatures: Add macros for Intel's new fast rep string features

mainline inclusion
from mainline-v6.3-rc1
commit f8df91e7
category: feature
feature: SPR fast rep string operations
bugzilla: https://gitee.com/openeuler/intel-kernel/issues/I6YPV0
CVE: N/A

Reference: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=f8df91e73a6827a4569bb56cd53e55b4ea2f5b1f

Intel-SIG: commit f8df91e7 ("x86/cpufeatures: Add macros for Intel's new fast rep string features")

-------------------------------------

KVM_GET_SUPPORTED_CPUID should reflect these host CPUID bits. The bits
are already cached in word 12. Give the bits X86_FEATURE names, so
that they can be easily referenced. Hide these bits from
/proc/cpuinfo, since the host kernel makes no use of them at present.
Signed-off-by: NJim Mattson <jmattson@google.com>
Reviewed-by: NSean Christopherson <seanjc@google.com>
Link: https://lore.kernel.org/r/20220901211811.2883855-1-jmattson@google.comSigned-off-by: NSean Christopherson <seanjc@google.com>
[ jason: amend commit log ]
Signed-off-by: NJason Zeng <jason.zeng@intel.com>

arch/x86/include/asm/cpufeatures.h

@@ -326,6 +326,9 @@
 /* Intel-defined CPU features, CPUID level 0x00000007:1 (EAX), word 12 */
 #define X86_FEATURE_AVX_VNNI		(12*32+ 4) /* AVX VNNI instructions */
 #define X86_FEATURE_AVX512_BF16		(12*32+ 5) /* AVX512 BFLOAT16 instructions */
+#define X86_FEATURE_FZRM		(12*32+10) /* "" Fast zero-length REP MOVSB */
+#define X86_FEATURE_FSRS		(12*32+11) /* "" Fast short REP STOSB */
+#define X86_FEATURE_FSRC		(12*32+12) /* "" Fast short REP {CMPSB,SCASB} */
 
 /* AMD-defined CPU features, CPUID level 0x80000008 (EBX), word 13 */
 #define X86_FEATURE_CLZERO		(13*32+ 0) /* CLZERO instruction */