!611 net: hns3: add supports customization requirements and fix vf fault detect err

Merge Pull Request from: @svishen 
 
The PR incorporates the customization code framework to support hns3 customization requirements. The following functions are supported:

1.add support modified tx timeout
2.add support query the presence of optical module
3.add supports configure optical module enable
4.add support config and query serdes lane status
5.add support disable nic clock
6.support set pfc pause trans time
7.disbable pfc en before the reset
8.add build check in hclge_get_vf_isolate_bitmap
9.notify specified VF for recovery operation

issue:
https://gitee.com/openeuler/kernel/issues/I6W94W 
 
Link:https://gitee.com/openeuler/kernel/pulls/611 

Reviewed-by: Jialin Zhang <zhangjialin11@huawei.com> 
Signed-off-by: Jialin Zhang <zhangjialin11@huawei.com> 

drivers/net/ethernet/hisilicon/hns3/hnae3_ext.h

@@ -38,6 +38,12 @@ enum hnae3_ext_opcode {
 	HNAE3_EXT_OPC_GET_PORT_EXT_ID_INFO,
 	HNAE3_EXT_OPC_GET_PORT_EXT_NUM_INFO,
 	HNAE3_EXT_OPC_GET_PORT_NUM,
+	HNAE3_EXT_OPC_GET_PRESENT,
+	HNAE3_EXT_OPC_SET_SFP_STATE,
+	HNAE3_EXT_OPC_DISABLE_LANE,
+	HNAE3_EXT_OPC_GET_LANE_STATUS,
+	HNAE3_EXT_OPC_DISABLE_CLOCK,
+	HNAE3_EXT_OPC_SET_PFC_TIME,
 };
 
 struct hnae3_pfc_storm_para {

drivers/net/ethernet/hisilicon/hns3/hns3_ext.c

@@ -382,3 +382,60 @@ int nic_get_port_num_per_chip(struct net_device *ndev, u32 *port_num)
 	return nic_get_port_num_of_die(ndev, port_num);
 }
 EXPORT_SYMBOL(nic_get_port_num_per_chip);
+
+int nic_set_tx_timeout(struct net_device *ndev, int tx_timeout)
+{
+	if (nic_netdev_match_check(ndev))
+		return -ENODEV;
+
+	if (tx_timeout <= 0)
+		return -EINVAL;
+
+	ndev->watchdog_timeo = tx_timeout;
+
+	return 0;
+}
+EXPORT_SYMBOL(nic_set_tx_timeout);
+
+int nic_get_sfp_present(struct net_device *ndev, int *present)
+{
+	return nic_invoke_pri_ops(ndev, HNAE3_EXT_OPC_GET_PRESENT,
+				  present, sizeof(*present));
+}
+EXPORT_SYMBOL(nic_get_sfp_present);
+
+int nic_set_sfp_state(struct net_device *ndev, bool en)
+{
+	u32 state = en ? 1 : 0;
+
+	return nic_invoke_pri_ops(ndev, HNAE3_EXT_OPC_SET_SFP_STATE,
+				  &state, sizeof(state));
+}
+EXPORT_SYMBOL(nic_set_sfp_state);
+
+int nic_disable_net_lane(struct net_device *ndev)
+{
+	return nic_invoke_pri_ops(ndev, HNAE3_EXT_OPC_DISABLE_LANE, NULL, 0);
+}
+EXPORT_SYMBOL(nic_disable_net_lane);
+
+int nic_get_net_lane_status(struct net_device *ndev, u32 *status)
+{
+	return nic_invoke_pri_ops(ndev, HNAE3_EXT_OPC_GET_LANE_STATUS,
+				  status, sizeof(*status));
+}
+EXPORT_SYMBOL(nic_get_net_lane_status);
+
+int nic_disable_clock(struct net_device *ndev)
+{
+	return nic_invoke_pri_ops(ndev, HNAE3_EXT_OPC_DISABLE_CLOCK,
+				  NULL, 0);
+}
+EXPORT_SYMBOL(nic_disable_clock);
+
+int nic_set_pfc_time_cfg(struct net_device *ndev, u16 time)
+{
+	return nic_invoke_pri_ops(ndev, HNAE3_EXT_OPC_SET_PFC_TIME,
+				  &time, sizeof(time));
+}
+EXPORT_SYMBOL(nic_set_pfc_time_cfg);

drivers/net/ethernet/hisilicon/hns3/hns3_ext.h

@@ -35,4 +35,11 @@ int nic_get_chip_num(struct net_device *ndev, u32 *chip_num);
 int nic_get_io_die_num(struct net_device *ndev, u32 *io_die_num);
 int nic_get_port_num_of_die(struct net_device *ndev, u32 *port_num);
 int nic_get_port_num_per_chip(struct net_device *ndev, u32 *port_num);
+int nic_set_tx_timeout(struct net_device *ndev, int tx_timeout);
+int nic_get_sfp_present(struct net_device *ndev, int *present);
+int nic_set_sfp_state(struct net_device *ndev, bool en);
+int nic_disable_net_lane(struct net_device *ndev);
+int nic_get_net_lane_status(struct net_device *ndev, u32 *status);
+int nic_disable_clock(struct net_device *ndev);
+int nic_set_pfc_time_cfg(struct net_device *ndev, u16 time);
 #endif

drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c

@@ -2992,7 +2992,7 @@ static bool hclge_reset_vf_in_bitmap(struct hclge_dev *hdev,
 			return false;
 		}
 
-		ret = hclge_func_reset_cmd(hdev, func_id);
+		ret = hclge_inform_vf_reset(vport, HNAE3_VF_FUNC_RESET);
 		if (ret) {
 			dev_err(&hdev->pdev->dev,
 				"failed to reset func %d, ret = %d.",
@@ -3016,6 +3016,9 @@ static void hclge_get_vf_fault_bitmap(struct hclge_desc *desc,
 
 	u8 *buff;
 
+	BUILD_BUG_ON(HCLGE_FIR_FAULT_BYTES + HCLGE_SEC_FAULT_BYTES !=
+		     BITS_TO_BYTES(HCLGE_VPORT_NUM));
+
 	memcpy(bitmap, desc[0].data, HCLGE_FIR_FAULT_BYTES);
 	buff = (u8 *)bitmap + HCLGE_FIR_FAULT_BYTES;
 	memcpy(buff, desc[1].data, HCLGE_SEC_FAULT_BYTES);

drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_ext.c

@@ -6,6 +6,7 @@
 #include "hnae3_ext.h"
 #include "hclge_cmd.h"
 #include "hclge_ext.h"
+#include "hclge_tm.h"
 
 static nic_event_fn_t nic_event_call;
 
@@ -440,6 +441,147 @@ static int hclge_get_port_num(struct hclge_dev *hdev, void *data,
 	return 0;
 }
 
+static int hclge_get_sfp_present(struct hclge_dev *hdev, void *data,
+				 size_t length)
+{
+	struct hclge_sfp_present_cmd *resp;
+	struct hclge_desc desc;
+	int ret;
+
+	if (length != sizeof(u32))
+		return -EINVAL;
+
+	ret = hclge_get_info_from_cmd(hdev, &desc, 1, HCLGE_OPC_SFP_GET_PRESENT);
+	if (ret) {
+		dev_err(&hdev->pdev->dev, "failed to get sfp present, ret = %d\n", ret);
+		return ret;
+	}
+
+	resp = (struct hclge_sfp_present_cmd *)desc.data;
+	*(u32 *)data = le32_to_cpu(resp->sfp_present);
+	return 0;
+}
+
+static int hclge_set_sfp_state(struct hclge_dev *hdev, void *data,
+			       size_t length)
+{
+	struct hclge_sfp_enable_cmd *req;
+	struct hclge_desc desc;
+	u32 state;
+	int ret;
+
+	if (length != sizeof(u32))
+		return -EINVAL;
+
+	state = *(u32 *)data;
+	hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_SFP_SET_STATUS, false);
+	req = (struct hclge_sfp_enable_cmd *)desc.data;
+	req->sfp_enable = cpu_to_le32(state);
+
+	ret = hclge_cmd_send(&hdev->hw, &desc, 1);
+	if (ret)
+		dev_err(&hdev->pdev->dev,
+			"failed to set sfp state, ret = %d\n", ret);
+
+	return ret;
+}
+
+static int hclge_set_net_lane_status(struct hclge_dev *hdev,
+				     u32 enable)
+{
+	struct hclge_desc desc;
+	int ret;
+
+	hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_DISABLE_NET_LANE, false);
+	desc.data[0] = cpu_to_le32(enable);
+
+	ret = hclge_cmd_send(&hdev->hw, &desc, 1);
+	if (ret)
+		dev_err(&hdev->pdev->dev,
+			"failed to set net lane status, ret = %d\n", ret);
+
+	return ret;
+}
+
+static int hclge_disable_net_lane(struct hclge_dev *hdev, void *data,
+				  size_t length)
+{
+	return hclge_set_net_lane_status(hdev, 0);
+}
+
+static int hclge_get_net_lane_status(struct hclge_dev *hdev, void *data,
+				     size_t length)
+{
+	struct hclge_desc desc;
+	int ret;
+
+	if (length != sizeof(u32))
+		return -EINVAL;
+
+	ret = hclge_get_info_from_cmd(hdev, &desc, 1, HCLGE_OPC_DISABLE_NET_LANE);
+	if (ret) {
+		dev_err(&hdev->pdev->dev,
+			"failed to get net lane status, ret = %d\n", ret);
+		return ret;
+	}
+
+	*(u32 *)data = le32_to_cpu(desc.data[0]);
+	return 0;
+}
+
+static int hclge_disable_nic_clock(struct hclge_dev *hdev, void *data,
+				   size_t length)
+{
+	struct hclge_desc desc;
+	u32 nic_clock_en = 0;
+	int ret;
+
+	hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_CONFIG_NIC_CLOCK, false);
+	desc.data[0] = cpu_to_le32(nic_clock_en);
+
+	ret = hclge_cmd_send(&hdev->hw, &desc, 1);
+	if (ret)
+		dev_err(&hdev->pdev->dev,
+			"failed to disable nic clock, ret = %d\n", ret);
+	return ret;
+}
+
+static int hclge_set_pause_trans_time(struct hclge_dev *hdev, void *data,
+				      size_t length)
+{
+	struct hclge_cfg_pause_param_cmd *pause_param;
+	struct hclge_desc desc;
+	u16 pause_trans_time;
+	int ret;
+
+	if (length != sizeof(u16))
+		return -EINVAL;
+
+	pause_param = (struct hclge_cfg_pause_param_cmd *)desc.data;
+	ret = hclge_get_info_from_cmd(hdev, &desc, 1, HCLGE_OPC_CFG_MAC_PARA);
+	if (ret) {
+		dev_err(&hdev->pdev->dev,
+			"failed to get pause cfg info, ret = %d\n", ret);
+		return ret;
+	}
+
+	pause_trans_time = *(u16 *)data;
+	if (pause_trans_time == le16_to_cpu(pause_param->pause_trans_time))
+		return 0;
+
+	ret = hclge_pause_param_cfg(hdev, pause_param->mac_addr,
+				    pause_param->pause_trans_gap,
+				    pause_trans_time);
+	if (ret) {
+		dev_err(&hdev->pdev->dev,
+			"failed to set pause trans time, ret = %d\n", ret);
+		return ret;
+	}
+
+	hdev->tm_info.pause_time = pause_trans_time;
+	return 0;
+}
+
 static void hclge_ext_resotre_config(struct hclge_dev *hdev)
 {
 	if (hdev->reset_type != HNAE3_IMP_RESET &&
@@ -601,6 +743,12 @@ static const hclge_priv_ops_fn hclge_ext_func_arr[] = {
 	[HNAE3_EXT_OPC_GET_PORT_EXT_ID_INFO] = hclge_get_extend_port_id_info,
 	[HNAE3_EXT_OPC_GET_PORT_EXT_NUM_INFO] = hclge_get_extend_port_num_info,
 	[HNAE3_EXT_OPC_GET_PORT_NUM] = hclge_get_port_num,
+	[HNAE3_EXT_OPC_GET_PRESENT] = hclge_get_sfp_present,
+	[HNAE3_EXT_OPC_SET_SFP_STATE] = hclge_set_sfp_state,
+	[HNAE3_EXT_OPC_DISABLE_LANE] = hclge_disable_net_lane,
+	[HNAE3_EXT_OPC_GET_LANE_STATUS] = hclge_get_net_lane_status,
+	[HNAE3_EXT_OPC_DISABLE_CLOCK] = hclge_disable_nic_clock,
+	[HNAE3_EXT_OPC_SET_PFC_TIME] = hclge_set_pause_trans_time,
 };
 
 int hclge_ext_ops_handle(struct hnae3_handle *handle, int opcode,

drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_ext.h

@@ -73,7 +73,18 @@ struct hclge_torus_cfg_cmd {
 	__le32 torus_en;
 };
 
+struct hclge_sfp_present_cmd {
+	__le32 sfp_present;
+	__le32 rsv[5];
+};
+
+struct hclge_sfp_enable_cmd {
+	__le32 sfp_enable;
+	__le32 rsv[5];
+};
+
 enum hclge_ext_opcode_type {
+	HCLGE_OPC_CONFIG_NIC_CLOCK = 0x0060,
 	HCLGE_OPC_CONFIG_SWITCH_PARAM = 0x1033,
 	HCLGE_OPC_CONFIG_VLAN_FILTER = 0x1100,
 	HCLGE_OPC_SET_NOTIFY_PKT = 0x180A,
@@ -81,7 +92,10 @@ enum hclge_ext_opcode_type {
 	HCLGE_OPC_CHIP_ID_GET = 0x7003,
 	HCLGE_OPC_GET_CHIP_NUM = 0x7005,
 	HCLGE_OPC_GET_PORT_NUM = 0x7006,
+	HCLGE_OPC_DISABLE_NET_LANE = 0x7008,
 	HCLGE_OPC_CFG_PAUSE_STORM_PARA = 0x7019,
+	HCLGE_OPC_SFP_GET_PRESENT = 0x7101,
+	HCLGE_OPC_SFP_SET_STATUS = 0x7102,
 };
 
 struct hclge_reset_fail_type_map {

drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c

@@ -8465,12 +8465,15 @@ static void hclge_ae_stop(struct hnae3_handle *handle)
 	/* If it is not PF reset or FLR, the firmware will disable the MAC,
 	 * so it only need to stop phy here.
 	 */
-	if (test_bit(HCLGE_STATE_RST_HANDLING, &hdev->state) &&
-	    hdev->reset_type != HNAE3_FUNC_RESET &&
-	    hdev->reset_type != HNAE3_FLR_RESET) {
-		hclge_mac_stop_phy(hdev);
-		hclge_update_link_status(hdev);
-		return;
+	if (test_bit(HCLGE_STATE_RST_HANDLING, &hdev->state)) {
+		hclge_pfc_pause_en_cfg(hdev, HCLGE_PFC_TX_RX_DISABLE,
+				       HCLGE_PFC_DISABLE);
+		if (hdev->reset_type != HNAE3_FUNC_RESET &&
+		    hdev->reset_type != HNAE3_FLR_RESET) {
+			hclge_mac_stop_phy(hdev);
+			hclge_update_link_status(hdev);
+			return;
+		}
 	}
 
 	hclge_reset_tqp(handle);

drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h

@@ -372,6 +372,7 @@ struct hclge_tm_info {
 	enum hclge_fc_mode fc_mode;
 	u8 hw_pfc_map; /* Allow for packet drop or not on this TC */
 	u8 pfc_en;	/* PFC enabled or not for user priority */
+	u16 pause_time;
 };
 
 /* max number of mac statistics on each version */
@@ -1163,6 +1164,7 @@ int hclge_cfg_mac_speed_dup_hw(struct hclge_dev *hdev, int speed, u8 duplex,
 int hclge_get_wol_supported_mode(struct hclge_dev *hdev, u32 *wol_supported);
 int hclge_get_wol_cfg(struct hclge_dev *hdev, u32 *mode);
 struct hclge_vport *hclge_get_vf_vport(struct hclge_dev *hdev, int vf);
+int hclge_inform_vf_reset(struct hclge_vport *vport, u16 reset_type);
 void hclge_reset_task_schedule(struct hclge_dev *hdev);
 void hclge_reset_event(struct pci_dev *pdev, struct hnae3_handle *handle);
 #endif

drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mbx.c

@@ -124,7 +124,7 @@ static int hclge_send_mbx_msg(struct hclge_vport *vport, u8 *msg, u16 msg_len,
 	return status;
 }
 
-static int hclge_inform_vf_reset(struct hclge_vport *vport, u16 reset_type)
+int hclge_inform_vf_reset(struct hclge_vport *vport, u16 reset_type)
 {
 	__le16 msg_data;
 	u8 dest_vfid;

drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c

@@ -171,8 +171,8 @@ int hclge_mac_pause_en_cfg(struct hclge_dev *hdev, bool tx, bool rx)
 	return hclge_cmd_send(&hdev->hw, &desc, 1);
 }
 
-static int hclge_pfc_pause_en_cfg(struct hclge_dev *hdev, u8 tx_rx_bitmap,
-				  u8 pfc_bitmap)
+int hclge_pfc_pause_en_cfg(struct hclge_dev *hdev, u8 tx_rx_bitmap,
+			   u8 pfc_bitmap)
 {
 	struct hclge_desc desc;
 	struct hclge_pfc_en_cmd *pfc = (struct hclge_pfc_en_cmd *)desc.data;
@@ -185,8 +185,8 @@ static int hclge_pfc_pause_en_cfg(struct hclge_dev *hdev, u8 tx_rx_bitmap,
 	return hclge_cmd_send(&hdev->hw, &desc, 1);
 }
 
-static int hclge_pause_param_cfg(struct hclge_dev *hdev, const u8 *addr,
-				 u8 pause_trans_gap, u16 pause_trans_time)
+int hclge_pause_param_cfg(struct hclge_dev *hdev, const u8 *addr,
+			  u8 pause_trans_gap, u16 pause_trans_time)
 {
 	struct hclge_cfg_pause_param_cmd *pause_param;
 	struct hclge_desc desc;
@@ -1493,7 +1493,7 @@ static int hclge_pause_param_setup_hw(struct hclge_dev *hdev)
 
 	return hclge_pause_param_cfg(hdev, mac->mac_addr,
 				     HCLGE_DEFAULT_PAUSE_TRANS_GAP,
-				     HCLGE_DEFAULT_PAUSE_TRANS_TIME);
+				     hdev->tm_info.pause_time);
 }
 
 static int hclge_pfc_setup_hw(struct hclge_dev *hdev)
@@ -1687,6 +1687,7 @@ int hclge_tm_schd_init(struct hclge_dev *hdev)
 	/* fc_mode is HCLGE_FC_FULL on reset */
 	hdev->tm_info.fc_mode = HCLGE_FC_FULL;
 	hdev->fc_mode_last_time = hdev->tm_info.fc_mode;
+	hdev->tm_info.pause_time = HCLGE_DEFAULT_PAUSE_TRANS_TIME;
 
 	if (hdev->tx_sch_mode != HCLGE_FLAG_TC_BASE_SCH_MODE &&
 	    hdev->tm_info.num_pg != 1)

drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.h

@@ -164,6 +164,9 @@ struct hclge_bp_to_qs_map_cmd {
 	u32 rsvd1;
 };
 
+#define HCLGE_PFC_DISABLE	0
+#define HCLGE_PFC_TX_RX_DISABLE	0
+
 struct hclge_pfc_en_cmd {
 	u8 tx_rx_en_bitmap;
 	u8 pri_en_bitmap;
@@ -236,6 +239,10 @@ void hclge_tm_pfc_info_update(struct hclge_dev *hdev);
 int hclge_tm_dwrr_cfg(struct hclge_dev *hdev);
 int hclge_tm_init_hw(struct hclge_dev *hdev, bool init);
 int hclge_mac_pause_en_cfg(struct hclge_dev *hdev, bool tx, bool rx);
+int hclge_pfc_pause_en_cfg(struct hclge_dev *hdev, u8 tx_rx_bitmap,
+			   u8 pfc_bitmap);
+int hclge_pause_param_cfg(struct hclge_dev *hdev, const u8 *addr,
+			  u8 pause_trans_gap, u16 pause_trans_time);
 int hclge_pause_addr_cfg(struct hclge_dev *hdev, const u8 *mac_addr);
 void hclge_pfc_rx_stats_get(struct hclge_dev *hdev, u64 *stats);
 void hclge_pfc_tx_stats_get(struct hclge_dev *hdev, u64 *stats);