arm64/sme: Remove _EL0 from name of SVCR - FIXME sysreg.h

mainline inclusion
from mainline-v5.19-rc1
commit ec0067a6
category: feature
bugzilla: https://gitee.com/openeuler/kernel/issues/I5ITJT
CVE: NA

Reference: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=ec0067a63e5a37de74025d46095cfe7a7af3114a

-------------------------------------------------

The defines for SVCR call it SVCR_EL0 however the architecture calls the
register SVCR with no _EL0 suffix. In preparation for generating the sysreg
definitions rename to match the architecture, no functional change.
Signed-off-by: NMark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20220510161208.631259-6-broonie@kernel.orgSigned-off-by: NCatalin Marinas <catalin.marinas@arm.com>
Conflicts:
	Leave kvm's modification
Signed-off-by: NWang ShaoBo <bobo.shaobowang@huawei.com>

arch/arm64/include/asm/fpsimd.h

@@ -68,12 +68,12 @@ extern void fpsimd_save_and_flush_cpu_state(void);
 
 static inline bool thread_sm_enabled(struct thread_struct *thread)
 {
-	return system_supports_sme() && (thread->svcr & SVCR_EL0_SM_MASK);
+	return system_supports_sme() && (thread->svcr & SVCR_SM_MASK);
 }
 
 static inline bool thread_za_enabled(struct thread_struct *thread)
 {
-	return system_supports_sme() && (thread->svcr & SVCR_EL0_ZA_MASK);
+	return system_supports_sme() && (thread->svcr & SVCR_ZA_MASK);
 }
 
 /* Maximum VL that SVE/SME VL-agnostic software can transparently support */

arch/arm64/include/asm/processor.h

@@ -192,7 +192,7 @@ static inline unsigned int thread_get_sme_vl(struct thread_struct *thread)
 
 static inline unsigned int thread_get_cur_vl(struct thread_struct *thread)
 {
-	if (system_supports_sme() && (thread->svcr & SVCR_EL0_SM_MASK))
+	if (system_supports_sme() && (thread->svcr & SVCR_SM_MASK))
 		return thread_get_sme_vl(thread);
 	else
 		return thread_get_sve_vl(thread);

arch/arm64/include/asm/sysreg.h

@@ -412,9 +412,9 @@
 #define SYS_RNDR_EL0			sys_reg(3, 3, 2, 4, 0)
 #define SYS_RNDRRS_EL0			sys_reg(3, 3, 2, 4, 1)
 
-#define SYS_SVCR_EL0			sys_reg(3, 3, 4, 2, 2)
-#define SVCR_EL0_ZA_MASK		2
-#define SVCR_EL0_SM_MASK		1
+#define SYS_SVCR			sys_reg(3, 3, 4, 2, 2)
+#define SVCR_ZA_MASK			2
+#define SVCR_SM_MASK			1
 
 #define SYS_PMCR_EL0			sys_reg(3, 3, 9, 12, 0)
 #define SYS_PMCNTENSET_EL0		sys_reg(3, 3, 9, 12, 1)

arch/arm64/kernel/fpsimd.c

@@ -392,7 +392,7 @@ static void task_fpsimd_load(void)
 		if (test_thread_flag(TIF_SME))
 			sme_set_vq(sve_vq_from_vl(sme_vl) - 1);
 
-		write_sysreg_s(current->thread.svcr, SYS_SVCR_EL0);
+		write_sysreg_s(current->thread.svcr, SYS_SVCR);
 
 		if (thread_za_enabled(&current->thread))
 			za_load_state(current->thread.za_state);
@@ -438,15 +438,15 @@ static void fpsimd_save(void)
 
 	if (system_supports_sme()) {
 		u64 *svcr = last->svcr;
-		*svcr = read_sysreg_s(SYS_SVCR_EL0);
+		*svcr = read_sysreg_s(SYS_SVCR);
 
-		*svcr = read_sysreg_s(SYS_SVCR_EL0);
+		*svcr = read_sysreg_s(SYS_SVCR);
 
-		if (*svcr & SYS_SVCR_EL0_ZA_MASK)
+		if (*svcr & SVCR_ZA_MASK)
 			za_save_state(last->za_state);
 
 		/* If we are in streaming mode override regular SVE. */
-		if (*svcr & SYS_SVCR_EL0_SM_MASK) {
+		if (*svcr & SVCR_SM_MASK) {
 			save_sve_regs = true;
 			save_ffr = system_supports_fa64();
 			vl = last->sme_vl;
@@ -828,8 +828,8 @@ int vec_set_vector_length(struct task_struct *task, enum vec_type type,
 		sve_to_fpsimd(task);
 
 	if (system_supports_sme() && type == ARM64_VEC_SME) {
-		task->thread.svcr &= ~(SYS_SVCR_EL0_SM_MASK |
-				       SYS_SVCR_EL0_ZA_MASK);
+		task->thread.svcr &= ~(SVCR_SM_MASK |
+				       SVCR_ZA_MASK);
 		clear_thread_flag(TIF_SME);
 	}
 
@@ -1875,10 +1875,10 @@ void __efi_fpsimd_begin(void)
 			__this_cpu_write(efi_sve_state_used, true);
 
 			if (system_supports_sme()) {
-				svcr = read_sysreg_s(SYS_SVCR_EL0);
+				svcr = read_sysreg_s(SYS_SVCR);
 
 				if (!system_supports_fa64())
-					ffr = svcr & SVCR_EL0_SM_MASK;
+					ffr = svcr & SVCR_SM_MASK;
 
 				__this_cpu_write(efi_sm_state, ffr);
 			}
@@ -1888,8 +1888,8 @@ void __efi_fpsimd_begin(void)
 				       ffr);
 
 			if (system_supports_sme())
-				sysreg_clear_set_s(SYS_SVCR_EL0,
-						   SVCR_EL0_SM_MASK, 0);
+				sysreg_clear_set_s(SYS_SVCR,
+						   SVCR_SM_MASK, 0);
 
 		} else {
 			fpsimd_save_state(this_cpu_ptr(&efi_fpsimd_state));
@@ -1922,9 +1922,9 @@ void __efi_fpsimd_end(void)
 			 */
 			if (system_supports_sme()) {
 				if (__this_cpu_read(efi_sm_state)) {
-					sysreg_clear_set_s(SYS_SVCR_EL0,
+					sysreg_clear_set_s(SYS_SVCR,
 							   0,
-							   SVCR_EL0_SM_MASK);
+							   SVCR_SM_MASK);
 					if (!system_supports_fa64())
 						ffr = efi_sm_state;
 				}

arch/arm64/kernel/ptrace.c

@@ -869,10 +869,10 @@ static int sve_set_common(struct task_struct *target,
 
 		switch (type) {
 		case ARM64_VEC_SVE:
-			target->thread.svcr &= ~SYS_SVCR_EL0_SM_MASK;
+			target->thread.svcr &= ~SVCR_SM_MASK;
 			break;
 		case ARM64_VEC_SME:
-			target->thread.svcr |= SYS_SVCR_EL0_SM_MASK;
+			target->thread.svcr |= SVCR_SM_MASK;
 			break;
 		default:
 			WARN_ON_ONCE(1);
@@ -1102,7 +1102,7 @@ static int za_set(struct task_struct *target,
 
 	/* If there is no data then disable ZA */
 	if (!count) {
-		target->thread.svcr &= ~SYS_SVCR_EL0_ZA_MASK;
+		target->thread.svcr &= ~SVCR_ZA_MASK;
 		goto out;
 	}
 
@@ -1127,7 +1127,7 @@ static int za_set(struct task_struct *target,
 
 	/* Mark ZA as active and let userspace use it */
 	set_tsk_thread_flag(target, TIF_SME);
-	target->thread.svcr |= SYS_SVCR_EL0_ZA_MASK;
+	target->thread.svcr |= SVCR_ZA_MASK;
 
 out:
 	fpsimd_flush_task_state(target);

arch/arm64/kernel/signal.c

@@ -240,7 +240,7 @@ int restore_sve_fpsimd_context(struct user_ctxs *user)
 
 	if (sve.head.size <= sizeof(*user->sve)) {
 		clear_thread_flag(TIF_SVE);
-		current->thread.svcr &= ~SYS_SVCR_EL0_SM_MASK;
+		current->thread.svcr &= ~SVCR_SM_MASK;
 		goto fpsimd_only;
 	}
 
@@ -273,7 +273,7 @@ int restore_sve_fpsimd_context(struct user_ctxs *user)
 		return -EFAULT;
 
 	if (sve.flags & SVE_SIG_FLAG_SM)
-		current->thread.svcr |= SYS_SVCR_EL0_SM_MASK;
+		current->thread.svcr |= SVCR_SM_MASK;
 	else
 		set_thread_flag(TIF_SVE);
 
@@ -344,7 +344,7 @@ int restore_za_context(struct user_ctxs __user *user)
 		return -EINVAL;
 
 	if (za.head.size <= sizeof(*user->za)) {
-		current->thread.svcr &= ~SYS_SVCR_EL0_ZA_MASK;
+		current->thread.svcr &= ~SVCR_ZA_MASK;
 		return 0;
 	}
 
@@ -365,7 +365,7 @@ int restore_za_context(struct user_ctxs __user *user)
 
 	sme_alloc(current);
 	if (!current->thread.za_state) {
-		current->thread.svcr &= ~SYS_SVCR_EL0_ZA_MASK;
+		current->thread.svcr &= ~SVCR_ZA_MASK;
 		clear_thread_flag(TIF_SME);
 		return -ENOMEM;
 	}
@@ -378,7 +378,7 @@ int restore_za_context(struct user_ctxs __user *user)
 		return -EFAULT;
 
 	set_thread_flag(TIF_SME);
-	current->thread.svcr |= SYS_SVCR_EL0_ZA_MASK;
+	current->thread.svcr |= SVCR_ZA_MASK;
 
 	return 0;
 }
@@ -706,8 +706,8 @@ static void setup_return(struct pt_regs *regs, struct k_sigaction *ka,
 
 	/* Signal handlers are invoked with ZA and streaming mode disabled */
 	if (system_supports_sme()) {
-		current->thread.svcr &= ~(SYS_SVCR_EL0_ZA_MASK |
-					  SYS_SVCR_EL0_SM_MASK);
+		current->thread.svcr &= ~(SVCR_ZA_MASK |
+					  SVCR_SM_MASK);
 		sme_smstop();
 	}
 

arch/arm64/kernel/syscall.c

@@ -187,9 +187,9 @@ static inline void fp_user_discard(void)
 	 * need updating.
 	 */
 	if (system_supports_sme() && test_thread_flag(TIF_SME)) {
-		u64 svcr = read_sysreg_s(SYS_SVCR_EL0);
+		u64 svcr = read_sysreg_s(SYS_SVCR);
 
-		if (svcr & SYS_SVCR_EL0_SM_MASK)
+		if (svcr & SVCR_SM_MASK)
 			sme_smstop_sm();
 	}
 

arch/arm64/kvm/fpsimd.c

@@ -99,8 +99,8 @@ void kvm_arch_vcpu_load_fp(struct kvm_vcpu *vcpu)
 		if (read_sysreg(cpacr_el1) & CPACR_EL1_SMEN_EL0EN)
 			vcpu->arch.flags |= KVM_ARM64_HOST_SME_ENABLED;
 
-		if (read_sysreg_s(SYS_SVCR_EL0) &
-		    (SYS_SVCR_EL0_SM_MASK | SYS_SVCR_EL0_ZA_MASK)) {
+		if (read_sysreg_s(SYS_SVCR) &
+		    (SVCR_SM_MASK | SVCR_ZA_MASK)) {
 			vcpu->arch.flags &= ~KVM_ARM64_FP_HOST;
 			fpsimd_save_and_flush_cpu_state();
 		}

arch/arm64/kvm/sys_regs.c

@@ -1645,7 +1645,7 @@ static const struct sys_reg_desc sys_reg_descs[] = {
 	{ SYS_DESC(SYS_SMIDR_EL1), undef_access },
 	{ SYS_DESC(SYS_CSSELR_EL1), access_csselr, reset_unknown, CSSELR_EL1 },
 	{ SYS_DESC(SYS_CTR_EL0), access_ctr },
-	{ SYS_DESC(SYS_SVCR_EL0), undef_access },
+	{ SYS_DESC(SYS_SVCR), undef_access },
 
 	{ SYS_DESC(SYS_PMCR_EL0), access_pmcr, reset_pmcr, PMCR_EL0 },
 	{ SYS_DESC(SYS_PMCNTENSET_EL0), access_pmcnten, reset_unknown, PMCNTENSET_EL0 },