arm64: Fix conflict for capability when cpu hotplug

hulk inclusion
category: bugfix
bugzilla: https://gitee.com/openeuler/kernel/issues/I4LGV4
CVE: NA

---------------------------

Patch "cache: Workaround HiSilicon Taishan DC CVAU" breaks the verifiy
of cpu capability when hot plug cpus. It set the system scope on but
local cpu capability still off.
This path fix it by two step:
1. Unset CTR_IDC_SHIFT bit from strict_mask to skip check.
2. Special treatment in read_cpuid_effective_cachetype
Signed-off-by: NWeilong Chen <chenweilong@huawei.com>
Reviewed-by: NKefeng Wang <wangkefeng.wang@huawei.com>
Signed-off-by: NYang Yingliang <yangyingliang@huawei.com>

arch/arm64/include/asm/cache.h

@@ -108,6 +108,15 @@ int cache_line_size(void);
 static inline u32 __attribute_const__ read_cpuid_effective_cachetype(void)
 {
 	u32 ctr = read_cpuid_cachetype();
+#ifdef CONFIG_HISILICON_ERRATUM_1980005
+	static const struct midr_range idc_support_list[] = {
+		MIDR_ALL_VERSIONS(MIDR_HISI_TSV110),
+		MIDR_REV(MIDR_HISI_TSV200, 1, 0),
+		{ /* sentinel */ }
+	};
+	if (is_midr_in_range_list(read_cpuid_id(), idc_support_list))
+		ctr |= BIT(CTR_IDC_SHIFT);
+#endif
 
 	if (!(ctr & BIT(CTR_IDC_SHIFT))) {
 		u64 clidr = read_sysreg(clidr_el1);

arch/arm64/kernel/cpu_errata.c

@@ -90,6 +90,7 @@ hisilicon_1980005_enable(const struct arm64_cpu_capabilities *__unused)
 {
 	cpus_set_cap(ARM64_HAS_CACHE_IDC);
 	arm64_ftr_reg_ctrel0.sys_val |= BIT(CTR_IDC_SHIFT);
+	arm64_ftr_reg_ctrel0.strict_mask &= ~BIT(CTR_IDC_SHIFT);
 	sysreg_clear_set(sctlr_el1, SCTLR_EL1_UCT, 0);
 }
 #endif