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    drm/i915: add intel_display_power_enabled_sw() for use in atomic ctx · ddf9c536
    Imre Deak 提交于
    Atm we call intel_display_power_enabled() from
    i915_capture_error_state() in IRQ context and then take a mutex. To fix
    this add a new intel_display_power_enabled_sw() which returns the domain
    state based on software tracking as opposed to reading the actual HW
    state.
    
    Since we use domain_use_count for this without locking on the reader
    side make sure we increase the counter only after enabling all required
    power wells and decrease it before disabling any of these power wells.
    
    Regression introduced in
    commit 1b02383464b4a915627ef3b8fd0ad7f07168c54c
    Author: Imre Deak <imre.deak@intel.com>
    Date:   Tue Sep 24 16:17:09 2013 +0300
    
        drm/i915: support for multiple power wells
    
    Note that atm we depend on the value returned by
    intel_display_power_enabled_sw() in i915_capture_error_state() to avoid
    unclaimed register access reports. This was never guaranteed though,
    since another thread can disable the power concurrently. If this is a
    problem we need another explicit way to disable the reporting during
    error captures.
    
    v2:
    - remove barriers as the caller can't depend on the value
      returned from i915_capture_error_state_sw() anyway (Ville)
    - dump the state of pipe/transcoder power domain state (Daniel)
    Reported-by: NChris Wilson <chris@chris-wilson.co.uk>
    Signed-off-by: NImre Deak <imre.deak@intel.com>
    Reviewed-by: NPaulo Zanoni <paulo.r.zanoni@intel.com>
    Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
    ddf9c536
intel_pm.c 172.6 KB