driver inclusion
category: feature
bugzilla: https://gitee.com/openeuler/kernel/issues/I5Y79T

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In the current implementation, we configure a fixed addressing level
for the MTR. But in fact, the necessary addressing level is related
to the page size and the size of the memory.

This patch calculates the addressing level according to the page size
and the size of the memory, and uses the addressing level to configure
the MTR.

It only works for PBL now.
Signed-off-by: NChengchang Tang <tangchengchang@huawei.com>
Reviewed-by: NYangyang Li <liyangyang20@huawei.com>
Reviewed-by: NYueHaibing <yuehaibing@huawei.com>
Signed-off-by: NZheng Zengkai <zhengzengkai@huawei.com>