This chip has a diagnostics status bit informing about the state and
stability of the clock subsystem. According to the datasheet (STSint
register, bit 5, ClockReady), this bit works with the crystal
oscillator, but even without the PLL. Therefore:

- ensure that the clock check is done even when PLL is not active
- warn when the chip thinks that the clock is not ready yet

There are HW features which would let us wait asynchronously (there's a
maskable IRQ for that bit), but I think that even this simple check is a
net improvement. It would have saved me two days of debugging :).
Signed-off-by: NJan Kundrát <jan.kundrat@cesnet.cz>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>