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由 Ionela Voinescu 提交于
mainline inclusion from mainline-v5.11-rc1 commit 68c5debc category: feature bugzilla: https://gitee.com/openeuler/kernel/issues/I4QGH5 CVE: NA ---------------------- If Activity Monitors (AMUs) are present, two of the counters can be used to implement support for CPPC's (Collaborative Processor Performance Control) delivered and reference performance monitoring functionality using FFH (Functional Fixed Hardware). Given that counters for a certain CPU can only be read from that CPU, while FFH operations can be called from any CPU for any of the CPUs, use smp_call_function_single() to provide the requested values. Therefore, depending on the register addresses, the following values are returned: - 0x0 (DeliveredPerformanceCounterRegister): AMU core counter - 0x1 (ReferencePerformanceCounterRegister): AMU constant counter The use of Activity Monitors is hidden behind the generic cpu_read_{corecnt,constcnt}() functions. Read functionality for these two registers represents the only current FFH support for CPPC. Read operations for other register values or write operation for all registers are unsupported. Therefore, keep CPPC's FFH unsupported if no CPUs have valid AMU frequency counters. For this purpose, the get_cpu_with_amu_feat() is introduced. Signed-off-by: NIonela Voinescu <ionela.voinescu@arm.com> Reviewed-by: NSudeep Holla <sudeep.holla@arm.com> Cc: Will Deacon <will@kernel.org> Link: https://lore.kernel.org/r/20201106125334.21570-4-ionela.voinescu@arm.comSigned-off-by: NCatalin Marinas <catalin.marinas@arm.com> [wangxiongfeng: A usecase is as follows.] Name(_CPC, Package() { 23, // NumEntries 3, // Revision 100, // Highest Performance - Fixed 100MHz 100, // Nominal Performance - Fixed 100MHz 1, // Lowest Nonlinear Performance 1, // Lowest Performance ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Guaranteed Performance Register ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Desired Perf Register ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Minimum Performance Register ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Maximum Performance Register ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Red. Tolerance Register ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Time Window Register ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Counter Wraparound Time ResourceTemplate(){Register(FFixedHW, 0x40, 0, 1, 0x4)}, // Reference Performance Counter Register ResourceTemplate(){Register(FFixedHW, 0x40, 0, 0, 0x4)}, // Delivered Performance Counter Register ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Performance Ltd Register ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // CPPC Enable Register ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Selection Enable ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Autonomous Activity Window Register ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)}, // Energy Performance Preference Register 100, // Reference Performance - Fixed 100MHz 1, // Lowest Frequency 100, // Nominal Frequency - Fixed 100MHz }) Signed-off-by: NXiongfeng Wang <wangxiongfeng2@huawei.com> Reviewed-by: NHanjun Guo <guohanjun@huawei.com> Signed-off-by: NZheng Zengkai <zhengzengkai@huawei.com>
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