Happened when the Playback (or Capture) is running continuously
and Capture (or Playback) is restarted (xrun, manual stop/start...)

Since the RX (or TX) FIFO are only reset when the whole SSI is disabled,
pending samples from previous capture (or playback) session may still
be present. They must be erased to not introduce channel slipping.

FIFO Clear register fields are documented in IMX51, IMX35 reference manual.
They are not documented in IMX50 or IMX6 RM, despite they are
working as expected on IMX6SL and IMX6solo.
Signed-off-by: NArnaud Mouiche <arnaud.mouiche@invoxia.com>
Reviewed-by: NFabio Estevam <fabio.estevam@nxp.com>
Tested-by: NCaleb Crome <caleb@crome.org>
Signed-off-by: NMark Brown <broonie@kernel.org>