hda_intel.c 102.3 KB
Newer Older
L
Linus Torvalds 已提交
1 2
/*
 *
3 4
 *  hda_intel.c - Implementation of primary alsa driver code base
 *                for Intel HD Audio.
L
Linus Torvalds 已提交
5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38
 *
 *  Copyright(c) 2004 Intel Corporation. All rights reserved.
 *
 *  Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
 *                     PeiSen Hou <pshou@realtek.com.tw>
 *
 *  This program is free software; you can redistribute it and/or modify it
 *  under the terms of the GNU General Public License as published by the Free
 *  Software Foundation; either version 2 of the License, or (at your option)
 *  any later version.
 *
 *  This program is distributed in the hope that it will be useful, but WITHOUT
 *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 *  more details.
 *
 *  You should have received a copy of the GNU General Public License along with
 *  this program; if not, write to the Free Software Foundation, Inc., 59
 *  Temple Place - Suite 330, Boston, MA  02111-1307, USA.
 *
 *  CONTACTS:
 *
 *  Matt Jared		matt.jared@intel.com
 *  Andy Kopp		andy.kopp@intel.com
 *  Dan Kogan		dan.d.kogan@intel.com
 *
 *  CHANGES:
 *
 *  2004.12.01	Major rewrite by tiwai, merged the work of pshou
 * 
 */

#include <linux/delay.h>
#include <linux/interrupt.h>
39
#include <linux/kernel.h>
L
Linus Torvalds 已提交
40
#include <linux/module.h>
41
#include <linux/dma-mapping.h>
L
Linus Torvalds 已提交
42 43 44 45
#include <linux/moduleparam.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/pci.h>
46
#include <linux/mutex.h>
T
Takashi Iwai 已提交
47
#include <linux/reboot.h>
T
Takashi Iwai 已提交
48
#include <linux/io.h>
49
#include <linux/pm_runtime.h>
50 51
#include <linux/clocksource.h>
#include <linux/time.h>
52
#include <linux/completion.h>
53

T
Takashi Iwai 已提交
54 55 56 57 58
#ifdef CONFIG_X86
/* for snoop control */
#include <asm/pgtable.h>
#include <asm/cacheflush.h>
#endif
L
Linus Torvalds 已提交
59 60
#include <sound/core.h>
#include <sound/initval.h>
61
#include <linux/vgaarb.h>
62
#include <linux/vga_switcheroo.h>
63
#include <linux/firmware.h>
L
Linus Torvalds 已提交
64 65 66
#include "hda_codec.h"


67 68
static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
69
static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
70
static char *model[SNDRV_CARDS];
71
static int position_fix[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = -1};
72
static int bdl_pos_adj[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = -1};
73
static int probe_mask[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = -1};
T
Takashi Iwai 已提交
74
static int probe_only[SNDRV_CARDS];
75
static int jackpoll_ms[SNDRV_CARDS];
76
static bool single_cmd;
T
Takashi Iwai 已提交
77
static int enable_msi = -1;
78 79 80
#ifdef CONFIG_SND_HDA_PATCH_LOADER
static char *patch[SNDRV_CARDS];
#endif
81
#ifdef CONFIG_SND_HDA_INPUT_BEEP
T
Takashi Iwai 已提交
82
static bool beep_mode[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] =
83 84
					CONFIG_SND_HDA_INPUT_BEEP_MODE};
#endif
L
Linus Torvalds 已提交
85

86
module_param_array(index, int, NULL, 0444);
L
Linus Torvalds 已提交
87
MODULE_PARM_DESC(index, "Index value for Intel HD audio interface.");
88
module_param_array(id, charp, NULL, 0444);
L
Linus Torvalds 已提交
89
MODULE_PARM_DESC(id, "ID string for Intel HD audio interface.");
90 91 92
module_param_array(enable, bool, NULL, 0444);
MODULE_PARM_DESC(enable, "Enable Intel HD audio interface.");
module_param_array(model, charp, NULL, 0444);
L
Linus Torvalds 已提交
93
MODULE_PARM_DESC(model, "Use the given board model.");
94
module_param_array(position_fix, int, NULL, 0444);
95
MODULE_PARM_DESC(position_fix, "DMA pointer read method."
96
		 "(-1 = system default, 0 = auto, 1 = LPIB, 2 = POSBUF, 3 = VIACOMBO, 4 = COMBO).");
97 98
module_param_array(bdl_pos_adj, int, NULL, 0644);
MODULE_PARM_DESC(bdl_pos_adj, "BDL position adjustment offset.");
99
module_param_array(probe_mask, int, NULL, 0444);
100
MODULE_PARM_DESC(probe_mask, "Bitmask to probe codecs (default = -1).");
101
module_param_array(probe_only, int, NULL, 0444);
T
Takashi Iwai 已提交
102
MODULE_PARM_DESC(probe_only, "Only probing and no codec initialization.");
103 104
module_param_array(jackpoll_ms, int, NULL, 0444);
MODULE_PARM_DESC(jackpoll_ms, "Ms between polling for jack events (default = 0, using unsol events only)");
105
module_param(single_cmd, bool, 0444);
106 107
MODULE_PARM_DESC(single_cmd, "Use single command to communicate with codecs "
		 "(for debugging only).");
108
module_param(enable_msi, bint, 0444);
109
MODULE_PARM_DESC(enable_msi, "Enable Message Signaled Interrupt (MSI)");
110 111 112 113
#ifdef CONFIG_SND_HDA_PATCH_LOADER
module_param_array(patch, charp, NULL, 0444);
MODULE_PARM_DESC(patch, "Patch file for Intel HD audio interface.");
#endif
114
#ifdef CONFIG_SND_HDA_INPUT_BEEP
T
Takashi Iwai 已提交
115
module_param_array(beep_mode, bool, NULL, 0444);
116
MODULE_PARM_DESC(beep_mode, "Select HDA Beep registration mode "
T
Takashi Iwai 已提交
117
			    "(0=off, 1=on) (default=1).");
118
#endif
119

120
#ifdef CONFIG_PM
121 122 123 124 125 126 127
static int param_set_xint(const char *val, const struct kernel_param *kp);
static struct kernel_param_ops param_ops_xint = {
	.set = param_set_xint,
	.get = param_get_int,
};
#define param_check_xint param_check_int

128
static int power_save = CONFIG_SND_HDA_POWER_SAVE_DEFAULT;
129
module_param(power_save, xint, 0644);
130 131
MODULE_PARM_DESC(power_save, "Automatic power-saving timeout "
		 "(in second, 0 = disable).");
L
Linus Torvalds 已提交
132

133 134 135 136
/* reset the HD-audio controller in power save mode.
 * this may give more power-saving, but will take longer time to
 * wake up.
 */
137
static bool power_save_controller = 1;
138 139
module_param(power_save_controller, bool, 0644);
MODULE_PARM_DESC(power_save_controller, "Reset controller in power save mode.");
140
#endif /* CONFIG_PM */
141

142 143
static int align_buffer_size = -1;
module_param(align_buffer_size, bint, 0644);
144 145 146
MODULE_PARM_DESC(align_buffer_size,
		"Force buffer and period sizes to be multiple of 128 bytes.");

T
Takashi Iwai 已提交
147 148 149 150 151 152 153 154 155 156 157
#ifdef CONFIG_X86
static bool hda_snoop = true;
module_param_named(snoop, hda_snoop, bool, 0444);
MODULE_PARM_DESC(snoop, "Enable/disable snooping");
#define azx_snoop(chip)		(chip)->snoop
#else
#define hda_snoop		true
#define azx_snoop(chip)		true
#endif


L
Linus Torvalds 已提交
158 159 160
MODULE_LICENSE("GPL");
MODULE_SUPPORTED_DEVICE("{{Intel, ICH6},"
			 "{Intel, ICH6M},"
161
			 "{Intel, ICH7},"
162
			 "{Intel, ESB2},"
163
			 "{Intel, ICH8},"
164
			 "{Intel, ICH9},"
165
			 "{Intel, ICH10},"
166
			 "{Intel, PCH},"
167
			 "{Intel, CPT},"
168
			 "{Intel, PPT},"
169
			 "{Intel, LPT},"
170
			 "{Intel, LPT_LP},"
171
			 "{Intel, HPT},"
172
			 "{Intel, PBG},"
173
			 "{Intel, SCH},"
174
			 "{ATI, SB450},"
175
			 "{ATI, SB600},"
176
			 "{ATI, RS600},"
177
			 "{ATI, RS690},"
178 179
			 "{ATI, RS780},"
			 "{ATI, R600},"
180 181
			 "{ATI, RV630},"
			 "{ATI, RV610},"
182 183 184 185
			 "{ATI, RV670},"
			 "{ATI, RV635},"
			 "{ATI, RV620},"
			 "{ATI, RV770},"
186
			 "{VIA, VT8251},"
187
			 "{VIA, VT8237A},"
188 189
			 "{SiS, SIS966},"
			 "{ULI, M5461}}");
L
Linus Torvalds 已提交
190 191
MODULE_DESCRIPTION("Intel HDA driver");

192 193 194
#ifdef CONFIG_SND_VERBOSE_PRINTK
#define SFX	/* nop */
#else
195
#define SFX	"hda-intel "
196
#endif
197

198 199 200 201 202 203 204
#if defined(CONFIG_PM) && defined(CONFIG_VGA_SWITCHEROO)
#ifdef CONFIG_SND_HDA_CODEC_HDMI
#define SUPPORT_VGA_SWITCHEROO
#endif
#endif


L
Linus Torvalds 已提交
205 206 207 208
/*
 * registers
 */
#define ICH6_REG_GCAP			0x00
209 210 211 212 213
#define   ICH6_GCAP_64OK	(1 << 0)   /* 64bit address support */
#define   ICH6_GCAP_NSDO	(3 << 1)   /* # of serial data out signals */
#define   ICH6_GCAP_BSS		(31 << 3)  /* # of bidirectional streams */
#define   ICH6_GCAP_ISS		(15 << 8)  /* # of input streams */
#define   ICH6_GCAP_OSS		(15 << 12) /* # of output streams */
L
Linus Torvalds 已提交
214 215 216 217 218
#define ICH6_REG_VMIN			0x02
#define ICH6_REG_VMAJ			0x03
#define ICH6_REG_OUTPAY			0x04
#define ICH6_REG_INPAY			0x06
#define ICH6_REG_GCTL			0x08
219
#define   ICH6_GCTL_RESET	(1 << 0)   /* controller reset */
220 221
#define   ICH6_GCTL_FCNTRL	(1 << 1)   /* flush control */
#define   ICH6_GCTL_UNSOL	(1 << 8)   /* accept unsol. response enable */
L
Linus Torvalds 已提交
222 223 224
#define ICH6_REG_WAKEEN			0x0c
#define ICH6_REG_STATESTS		0x0e
#define ICH6_REG_GSTS			0x10
225
#define   ICH6_GSTS_FSTS	(1 << 1)   /* flush status */
L
Linus Torvalds 已提交
226 227
#define ICH6_REG_INTCTL			0x20
#define ICH6_REG_INTSTS			0x24
228
#define ICH6_REG_WALLCLK		0x30	/* 24Mhz source */
229 230
#define ICH6_REG_OLD_SSYNC		0x34	/* SSYNC for old ICH */
#define ICH6_REG_SSYNC			0x38
L
Linus Torvalds 已提交
231 232 233
#define ICH6_REG_CORBLBASE		0x40
#define ICH6_REG_CORBUBASE		0x44
#define ICH6_REG_CORBWP			0x48
234 235
#define ICH6_REG_CORBRP			0x4a
#define   ICH6_CORBRP_RST	(1 << 15)  /* read pointer reset */
L
Linus Torvalds 已提交
236
#define ICH6_REG_CORBCTL		0x4c
237 238
#define   ICH6_CORBCTL_RUN	(1 << 1)   /* enable DMA */
#define   ICH6_CORBCTL_CMEIE	(1 << 0)   /* enable memory error irq */
L
Linus Torvalds 已提交
239
#define ICH6_REG_CORBSTS		0x4d
240
#define   ICH6_CORBSTS_CMEI	(1 << 0)   /* memory error indication */
L
Linus Torvalds 已提交
241 242 243 244 245
#define ICH6_REG_CORBSIZE		0x4e

#define ICH6_REG_RIRBLBASE		0x50
#define ICH6_REG_RIRBUBASE		0x54
#define ICH6_REG_RIRBWP			0x58
246
#define   ICH6_RIRBWP_RST	(1 << 15)  /* write pointer reset */
L
Linus Torvalds 已提交
247 248
#define ICH6_REG_RINTCNT		0x5a
#define ICH6_REG_RIRBCTL		0x5c
249 250 251
#define   ICH6_RBCTL_IRQ_EN	(1 << 0)   /* enable IRQ */
#define   ICH6_RBCTL_DMA_EN	(1 << 1)   /* enable DMA */
#define   ICH6_RBCTL_OVERRUN_EN	(1 << 2)   /* enable overrun irq */
L
Linus Torvalds 已提交
252
#define ICH6_REG_RIRBSTS		0x5d
253 254
#define   ICH6_RBSTS_IRQ	(1 << 0)   /* response irq */
#define   ICH6_RBSTS_OVERRUN	(1 << 2)   /* overrun irq */
L
Linus Torvalds 已提交
255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289
#define ICH6_REG_RIRBSIZE		0x5e

#define ICH6_REG_IC			0x60
#define ICH6_REG_IR			0x64
#define ICH6_REG_IRS			0x68
#define   ICH6_IRS_VALID	(1<<1)
#define   ICH6_IRS_BUSY		(1<<0)

#define ICH6_REG_DPLBASE		0x70
#define ICH6_REG_DPUBASE		0x74
#define   ICH6_DPLBASE_ENABLE	0x1	/* Enable position buffer */

/* SD offset: SDI0=0x80, SDI1=0xa0, ... SDO3=0x160 */
enum { SDI0, SDI1, SDI2, SDI3, SDO0, SDO1, SDO2, SDO3 };

/* stream register offsets from stream base */
#define ICH6_REG_SD_CTL			0x00
#define ICH6_REG_SD_STS			0x03
#define ICH6_REG_SD_LPIB		0x04
#define ICH6_REG_SD_CBL			0x08
#define ICH6_REG_SD_LVI			0x0c
#define ICH6_REG_SD_FIFOW		0x0e
#define ICH6_REG_SD_FIFOSIZE		0x10
#define ICH6_REG_SD_FORMAT		0x12
#define ICH6_REG_SD_BDLPL		0x18
#define ICH6_REG_SD_BDLPU		0x1c

/* PCI space */
#define ICH6_PCIREG_TCSEL	0x44

/*
 * other constants
 */

/* max number of SDs */
290 291 292 293 294 295 296 297
/* ICH, ATI and VIA have 4 playback and 4 capture */
#define ICH6_NUM_CAPTURE	4
#define ICH6_NUM_PLAYBACK	4

/* ULI has 6 playback and 5 capture */
#define ULI_NUM_CAPTURE		5
#define ULI_NUM_PLAYBACK	6

298 299 300 301
/* ATI HDMI has 1 playback and 0 capture */
#define ATIHDMI_NUM_CAPTURE	0
#define ATIHDMI_NUM_PLAYBACK	1

302 303 304 305
/* TERA has 4 playback and 3 capture */
#define TERA_NUM_CAPTURE	3
#define TERA_NUM_PLAYBACK	4

306 307 308
/* this number is statically defined for simplicity */
#define MAX_AZX_DEV		16

L
Linus Torvalds 已提交
309
/* max number of fragments - we may use more if allocating more pages for BDL */
T
Takashi Iwai 已提交
310 311 312
#define BDL_SIZE		4096
#define AZX_MAX_BDL_ENTRIES	(BDL_SIZE / 16)
#define AZX_MAX_FRAG		32
L
Linus Torvalds 已提交
313 314 315 316 317 318 319 320
/* max buffer size - no h/w limit, you can increase as you like */
#define AZX_MAX_BUF_SIZE	(1024*1024*1024)

/* RIRB int mask: overrun[2], response[0] */
#define RIRB_INT_RESPONSE	0x01
#define RIRB_INT_OVERRUN	0x04
#define RIRB_INT_MASK		0x05

321
/* STATESTS int mask: S3,SD2,SD1,SD0 */
322 323
#define AZX_MAX_CODECS		8
#define AZX_DEFAULT_CODECS	4
324
#define STATESTS_INT_MASK	((1 << AZX_MAX_CODECS) - 1)
L
Linus Torvalds 已提交
325 326 327 328

/* SD_CTL bits */
#define SD_CTL_STREAM_RESET	0x01	/* stream reset bit */
#define SD_CTL_DMA_START	0x02	/* stream DMA start bit */
329 330 331
#define SD_CTL_STRIPE		(3 << 16)	/* stripe control */
#define SD_CTL_TRAFFIC_PRIO	(1 << 18)	/* traffic priority */
#define SD_CTL_DIR		(1 << 19)	/* bi-directional stream */
L
Linus Torvalds 已提交
332 333 334 335 336 337 338
#define SD_CTL_STREAM_TAG_MASK	(0xf << 20)
#define SD_CTL_STREAM_TAG_SHIFT	20

/* SD_CTL and SD_STS */
#define SD_INT_DESC_ERR		0x10	/* descriptor error interrupt */
#define SD_INT_FIFO_ERR		0x08	/* FIFO error interrupt */
#define SD_INT_COMPLETE		0x04	/* completion interrupt */
339 340
#define SD_INT_MASK		(SD_INT_DESC_ERR|SD_INT_FIFO_ERR|\
				 SD_INT_COMPLETE)
L
Linus Torvalds 已提交
341 342 343 344 345

/* SD_STS */
#define SD_STS_FIFO_READY	0x20	/* FIFO ready */

/* INTCTL and INTSTS */
346 347 348
#define ICH6_INT_ALL_STREAM	0xff	   /* all stream interrupts */
#define ICH6_INT_CTRL_EN	0x40000000 /* controller interrupt enable bit */
#define ICH6_INT_GLOBAL_EN	0x80000000 /* global interrupt enable bit */
L
Linus Torvalds 已提交
349 350 351 352 353

/* below are so far hardcoded - should read registers in future */
#define ICH6_MAX_CORB_ENTRIES	256
#define ICH6_MAX_RIRB_ENTRIES	256

354 355
/* position fix mode */
enum {
356
	POS_FIX_AUTO,
T
Takashi Iwai 已提交
357
	POS_FIX_LPIB,
358
	POS_FIX_POSBUF,
359
	POS_FIX_VIACOMBO,
360
	POS_FIX_COMBO,
361
};
L
Linus Torvalds 已提交
362

363 364 365 366
/* Defines for ATI HD Audio support in SB450 south bridge */
#define ATI_SB450_HDAUDIO_MISC_CNTR2_ADDR   0x42
#define ATI_SB450_HDAUDIO_ENABLE_SNOOP      0x02

V
Vinod G 已提交
367 368 369
/* Defines for Nvidia HDA support */
#define NVIDIA_HDA_TRANSREG_ADDR      0x4e
#define NVIDIA_HDA_ENABLE_COHBITS     0x0f
370 371 372
#define NVIDIA_HDA_ISTRM_COH          0x4d
#define NVIDIA_HDA_OSTRM_COH          0x4c
#define NVIDIA_HDA_ENABLE_COHBIT      0x01
373

T
Takashi Iwai 已提交
374 375 376 377
/* Defines for Intel SCH HDA snoop control */
#define INTEL_SCH_HDA_DEVC      0x78
#define INTEL_SCH_HDA_DEVC_NOSNOOP       (0x1<<11)

378 379 380 381 382
/* Define IN stream 0 FIFO size offset in VIA controller */
#define VIA_IN_STREAM0_FIFO_SIZE_OFFSET	0x90
/* Define VIA HD Audio Device ID*/
#define VIA_HDAC_DEVICE_ID		0x3288

383 384
/* HD Audio class code */
#define PCI_CLASS_MULTIMEDIA_HD_AUDIO	0x0403
T
Takashi Iwai 已提交
385

L
Linus Torvalds 已提交
386 387 388
/*
 */

389
struct azx_dev {
T
Takashi Iwai 已提交
390
	struct snd_dma_buffer bdl; /* BDL buffer */
391
	u32 *posbuf;		/* position buffer pointer */
L
Linus Torvalds 已提交
392

393
	unsigned int bufsize;	/* size of the play buffer in bytes */
394
	unsigned int period_bytes; /* size of the period in bytes */
395 396
	unsigned int frags;	/* number for period in the play buffer */
	unsigned int fifo_size;	/* FIFO size */
397 398
	unsigned long start_wallclk;	/* start + minimum wallclk */
	unsigned long period_wallclk;	/* wallclk for period */
L
Linus Torvalds 已提交
399

400
	void __iomem *sd_addr;	/* stream descriptor pointer */
L
Linus Torvalds 已提交
401

402
	u32 sd_int_sta_mask;	/* stream int status mask */
L
Linus Torvalds 已提交
403 404

	/* pcm support */
405 406 407 408 409 410
	struct snd_pcm_substream *substream;	/* assigned substream,
						 * set in PCM open
						 */
	unsigned int format_val;	/* format value to be set in the
					 * controller and the codec
					 */
L
Linus Torvalds 已提交
411 412
	unsigned char stream_tag;	/* assigned stream */
	unsigned char index;		/* stream index */
413
	int assigned_key;		/* last device# key assigned to */
L
Linus Torvalds 已提交
414

415 416
	unsigned int opened :1;
	unsigned int running :1;
417
	unsigned int irq_pending :1;
418 419 420 421 422 423
	/*
	 * For VIA:
	 *  A flag to ensure DMA position is 0
	 *  when link position is not greater than FIFO size
	 */
	unsigned int insufficient :1;
T
Takashi Iwai 已提交
424
	unsigned int wc_marked:1;
425
	unsigned int no_period_wakeup:1;
426 427 428

	struct timecounter  azx_tc;
	struct cyclecounter azx_cc;
L
Linus Torvalds 已提交
429 430 431
};

/* CORB/RIRB */
432
struct azx_rb {
L
Linus Torvalds 已提交
433 434 435 436 437 438
	u32 *buf;		/* CORB/RIRB buffer
				 * Each CORB entry is 4byte, RIRB is 8byte
				 */
	dma_addr_t addr;	/* physical address of CORB/RIRB buffer */
	/* for RIRB */
	unsigned short rp, wp;	/* read/write pointers */
439 440
	int cmds[AZX_MAX_CODECS];	/* number of pending requests */
	u32 res[AZX_MAX_CODECS];	/* last read value */
L
Linus Torvalds 已提交
441 442
};

443 444 445 446 447 448 449 450
struct azx_pcm {
	struct azx *chip;
	struct snd_pcm *pcm;
	struct hda_codec *codec;
	struct hda_pcm_stream *hinfo[2];
	struct list_head list;
};

451 452
struct azx {
	struct snd_card *card;
L
Linus Torvalds 已提交
453
	struct pci_dev *pci;
454
	int dev_index;
L
Linus Torvalds 已提交
455

456 457
	/* chip type specific */
	int driver_type;
458
	unsigned int driver_caps;
459 460 461 462 463 464
	int playback_streams;
	int playback_index_offset;
	int capture_streams;
	int capture_index_offset;
	int num_streams;

L
Linus Torvalds 已提交
465 466 467 468 469 470 471
	/* pci resources */
	unsigned long addr;
	void __iomem *remap_addr;
	int irq;

	/* locks */
	spinlock_t reg_lock;
472
	struct mutex open_mutex;
473
	struct completion probe_wait;
L
Linus Torvalds 已提交
474

475
	/* streams (x num_streams) */
476
	struct azx_dev *azx_dev;
L
Linus Torvalds 已提交
477 478

	/* PCM */
479
	struct list_head pcm_list; /* azx_pcm list */
L
Linus Torvalds 已提交
480 481 482

	/* HD codec */
	unsigned short codec_mask;
483
	int  codec_probe_mask; /* copied from probe_mask option */
L
Linus Torvalds 已提交
484
	struct hda_bus *bus;
485
	unsigned int beep_mode;
L
Linus Torvalds 已提交
486 487

	/* CORB/RIRB */
488 489
	struct azx_rb corb;
	struct azx_rb rirb;
L
Linus Torvalds 已提交
490

T
Takashi Iwai 已提交
491
	/* CORB/RIRB and position buffers */
L
Linus Torvalds 已提交
492 493
	struct snd_dma_buffer rb;
	struct snd_dma_buffer posbuf;
494

495 496 497 498
#ifdef CONFIG_SND_HDA_PATCH_LOADER
	const struct firmware *fw;
#endif

499
	/* flags */
500
	int position_fix[2]; /* for both playback/capture streams */
501
	int poll_count;
502
	unsigned int running :1;
503 504 505
	unsigned int initialized :1;
	unsigned int single_cmd :1;
	unsigned int polling_mode :1;
506
	unsigned int msi :1;
507
	unsigned int irq_pending_warned :1;
508
	unsigned int probing :1; /* codec probing phase */
T
Takashi Iwai 已提交
509
	unsigned int snoop:1;
510
	unsigned int align_buffer_size:1;
511 512 513 514
	unsigned int region_requested:1;

	/* VGA-switcheroo setup */
	unsigned int use_vga_switcheroo:1;
515
	unsigned int vga_switcheroo_registered:1;
516 517
	unsigned int init_failed:1; /* delayed init failed */
	unsigned int disabled:1; /* disabled by VGA-switcher */
518 519

	/* for debugging */
520
	unsigned int last_cmd[AZX_MAX_CODECS];
521 522 523

	/* for pending irqs */
	struct work_struct irq_pending_work;
T
Takashi Iwai 已提交
524 525 526

	/* reboot notifier (for mysterious hangup problem at power-down) */
	struct notifier_block reboot_notifier;
527 528 529

	/* card list (for power_save trigger) */
	struct list_head list;
L
Linus Torvalds 已提交
530 531
};

532 533 534
#define CREATE_TRACE_POINTS
#include "hda_intel_trace.h"

535 536 537
/* driver types */
enum {
	AZX_DRIVER_ICH,
538
	AZX_DRIVER_PCH,
539
	AZX_DRIVER_SCH,
540
	AZX_DRIVER_ATI,
541
	AZX_DRIVER_ATIHDMI,
542
	AZX_DRIVER_ATIHDMI_NS,
543 544 545
	AZX_DRIVER_VIA,
	AZX_DRIVER_SIS,
	AZX_DRIVER_ULI,
V
Vinod G 已提交
546
	AZX_DRIVER_NVIDIA,
547
	AZX_DRIVER_TERA,
548
	AZX_DRIVER_CTX,
549
	AZX_DRIVER_CTHDA,
550
	AZX_DRIVER_GENERIC,
551
	AZX_NUM_DRIVERS, /* keep this as last entry */
552 553
};

554 555 556 557 558 559 560 561 562 563 564 565 566 567
/* driver quirks (capabilities) */
/* bits 0-7 are used for indicating driver type */
#define AZX_DCAPS_NO_TCSEL	(1 << 8)	/* No Intel TCSEL bit */
#define AZX_DCAPS_NO_MSI	(1 << 9)	/* No MSI support */
#define AZX_DCAPS_ATI_SNOOP	(1 << 10)	/* ATI snoop enable */
#define AZX_DCAPS_NVIDIA_SNOOP	(1 << 11)	/* Nvidia snoop enable */
#define AZX_DCAPS_SCH_SNOOP	(1 << 12)	/* SCH/PCH snoop enable */
#define AZX_DCAPS_RIRB_DELAY	(1 << 13)	/* Long delay in read loop */
#define AZX_DCAPS_RIRB_PRE_DELAY (1 << 14)	/* Put a delay before read */
#define AZX_DCAPS_CTX_WORKAROUND (1 << 15)	/* X-Fi workaround */
#define AZX_DCAPS_POSFIX_LPIB	(1 << 16)	/* Use LPIB as default */
#define AZX_DCAPS_POSFIX_VIA	(1 << 17)	/* Use VIACOMBO as default */
#define AZX_DCAPS_NO_64BIT	(1 << 18)	/* No 64bit address */
#define AZX_DCAPS_SYNC_WRITE	(1 << 19)	/* sync each cmd write */
568
#define AZX_DCAPS_OLD_SSYNC	(1 << 20)	/* Old SSYNC reg for ICH */
569
#define AZX_DCAPS_BUFSIZE	(1 << 21)	/* no buffer size alignment */
570
#define AZX_DCAPS_ALIGN_BUFSIZE	(1 << 22)	/* buffer size alignment */
571
#define AZX_DCAPS_4K_BDLE_BOUNDARY (1 << 23)	/* BDLE in 4k boundary */
572
#define AZX_DCAPS_COUNT_LPIB_DELAY  (1 << 25)	/* Take LPIB as delay */
573 574 575
#define AZX_DCAPS_PM_RUNTIME	(1 << 26)	/* runtime PM support */

/* quirks for Intel PCH */
576
#define AZX_DCAPS_INTEL_PCH_NOPM \
577
	(AZX_DCAPS_SCH_SNOOP | AZX_DCAPS_BUFSIZE | \
578 579 580 581
	 AZX_DCAPS_COUNT_LPIB_DELAY)

#define AZX_DCAPS_INTEL_PCH \
	(AZX_DCAPS_INTEL_PCH_NOPM | AZX_DCAPS_PM_RUNTIME)
582 583 584 585 586 587 588 589 590 591 592 593

/* quirks for ATI SB / AMD Hudson */
#define AZX_DCAPS_PRESET_ATI_SB \
	(AZX_DCAPS_ATI_SNOOP | AZX_DCAPS_NO_TCSEL | \
	 AZX_DCAPS_SYNC_WRITE | AZX_DCAPS_POSFIX_LPIB)

/* quirks for ATI/AMD HDMI */
#define AZX_DCAPS_PRESET_ATI_HDMI \
	(AZX_DCAPS_NO_TCSEL | AZX_DCAPS_SYNC_WRITE | AZX_DCAPS_POSFIX_LPIB)

/* quirks for Nvidia */
#define AZX_DCAPS_PRESET_NVIDIA \
594 595
	(AZX_DCAPS_NVIDIA_SNOOP | AZX_DCAPS_RIRB_DELAY | AZX_DCAPS_NO_MSI |\
	 AZX_DCAPS_ALIGN_BUFSIZE)
596

597 598 599
#define AZX_DCAPS_PRESET_CTHDA \
	(AZX_DCAPS_NO_MSI | AZX_DCAPS_POSFIX_LPIB | AZX_DCAPS_4K_BDLE_BOUNDARY)

600 601 602 603
/*
 * VGA-switcher support
 */
#ifdef SUPPORT_VGA_SWITCHEROO
604 605 606 607 608
#define use_vga_switcheroo(chip)	((chip)->use_vga_switcheroo)
#else
#define use_vga_switcheroo(chip)	0
#endif

609
static char *driver_short_names[] = {
610
	[AZX_DRIVER_ICH] = "HDA Intel",
611
	[AZX_DRIVER_PCH] = "HDA Intel PCH",
612
	[AZX_DRIVER_SCH] = "HDA Intel MID",
613
	[AZX_DRIVER_ATI] = "HDA ATI SB",
614
	[AZX_DRIVER_ATIHDMI] = "HDA ATI HDMI",
615
	[AZX_DRIVER_ATIHDMI_NS] = "HDA ATI HDMI",
616 617
	[AZX_DRIVER_VIA] = "HDA VIA VT82xx",
	[AZX_DRIVER_SIS] = "HDA SIS966",
V
Vinod G 已提交
618 619
	[AZX_DRIVER_ULI] = "HDA ULI M5461",
	[AZX_DRIVER_NVIDIA] = "HDA NVidia",
620
	[AZX_DRIVER_TERA] = "HDA Teradici", 
621
	[AZX_DRIVER_CTX] = "HDA Creative", 
622
	[AZX_DRIVER_CTHDA] = "HDA Creative",
623
	[AZX_DRIVER_GENERIC] = "HD-Audio Generic",
624 625
};

L
Linus Torvalds 已提交
626 627 628 629 630 631 632 633 634 635 636 637 638 639 640 641 642 643 644 645 646 647 648 649 650 651 652 653 654 655
/*
 * macros for easy use
 */
#define azx_writel(chip,reg,value) \
	writel(value, (chip)->remap_addr + ICH6_REG_##reg)
#define azx_readl(chip,reg) \
	readl((chip)->remap_addr + ICH6_REG_##reg)
#define azx_writew(chip,reg,value) \
	writew(value, (chip)->remap_addr + ICH6_REG_##reg)
#define azx_readw(chip,reg) \
	readw((chip)->remap_addr + ICH6_REG_##reg)
#define azx_writeb(chip,reg,value) \
	writeb(value, (chip)->remap_addr + ICH6_REG_##reg)
#define azx_readb(chip,reg) \
	readb((chip)->remap_addr + ICH6_REG_##reg)

#define azx_sd_writel(dev,reg,value) \
	writel(value, (dev)->sd_addr + ICH6_REG_##reg)
#define azx_sd_readl(dev,reg) \
	readl((dev)->sd_addr + ICH6_REG_##reg)
#define azx_sd_writew(dev,reg,value) \
	writew(value, (dev)->sd_addr + ICH6_REG_##reg)
#define azx_sd_readw(dev,reg) \
	readw((dev)->sd_addr + ICH6_REG_##reg)
#define azx_sd_writeb(dev,reg,value) \
	writeb(value, (dev)->sd_addr + ICH6_REG_##reg)
#define azx_sd_readb(dev,reg) \
	readb((dev)->sd_addr + ICH6_REG_##reg)

/* for pcm support */
656
#define get_azx_dev(substream) (substream->runtime->private_data)
L
Linus Torvalds 已提交
657

T
Takashi Iwai 已提交
658 659 660 661 662 663 664 665 666 667 668 669 670 671 672 673 674 675 676 677 678 679 680 681 682 683 684 685 686 687 688 689 690 691 692 693 694 695 696
#ifdef CONFIG_X86
static void __mark_pages_wc(struct azx *chip, void *addr, size_t size, bool on)
{
	if (azx_snoop(chip))
		return;
	if (addr && size) {
		int pages = (size + PAGE_SIZE - 1) >> PAGE_SHIFT;
		if (on)
			set_memory_wc((unsigned long)addr, pages);
		else
			set_memory_wb((unsigned long)addr, pages);
	}
}

static inline void mark_pages_wc(struct azx *chip, struct snd_dma_buffer *buf,
				 bool on)
{
	__mark_pages_wc(chip, buf->area, buf->bytes, on);
}
static inline void mark_runtime_wc(struct azx *chip, struct azx_dev *azx_dev,
				   struct snd_pcm_runtime *runtime, bool on)
{
	if (azx_dev->wc_marked != on) {
		__mark_pages_wc(chip, runtime->dma_area, runtime->dma_bytes, on);
		azx_dev->wc_marked = on;
	}
}
#else
/* NOP for other archs */
static inline void mark_pages_wc(struct azx *chip, struct snd_dma_buffer *buf,
				 bool on)
{
}
static inline void mark_runtime_wc(struct azx *chip, struct azx_dev *azx_dev,
				   struct snd_pcm_runtime *runtime, bool on)
{
}
#endif

697
static int azx_acquire_irq(struct azx *chip, int do_disconnect);
698
static int azx_send_cmd(struct hda_bus *bus, unsigned int val);
L
Linus Torvalds 已提交
699 700 701 702 703 704 705
/*
 * Interface for HD codec
 */

/*
 * CORB / RIRB interface
 */
706
static int azx_alloc_cmd_io(struct azx *chip)
L
Linus Torvalds 已提交
707 708 709 710
{
	int err;

	/* single page (at least 4096 bytes) must suffice for both ringbuffes */
711 712
	err = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV,
				  snd_dma_pci_data(chip->pci),
L
Linus Torvalds 已提交
713 714
				  PAGE_SIZE, &chip->rb);
	if (err < 0) {
715
		snd_printk(KERN_ERR SFX "%s: cannot allocate CORB/RIRB\n", pci_name(chip->pci));
L
Linus Torvalds 已提交
716 717
		return err;
	}
T
Takashi Iwai 已提交
718
	mark_pages_wc(chip, &chip->rb, true);
L
Linus Torvalds 已提交
719 720 721
	return 0;
}

722
static void azx_init_cmd_io(struct azx *chip)
L
Linus Torvalds 已提交
723
{
724
	spin_lock_irq(&chip->reg_lock);
L
Linus Torvalds 已提交
725 726 727 728
	/* CORB set up */
	chip->corb.addr = chip->rb.addr;
	chip->corb.buf = (u32 *)chip->rb.area;
	azx_writel(chip, CORBLBASE, (u32)chip->corb.addr);
T
Takashi Iwai 已提交
729
	azx_writel(chip, CORBUBASE, upper_32_bits(chip->corb.addr));
L
Linus Torvalds 已提交
730

731 732
	/* set the corb size to 256 entries (ULI requires explicitly) */
	azx_writeb(chip, CORBSIZE, 0x02);
L
Linus Torvalds 已提交
733 734 735
	/* set the corb write pointer to 0 */
	azx_writew(chip, CORBWP, 0);
	/* reset the corb hw read pointer */
736
	azx_writew(chip, CORBRP, ICH6_CORBRP_RST);
L
Linus Torvalds 已提交
737
	/* enable corb dma */
738
	azx_writeb(chip, CORBCTL, ICH6_CORBCTL_RUN);
L
Linus Torvalds 已提交
739 740 741 742

	/* RIRB set up */
	chip->rirb.addr = chip->rb.addr + 2048;
	chip->rirb.buf = (u32 *)(chip->rb.area + 2048);
743 744
	chip->rirb.wp = chip->rirb.rp = 0;
	memset(chip->rirb.cmds, 0, sizeof(chip->rirb.cmds));
L
Linus Torvalds 已提交
745
	azx_writel(chip, RIRBLBASE, (u32)chip->rirb.addr);
T
Takashi Iwai 已提交
746
	azx_writel(chip, RIRBUBASE, upper_32_bits(chip->rirb.addr));
L
Linus Torvalds 已提交
747

748 749
	/* set the rirb size to 256 entries (ULI requires explicitly) */
	azx_writeb(chip, RIRBSIZE, 0x02);
L
Linus Torvalds 已提交
750
	/* reset the rirb hw write pointer */
751
	azx_writew(chip, RIRBWP, ICH6_RIRBWP_RST);
L
Linus Torvalds 已提交
752
	/* set N=1, get RIRB response interrupt for new entry */
753
	if (chip->driver_caps & AZX_DCAPS_CTX_WORKAROUND)
754 755 756
		azx_writew(chip, RINTCNT, 0xc0);
	else
		azx_writew(chip, RINTCNT, 1);
L
Linus Torvalds 已提交
757 758
	/* enable rirb dma and response irq */
	azx_writeb(chip, RIRBCTL, ICH6_RBCTL_DMA_EN | ICH6_RBCTL_IRQ_EN);
759
	spin_unlock_irq(&chip->reg_lock);
L
Linus Torvalds 已提交
760 761
}

762
static void azx_free_cmd_io(struct azx *chip)
L
Linus Torvalds 已提交
763
{
764
	spin_lock_irq(&chip->reg_lock);
L
Linus Torvalds 已提交
765 766 767
	/* disable ringbuffer DMAs */
	azx_writeb(chip, RIRBCTL, 0);
	azx_writeb(chip, CORBCTL, 0);
768
	spin_unlock_irq(&chip->reg_lock);
L
Linus Torvalds 已提交
769 770
}

771 772 773 774 775 776 777 778 779 780 781 782 783 784 785 786 787 788 789 790 791 792
static unsigned int azx_command_addr(u32 cmd)
{
	unsigned int addr = cmd >> 28;

	if (addr >= AZX_MAX_CODECS) {
		snd_BUG();
		addr = 0;
	}

	return addr;
}

static unsigned int azx_response_addr(u32 res)
{
	unsigned int addr = res & 0xf;

	if (addr >= AZX_MAX_CODECS) {
		snd_BUG();
		addr = 0;
	}

	return addr;
L
Linus Torvalds 已提交
793 794 795
}

/* send a command */
796
static int azx_corb_send_cmd(struct hda_bus *bus, u32 val)
L
Linus Torvalds 已提交
797
{
798
	struct azx *chip = bus->private_data;
799
	unsigned int addr = azx_command_addr(val);
L
Linus Torvalds 已提交
800 801
	unsigned int wp;

802 803
	spin_lock_irq(&chip->reg_lock);

L
Linus Torvalds 已提交
804
	/* add command to corb */
805 806 807 808 809 810
	wp = azx_readw(chip, CORBWP);
	if (wp == 0xffff) {
		/* something wrong, controller likely turned to D3 */
		spin_unlock_irq(&chip->reg_lock);
		return -1;
	}
L
Linus Torvalds 已提交
811 812 813
	wp++;
	wp %= ICH6_MAX_CORB_ENTRIES;

814
	chip->rirb.cmds[addr]++;
L
Linus Torvalds 已提交
815 816
	chip->corb.buf[wp] = cpu_to_le32(val);
	azx_writel(chip, CORBWP, wp);
817

L
Linus Torvalds 已提交
818 819 820 821 822 823 824 825
	spin_unlock_irq(&chip->reg_lock);

	return 0;
}

#define ICH6_RIRB_EX_UNSOL_EV	(1<<4)

/* retrieve RIRB entry - called from interrupt handler */
826
static void azx_update_rirb(struct azx *chip)
L
Linus Torvalds 已提交
827 828
{
	unsigned int rp, wp;
829
	unsigned int addr;
L
Linus Torvalds 已提交
830 831
	u32 res, res_ex;

832 833 834 835 836 837
	wp = azx_readw(chip, RIRBWP);
	if (wp == 0xffff) {
		/* something wrong, controller likely turned to D3 */
		return;
	}

L
Linus Torvalds 已提交
838 839 840
	if (wp == chip->rirb.wp)
		return;
	chip->rirb.wp = wp;
841

L
Linus Torvalds 已提交
842 843 844 845 846 847 848
	while (chip->rirb.rp != wp) {
		chip->rirb.rp++;
		chip->rirb.rp %= ICH6_MAX_RIRB_ENTRIES;

		rp = chip->rirb.rp << 1; /* an RIRB entry is 8-bytes */
		res_ex = le32_to_cpu(chip->rirb.buf[rp + 1]);
		res = le32_to_cpu(chip->rirb.buf[rp]);
849
		addr = azx_response_addr(res_ex);
L
Linus Torvalds 已提交
850 851
		if (res_ex & ICH6_RIRB_EX_UNSOL_EV)
			snd_hda_queue_unsol_event(chip->bus, res, res_ex);
852 853
		else if (chip->rirb.cmds[addr]) {
			chip->rirb.res[addr] = res;
T
Takashi Iwai 已提交
854
			smp_wmb();
855
			chip->rirb.cmds[addr]--;
856
		} else
857
			snd_printk(KERN_ERR SFX "%s: spurious response %#x:%#x, "
858
				   "last cmd=%#08x\n",
859
				   pci_name(chip->pci),
860 861
				   res, res_ex,
				   chip->last_cmd[addr]);
L
Linus Torvalds 已提交
862 863 864 865
	}
}

/* receive a response */
866 867
static unsigned int azx_rirb_get_response(struct hda_bus *bus,
					  unsigned int addr)
L
Linus Torvalds 已提交
868
{
869
	struct azx *chip = bus->private_data;
870
	unsigned long timeout;
871
	unsigned long loopcounter;
872
	int do_poll = 0;
L
Linus Torvalds 已提交
873

874 875
 again:
	timeout = jiffies + msecs_to_jiffies(1000);
876 877

	for (loopcounter = 0;; loopcounter++) {
878
		if (chip->polling_mode || do_poll) {
879 880 881 882
			spin_lock_irq(&chip->reg_lock);
			azx_update_rirb(chip);
			spin_unlock_irq(&chip->reg_lock);
		}
883
		if (!chip->rirb.cmds[addr]) {
T
Takashi Iwai 已提交
884
			smp_rmb();
885
			bus->rirb_error = 0;
886 887 888

			if (!do_poll)
				chip->poll_count = 0;
889
			return chip->rirb.res[addr]; /* the last value */
T
Takashi Iwai 已提交
890
		}
891 892
		if (time_after(jiffies, timeout))
			break;
893
		if (bus->needs_damn_long_delay || loopcounter > 3000)
894 895 896 897 898
			msleep(2); /* temporary workaround */
		else {
			udelay(10);
			cond_resched();
		}
899
	}
900

901
	if (!chip->polling_mode && chip->poll_count < 2) {
902
		snd_printdd(SFX "%s: azx_get_response timeout, "
903
			   "polling the codec once: last cmd=0x%08x\n",
904
			   pci_name(chip->pci), chip->last_cmd[addr]);
905 906 907 908 909 910
		do_poll = 1;
		chip->poll_count++;
		goto again;
	}


911
	if (!chip->polling_mode) {
912
		snd_printk(KERN_WARNING SFX "%s: azx_get_response timeout, "
913
			   "switching to polling mode: last cmd=0x%08x\n",
914
			   pci_name(chip->pci), chip->last_cmd[addr]);
915 916 917 918
		chip->polling_mode = 1;
		goto again;
	}

919
	if (chip->msi) {
920
		snd_printk(KERN_WARNING SFX "%s: No response from codec, "
921
			   "disabling MSI: last cmd=0x%08x\n",
922
			   pci_name(chip->pci), chip->last_cmd[addr]);
923 924 925 926
		free_irq(chip->irq, chip);
		chip->irq = -1;
		pci_disable_msi(chip->pci);
		chip->msi = 0;
927 928
		if (azx_acquire_irq(chip, 1) < 0) {
			bus->rirb_error = 1;
929
			return -1;
930
		}
931 932 933
		goto again;
	}

934 935 936 937 938 939 940 941
	if (chip->probing) {
		/* If this critical timeout happens during the codec probing
		 * phase, this is likely an access to a non-existing codec
		 * slot.  Better to return an error and reset the system.
		 */
		return -1;
	}

942 943 944
	/* a fatal communication error; need either to reset or to fallback
	 * to the single_cmd mode
	 */
945
	bus->rirb_error = 1;
946
	if (bus->allow_bus_reset && !bus->response_reset && !bus->in_reset) {
947 948 949 950 951 952
		bus->response_reset = 1;
		return -1; /* give a chance to retry */
	}

	snd_printk(KERN_ERR "hda_intel: azx_get_response timeout, "
		   "switching to single_cmd mode: last cmd=0x%08x\n",
953
		   chip->last_cmd[addr]);
954 955
	chip->single_cmd = 1;
	bus->response_reset = 0;
956
	/* release CORB/RIRB */
957
	azx_free_cmd_io(chip);
958 959
	/* disable unsolicited responses */
	azx_writel(chip, GCTL, azx_readl(chip, GCTL) & ~ICH6_GCTL_UNSOL);
960
	return -1;
L
Linus Torvalds 已提交
961 962 963 964 965 966 967 968 969 970 971 972
}

/*
 * Use the single immediate command instead of CORB/RIRB for simplicity
 *
 * Note: according to Intel, this is not preferred use.  The command was
 *       intended for the BIOS only, and may get confused with unsolicited
 *       responses.  So, we shouldn't use it for normal operation from the
 *       driver.
 *       I left the codes, however, for debugging/testing purposes.
 */

973
/* receive a response */
974
static int azx_single_wait_for_response(struct azx *chip, unsigned int addr)
975 976 977 978 979 980 981
{
	int timeout = 50;

	while (timeout--) {
		/* check IRV busy bit */
		if (azx_readw(chip, IRS) & ICH6_IRS_VALID) {
			/* reuse rirb.res as the response return value */
982
			chip->rirb.res[addr] = azx_readl(chip, IR);
983 984 985 986 987
			return 0;
		}
		udelay(1);
	}
	if (printk_ratelimit())
988 989
		snd_printd(SFX "%s: get_response timeout: IRS=0x%x\n",
			   pci_name(chip->pci), azx_readw(chip, IRS));
990
	chip->rirb.res[addr] = -1;
991 992 993
	return -EIO;
}

L
Linus Torvalds 已提交
994
/* send a command */
995
static int azx_single_send_cmd(struct hda_bus *bus, u32 val)
L
Linus Torvalds 已提交
996
{
997
	struct azx *chip = bus->private_data;
998
	unsigned int addr = azx_command_addr(val);
L
Linus Torvalds 已提交
999 1000
	int timeout = 50;

1001
	bus->rirb_error = 0;
L
Linus Torvalds 已提交
1002 1003
	while (timeout--) {
		/* check ICB busy bit */
1004
		if (!((azx_readw(chip, IRS) & ICH6_IRS_BUSY))) {
L
Linus Torvalds 已提交
1005
			/* Clear IRV valid bit */
1006 1007
			azx_writew(chip, IRS, azx_readw(chip, IRS) |
				   ICH6_IRS_VALID);
L
Linus Torvalds 已提交
1008
			azx_writel(chip, IC, val);
1009 1010
			azx_writew(chip, IRS, azx_readw(chip, IRS) |
				   ICH6_IRS_BUSY);
1011
			return azx_single_wait_for_response(chip, addr);
L
Linus Torvalds 已提交
1012 1013 1014
		}
		udelay(1);
	}
1015
	if (printk_ratelimit())
1016 1017
		snd_printd(SFX "%s: send_cmd timeout: IRS=0x%x, val=0x%x\n",
			   pci_name(chip->pci), azx_readw(chip, IRS), val);
L
Linus Torvalds 已提交
1018 1019 1020 1021
	return -EIO;
}

/* receive a response */
1022 1023
static unsigned int azx_single_get_response(struct hda_bus *bus,
					    unsigned int addr)
L
Linus Torvalds 已提交
1024
{
1025
	struct azx *chip = bus->private_data;
1026
	return chip->rirb.res[addr];
L
Linus Torvalds 已提交
1027 1028
}

1029 1030 1031 1032 1033 1034 1035 1036
/*
 * The below are the main callbacks from hda_codec.
 *
 * They are just the skeleton to call sub-callbacks according to the
 * current setting of chip->single_cmd.
 */

/* send a command */
1037
static int azx_send_cmd(struct hda_bus *bus, unsigned int val)
1038
{
1039
	struct azx *chip = bus->private_data;
1040

1041 1042
	if (chip->disabled)
		return 0;
1043
	chip->last_cmd[azx_command_addr(val)] = val;
1044
	if (chip->single_cmd)
1045
		return azx_single_send_cmd(bus, val);
1046
	else
1047
		return azx_corb_send_cmd(bus, val);
1048 1049 1050
}

/* get a response */
1051 1052
static unsigned int azx_get_response(struct hda_bus *bus,
				     unsigned int addr)
1053
{
1054
	struct azx *chip = bus->private_data;
1055 1056
	if (chip->disabled)
		return 0;
1057
	if (chip->single_cmd)
1058
		return azx_single_get_response(bus, addr);
1059
	else
1060
		return azx_rirb_get_response(bus, addr);
1061 1062
}

1063
#ifdef CONFIG_PM
1064
static void azx_power_notify(struct hda_bus *bus, bool power_up);
1065
#endif
1066

L
Linus Torvalds 已提交
1067
/* reset codec link */
1068
static int azx_reset(struct azx *chip, int full_reset)
L
Linus Torvalds 已提交
1069
{
1070
	unsigned long timeout;
L
Linus Torvalds 已提交
1071

1072 1073 1074
	if (!full_reset)
		goto __skip;

1075 1076 1077
	/* clear STATESTS */
	azx_writeb(chip, STATESTS, STATESTS_INT_MASK);

L
Linus Torvalds 已提交
1078 1079 1080
	/* reset controller */
	azx_writel(chip, GCTL, azx_readl(chip, GCTL) & ~ICH6_GCTL_RESET);

1081 1082 1083 1084
	timeout = jiffies + msecs_to_jiffies(100);
	while (azx_readb(chip, GCTL) &&
			time_before(jiffies, timeout))
		usleep_range(500, 1000);
L
Linus Torvalds 已提交
1085 1086 1087 1088

	/* delay for >= 100us for codec PLL to settle per spec
	 * Rev 0.9 section 5.5.1
	 */
1089
	usleep_range(500, 1000);
L
Linus Torvalds 已提交
1090 1091 1092 1093

	/* Bring controller out of reset */
	azx_writeb(chip, GCTL, azx_readb(chip, GCTL) | ICH6_GCTL_RESET);

1094 1095 1096 1097
	timeout = jiffies + msecs_to_jiffies(100);
	while (!azx_readb(chip, GCTL) &&
			time_before(jiffies, timeout))
		usleep_range(500, 1000);
L
Linus Torvalds 已提交
1098

1099
	/* Brent Chartrand said to wait >= 540us for codecs to initialize */
1100
	usleep_range(1000, 1200);
L
Linus Torvalds 已提交
1101

1102
      __skip:
L
Linus Torvalds 已提交
1103
	/* check to see if controller is ready */
1104
	if (!azx_readb(chip, GCTL)) {
1105
		snd_printd(SFX "%s: azx_reset: controller not ready!\n", pci_name(chip->pci));
L
Linus Torvalds 已提交
1106 1107 1108
		return -EBUSY;
	}

M
Matt 已提交
1109
	/* Accept unsolicited responses */
1110 1111 1112
	if (!chip->single_cmd)
		azx_writel(chip, GCTL, azx_readl(chip, GCTL) |
			   ICH6_GCTL_UNSOL);
M
Matt 已提交
1113

L
Linus Torvalds 已提交
1114
	/* detect codecs */
1115
	if (!chip->codec_mask) {
L
Linus Torvalds 已提交
1116
		chip->codec_mask = azx_readw(chip, STATESTS);
1117
		snd_printdd(SFX "%s: codec_mask = 0x%x\n", pci_name(chip->pci), chip->codec_mask);
L
Linus Torvalds 已提交
1118 1119 1120 1121 1122 1123 1124 1125 1126 1127 1128
	}

	return 0;
}


/*
 * Lowlevel interface
 */  

/* enable interrupts */
1129
static void azx_int_enable(struct azx *chip)
L
Linus Torvalds 已提交
1130 1131 1132 1133 1134 1135 1136
{
	/* enable controller CIE and GIE */
	azx_writel(chip, INTCTL, azx_readl(chip, INTCTL) |
		   ICH6_INT_CTRL_EN | ICH6_INT_GLOBAL_EN);
}

/* disable interrupts */
1137
static void azx_int_disable(struct azx *chip)
L
Linus Torvalds 已提交
1138 1139 1140 1141
{
	int i;

	/* disable interrupts in stream descriptor */
1142
	for (i = 0; i < chip->num_streams; i++) {
1143
		struct azx_dev *azx_dev = &chip->azx_dev[i];
L
Linus Torvalds 已提交
1144 1145 1146 1147 1148 1149 1150 1151 1152 1153 1154 1155 1156
		azx_sd_writeb(azx_dev, SD_CTL,
			      azx_sd_readb(azx_dev, SD_CTL) & ~SD_INT_MASK);
	}

	/* disable SIE for all streams */
	azx_writeb(chip, INTCTL, 0);

	/* disable controller CIE and GIE */
	azx_writel(chip, INTCTL, azx_readl(chip, INTCTL) &
		   ~(ICH6_INT_CTRL_EN | ICH6_INT_GLOBAL_EN));
}

/* clear interrupts */
1157
static void azx_int_clear(struct azx *chip)
L
Linus Torvalds 已提交
1158 1159 1160 1161
{
	int i;

	/* clear stream status */
1162
	for (i = 0; i < chip->num_streams; i++) {
1163
		struct azx_dev *azx_dev = &chip->azx_dev[i];
L
Linus Torvalds 已提交
1164 1165 1166 1167 1168 1169 1170 1171 1172 1173 1174 1175 1176 1177
		azx_sd_writeb(azx_dev, SD_STS, SD_INT_MASK);
	}

	/* clear STATESTS */
	azx_writeb(chip, STATESTS, STATESTS_INT_MASK);

	/* clear rirb status */
	azx_writeb(chip, RIRBSTS, RIRB_INT_MASK);

	/* clear int status */
	azx_writel(chip, INTSTS, ICH6_INT_CTRL_EN | ICH6_INT_ALL_STREAM);
}

/* start a stream */
1178
static void azx_stream_start(struct azx *chip, struct azx_dev *azx_dev)
L
Linus Torvalds 已提交
1179
{
1180 1181 1182 1183 1184
	/*
	 * Before stream start, initialize parameter
	 */
	azx_dev->insufficient = 1;

L
Linus Torvalds 已提交
1185
	/* enable SIE */
1186 1187
	azx_writel(chip, INTCTL,
		   azx_readl(chip, INTCTL) | (1 << azx_dev->index));
L
Linus Torvalds 已提交
1188 1189 1190 1191 1192
	/* set DMA start and interrupt mask */
	azx_sd_writeb(azx_dev, SD_CTL, azx_sd_readb(azx_dev, SD_CTL) |
		      SD_CTL_DMA_START | SD_INT_MASK);
}

1193 1194
/* stop DMA */
static void azx_stream_clear(struct azx *chip, struct azx_dev *azx_dev)
L
Linus Torvalds 已提交
1195 1196 1197 1198
{
	azx_sd_writeb(azx_dev, SD_CTL, azx_sd_readb(azx_dev, SD_CTL) &
		      ~(SD_CTL_DMA_START | SD_INT_MASK));
	azx_sd_writeb(azx_dev, SD_STS, SD_INT_MASK); /* to be sure */
1199 1200 1201 1202 1203 1204
}

/* stop a stream */
static void azx_stream_stop(struct azx *chip, struct azx_dev *azx_dev)
{
	azx_stream_clear(chip, azx_dev);
L
Linus Torvalds 已提交
1205
	/* disable SIE */
1206 1207
	azx_writel(chip, INTCTL,
		   azx_readl(chip, INTCTL) & ~(1 << azx_dev->index));
L
Linus Torvalds 已提交
1208 1209 1210 1211
}


/*
1212
 * reset and start the controller registers
L
Linus Torvalds 已提交
1213
 */
1214
static void azx_init_chip(struct azx *chip, int full_reset)
L
Linus Torvalds 已提交
1215
{
1216 1217
	if (chip->initialized)
		return;
L
Linus Torvalds 已提交
1218 1219

	/* reset controller */
1220
	azx_reset(chip, full_reset);
L
Linus Torvalds 已提交
1221 1222 1223 1224 1225 1226

	/* initialize interrupts */
	azx_int_clear(chip);
	azx_int_enable(chip);

	/* initialize the codec command I/O */
1227 1228
	if (!chip->single_cmd)
		azx_init_cmd_io(chip);
L
Linus Torvalds 已提交
1229

1230 1231
	/* program the position buffer */
	azx_writel(chip, DPLBASE, (u32)chip->posbuf.addr);
T
Takashi Iwai 已提交
1232
	azx_writel(chip, DPUBASE, upper_32_bits(chip->posbuf.addr));
1233

1234 1235 1236 1237 1238 1239 1240 1241 1242 1243 1244 1245 1246 1247 1248 1249 1250 1251 1252 1253 1254 1255 1256
	chip->initialized = 1;
}

/*
 * initialize the PCI registers
 */
/* update bits in a PCI register byte */
static void update_pci_byte(struct pci_dev *pci, unsigned int reg,
			    unsigned char mask, unsigned char val)
{
	unsigned char data;

	pci_read_config_byte(pci, reg, &data);
	data &= ~mask;
	data |= (val & mask);
	pci_write_config_byte(pci, reg, data);
}

static void azx_init_pci(struct azx *chip)
{
	/* Clear bits 0-2 of PCI register TCSEL (at offset 0x44)
	 * TCSEL == Traffic Class Select Register, which sets PCI express QOS
	 * Ensuring these bits are 0 clears playback static on some HD Audio
1257 1258
	 * codecs.
	 * The PCI register TCSEL is defined in the Intel manuals.
1259
	 */
1260
	if (!(chip->driver_caps & AZX_DCAPS_NO_TCSEL)) {
1261
		snd_printdd(SFX "%s: Clearing TCSEL\n", pci_name(chip->pci));
1262
		update_pci_byte(chip->pci, ICH6_PCIREG_TCSEL, 0x07, 0);
1263
	}
1264

1265 1266 1267 1268
	/* For ATI SB450/600/700/800/900 and AMD Hudson azalia HD audio,
	 * we need to enable snoop.
	 */
	if (chip->driver_caps & AZX_DCAPS_ATI_SNOOP) {
1269
		snd_printdd(SFX "%s: Setting ATI snoop: %d\n", pci_name(chip->pci), azx_snoop(chip));
1270
		update_pci_byte(chip->pci,
T
Takashi Iwai 已提交
1271 1272
				ATI_SB450_HDAUDIO_MISC_CNTR2_ADDR, 0x07,
				azx_snoop(chip) ? ATI_SB450_HDAUDIO_ENABLE_SNOOP : 0);
1273 1274 1275 1276
	}

	/* For NVIDIA HDA, enable snoop */
	if (chip->driver_caps & AZX_DCAPS_NVIDIA_SNOOP) {
1277
		snd_printdd(SFX "%s: Setting Nvidia snoop: %d\n", pci_name(chip->pci), azx_snoop(chip));
1278 1279 1280
		update_pci_byte(chip->pci,
				NVIDIA_HDA_TRANSREG_ADDR,
				0x0f, NVIDIA_HDA_ENABLE_COHBITS);
1281 1282 1283 1284 1285 1286
		update_pci_byte(chip->pci,
				NVIDIA_HDA_ISTRM_COH,
				0x01, NVIDIA_HDA_ENABLE_COHBIT);
		update_pci_byte(chip->pci,
				NVIDIA_HDA_OSTRM_COH,
				0x01, NVIDIA_HDA_ENABLE_COHBIT);
1287 1288 1289 1290
	}

	/* Enable SCH/PCH snoop if needed */
	if (chip->driver_caps & AZX_DCAPS_SCH_SNOOP) {
T
Takashi Iwai 已提交
1291
		unsigned short snoop;
T
Takashi Iwai 已提交
1292
		pci_read_config_word(chip->pci, INTEL_SCH_HDA_DEVC, &snoop);
T
Takashi Iwai 已提交
1293 1294 1295 1296 1297 1298
		if ((!azx_snoop(chip) && !(snoop & INTEL_SCH_HDA_DEVC_NOSNOOP)) ||
		    (azx_snoop(chip) && (snoop & INTEL_SCH_HDA_DEVC_NOSNOOP))) {
			snoop &= ~INTEL_SCH_HDA_DEVC_NOSNOOP;
			if (!azx_snoop(chip))
				snoop |= INTEL_SCH_HDA_DEVC_NOSNOOP;
			pci_write_config_word(chip->pci, INTEL_SCH_HDA_DEVC, snoop);
T
Takashi Iwai 已提交
1299 1300 1301
			pci_read_config_word(chip->pci,
				INTEL_SCH_HDA_DEVC, &snoop);
		}
1302 1303
		snd_printdd(SFX "%s: SCH snoop: %s\n",
				pci_name(chip->pci), (snoop & INTEL_SCH_HDA_DEVC_NOSNOOP)
T
Takashi Iwai 已提交
1304
				? "Disabled" : "Enabled");
V
Vinod G 已提交
1305
        }
L
Linus Torvalds 已提交
1306 1307 1308
}


1309 1310
static int azx_position_ok(struct azx *chip, struct azx_dev *azx_dev);

L
Linus Torvalds 已提交
1311 1312 1313
/*
 * interrupt handler
 */
1314
static irqreturn_t azx_interrupt(int irq, void *dev_id)
L
Linus Torvalds 已提交
1315
{
1316 1317
	struct azx *chip = dev_id;
	struct azx_dev *azx_dev;
L
Linus Torvalds 已提交
1318
	u32 status;
1319
	u8 sd_status;
1320
	int i, ok;
L
Linus Torvalds 已提交
1321

1322 1323 1324 1325 1326
#ifdef CONFIG_PM_RUNTIME
	if (chip->pci->dev.power.runtime_status != RPM_ACTIVE)
		return IRQ_NONE;
#endif

L
Linus Torvalds 已提交
1327 1328
	spin_lock(&chip->reg_lock);

1329 1330
	if (chip->disabled) {
		spin_unlock(&chip->reg_lock);
1331
		return IRQ_NONE;
1332
	}
1333

L
Linus Torvalds 已提交
1334 1335 1336 1337 1338 1339
	status = azx_readl(chip, INTSTS);
	if (status == 0) {
		spin_unlock(&chip->reg_lock);
		return IRQ_NONE;
	}
	
1340
	for (i = 0; i < chip->num_streams; i++) {
L
Linus Torvalds 已提交
1341 1342
		azx_dev = &chip->azx_dev[i];
		if (status & azx_dev->sd_int_sta_mask) {
1343
			sd_status = azx_sd_readb(azx_dev, SD_STS);
L
Linus Torvalds 已提交
1344
			azx_sd_writeb(azx_dev, SD_STS, SD_INT_MASK);
1345 1346
			if (!azx_dev->substream || !azx_dev->running ||
			    !(sd_status & SD_INT_COMPLETE))
1347 1348
				continue;
			/* check whether this IRQ is really acceptable */
1349 1350
			ok = azx_position_ok(chip, azx_dev);
			if (ok == 1) {
1351
				azx_dev->irq_pending = 0;
L
Linus Torvalds 已提交
1352 1353 1354
				spin_unlock(&chip->reg_lock);
				snd_pcm_period_elapsed(azx_dev->substream);
				spin_lock(&chip->reg_lock);
1355
			} else if (ok == 0 && chip->bus && chip->bus->workq) {
1356 1357
				/* bogus IRQ, process it later */
				azx_dev->irq_pending = 1;
T
Takashi Iwai 已提交
1358 1359
				queue_work(chip->bus->workq,
					   &chip->irq_pending_work);
L
Linus Torvalds 已提交
1360 1361 1362 1363 1364 1365 1366
			}
		}
	}

	/* clear rirb int */
	status = azx_readb(chip, RIRBSTS);
	if (status & RIRB_INT_MASK) {
1367
		if (status & RIRB_INT_RESPONSE) {
1368
			if (chip->driver_caps & AZX_DCAPS_RIRB_PRE_DELAY)
1369
				udelay(80);
L
Linus Torvalds 已提交
1370
			azx_update_rirb(chip);
1371
		}
L
Linus Torvalds 已提交
1372 1373 1374 1375 1376 1377 1378 1379 1380 1381 1382 1383 1384 1385
		azx_writeb(chip, RIRBSTS, RIRB_INT_MASK);
	}

#if 0
	/* clear state status int */
	if (azx_readb(chip, STATESTS) & 0x04)
		azx_writeb(chip, STATESTS, 0x04);
#endif
	spin_unlock(&chip->reg_lock);
	
	return IRQ_HANDLED;
}


1386 1387 1388
/*
 * set up a BDL entry
 */
1389 1390
static int setup_bdle(struct azx *chip,
		      struct snd_pcm_substream *substream,
1391 1392 1393 1394 1395 1396 1397 1398 1399 1400 1401 1402
		      struct azx_dev *azx_dev, u32 **bdlp,
		      int ofs, int size, int with_ioc)
{
	u32 *bdl = *bdlp;

	while (size > 0) {
		dma_addr_t addr;
		int chunk;

		if (azx_dev->frags >= AZX_MAX_BDL_ENTRIES)
			return -EINVAL;

1403
		addr = snd_pcm_sgbuf_get_addr(substream, ofs);
1404 1405
		/* program the address field of the BDL entry */
		bdl[0] = cpu_to_le32((u32)addr);
T
Takashi Iwai 已提交
1406
		bdl[1] = cpu_to_le32(upper_32_bits(addr));
1407
		/* program the size field of the BDL entry */
T
Takashi Iwai 已提交
1408
		chunk = snd_pcm_sgbuf_get_chunk_size(substream, ofs, size);
1409 1410 1411 1412 1413 1414
		/* one BDLE cannot cross 4K boundary on CTHDA chips */
		if (chip->driver_caps & AZX_DCAPS_4K_BDLE_BOUNDARY) {
			u32 remain = 0x1000 - (ofs & 0xfff);
			if (chunk > remain)
				chunk = remain;
		}
1415 1416 1417 1418 1419 1420 1421 1422 1423 1424 1425 1426 1427 1428
		bdl[2] = cpu_to_le32(chunk);
		/* program the IOC to enable interrupt
		 * only when the whole fragment is processed
		 */
		size -= chunk;
		bdl[3] = (size || !with_ioc) ? 0 : cpu_to_le32(0x01);
		bdl += 4;
		azx_dev->frags++;
		ofs += chunk;
	}
	*bdlp = bdl;
	return ofs;
}

L
Linus Torvalds 已提交
1429 1430 1431
/*
 * set up BDL entries
 */
1432 1433
static int azx_setup_periods(struct azx *chip,
			     struct snd_pcm_substream *substream,
T
Takashi Iwai 已提交
1434
			     struct azx_dev *azx_dev)
L
Linus Torvalds 已提交
1435
{
T
Takashi Iwai 已提交
1436 1437
	u32 *bdl;
	int i, ofs, periods, period_bytes;
1438
	int pos_adj;
L
Linus Torvalds 已提交
1439 1440 1441 1442 1443

	/* reset BDL address */
	azx_sd_writel(azx_dev, SD_BDLPL, 0);
	azx_sd_writel(azx_dev, SD_BDLPU, 0);

1444
	period_bytes = azx_dev->period_bytes;
T
Takashi Iwai 已提交
1445 1446
	periods = azx_dev->bufsize / period_bytes;

L
Linus Torvalds 已提交
1447
	/* program the initial BDL entries */
T
Takashi Iwai 已提交
1448 1449 1450
	bdl = (u32 *)azx_dev->bdl.area;
	ofs = 0;
	azx_dev->frags = 0;
1451
	pos_adj = bdl_pos_adj[chip->dev_index];
1452
	if (!azx_dev->no_period_wakeup && pos_adj > 0) {
1453
		struct snd_pcm_runtime *runtime = substream->runtime;
1454
		int pos_align = pos_adj;
1455
		pos_adj = (pos_adj * runtime->rate + 47999) / 48000;
1456
		if (!pos_adj)
1457 1458 1459 1460
			pos_adj = pos_align;
		else
			pos_adj = ((pos_adj + pos_align - 1) / pos_align) *
				pos_align;
1461 1462
		pos_adj = frames_to_bytes(runtime, pos_adj);
		if (pos_adj >= period_bytes) {
1463 1464
			snd_printk(KERN_WARNING SFX "%s: Too big adjustment %d\n",
				   pci_name(chip->pci), bdl_pos_adj[chip->dev_index]);
1465 1466
			pos_adj = 0;
		} else {
1467
			ofs = setup_bdle(chip, substream, azx_dev,
1468
					 &bdl, ofs, pos_adj, true);
1469 1470
			if (ofs < 0)
				goto error;
T
Takashi Iwai 已提交
1471
		}
1472 1473
	} else
		pos_adj = 0;
1474 1475
	for (i = 0; i < periods; i++) {
		if (i == periods - 1 && pos_adj)
1476
			ofs = setup_bdle(chip, substream, azx_dev, &bdl, ofs,
1477 1478
					 period_bytes - pos_adj, 0);
		else
1479
			ofs = setup_bdle(chip, substream, azx_dev, &bdl, ofs,
1480
					 period_bytes,
1481
					 !azx_dev->no_period_wakeup);
1482 1483
		if (ofs < 0)
			goto error;
L
Linus Torvalds 已提交
1484
	}
T
Takashi Iwai 已提交
1485
	return 0;
1486 1487

 error:
1488 1489
	snd_printk(KERN_ERR SFX "%s: Too many BDL entries: buffer=%d, period=%d\n",
		   pci_name(chip->pci), azx_dev->bufsize, period_bytes);
1490
	return -EINVAL;
L
Linus Torvalds 已提交
1491 1492
}

1493 1494
/* reset stream */
static void azx_stream_reset(struct azx *chip, struct azx_dev *azx_dev)
L
Linus Torvalds 已提交
1495 1496 1497 1498
{
	unsigned char val;
	int timeout;

1499 1500
	azx_stream_clear(chip, azx_dev);

1501 1502
	azx_sd_writeb(azx_dev, SD_CTL, azx_sd_readb(azx_dev, SD_CTL) |
		      SD_CTL_STREAM_RESET);
L
Linus Torvalds 已提交
1503 1504 1505 1506 1507 1508 1509 1510 1511 1512 1513 1514 1515 1516
	udelay(3);
	timeout = 300;
	while (!((val = azx_sd_readb(azx_dev, SD_CTL)) & SD_CTL_STREAM_RESET) &&
	       --timeout)
		;
	val &= ~SD_CTL_STREAM_RESET;
	azx_sd_writeb(azx_dev, SD_CTL, val);
	udelay(3);

	timeout = 300;
	/* waiting for hardware to report that the stream is out of reset */
	while (((val = azx_sd_readb(azx_dev, SD_CTL)) & SD_CTL_STREAM_RESET) &&
	       --timeout)
		;
1517 1518 1519

	/* reset first position - may not be synced with hw at this time */
	*azx_dev->posbuf = 0;
1520
}
L
Linus Torvalds 已提交
1521

1522 1523 1524 1525 1526
/*
 * set up the SD for streaming
 */
static int azx_setup_controller(struct azx *chip, struct azx_dev *azx_dev)
{
T
Takashi Iwai 已提交
1527
	unsigned int val;
1528 1529
	/* make sure the run bit is zero for SD */
	azx_stream_clear(chip, azx_dev);
L
Linus Torvalds 已提交
1530
	/* program the stream_tag */
T
Takashi Iwai 已提交
1531 1532 1533 1534 1535 1536
	val = azx_sd_readl(azx_dev, SD_CTL);
	val = (val & ~SD_CTL_STREAM_TAG_MASK) |
		(azx_dev->stream_tag << SD_CTL_STREAM_TAG_SHIFT);
	if (!azx_snoop(chip))
		val |= SD_CTL_TRAFFIC_PRIO;
	azx_sd_writel(azx_dev, SD_CTL, val);
L
Linus Torvalds 已提交
1537 1538 1539 1540 1541 1542 1543 1544 1545 1546 1547 1548 1549

	/* program the length of samples in cyclic buffer */
	azx_sd_writel(azx_dev, SD_CBL, azx_dev->bufsize);

	/* program the stream format */
	/* this value needs to be the same as the one programmed */
	azx_sd_writew(azx_dev, SD_FORMAT, azx_dev->format_val);

	/* program the stream LVI (last valid index) of the BDL */
	azx_sd_writew(azx_dev, SD_LVI, azx_dev->frags - 1);

	/* program the BDL address */
	/* lower BDL address */
T
Takashi Iwai 已提交
1550
	azx_sd_writel(azx_dev, SD_BDLPL, (u32)azx_dev->bdl.addr);
L
Linus Torvalds 已提交
1551
	/* upper BDL address */
T
Takashi Iwai 已提交
1552
	azx_sd_writel(azx_dev, SD_BDLPU, upper_32_bits(azx_dev->bdl.addr));
L
Linus Torvalds 已提交
1553

1554
	/* enable the position buffer */
1555 1556
	if (chip->position_fix[0] != POS_FIX_LPIB ||
	    chip->position_fix[1] != POS_FIX_LPIB) {
1557 1558 1559 1560
		if (!(azx_readl(chip, DPLBASE) & ICH6_DPLBASE_ENABLE))
			azx_writel(chip, DPLBASE,
				(u32)chip->posbuf.addr | ICH6_DPLBASE_ENABLE);
	}
1561

L
Linus Torvalds 已提交
1562
	/* set the interrupt enable bits in the descriptor control register */
1563 1564
	azx_sd_writel(azx_dev, SD_CTL,
		      azx_sd_readl(azx_dev, SD_CTL) | SD_INT_MASK);
L
Linus Torvalds 已提交
1565 1566 1567 1568

	return 0;
}

1569 1570 1571 1572 1573 1574 1575 1576 1577
/*
 * Probe the given codec address
 */
static int probe_codec(struct azx *chip, int addr)
{
	unsigned int cmd = (addr << 28) | (AC_NODE_ROOT << 20) |
		(AC_VERB_PARAMETERS << 8) | AC_PAR_VENDOR_ID;
	unsigned int res;

1578
	mutex_lock(&chip->bus->cmd_mutex);
1579 1580
	chip->probing = 1;
	azx_send_cmd(chip->bus, cmd);
1581
	res = azx_get_response(chip->bus, addr);
1582
	chip->probing = 0;
1583
	mutex_unlock(&chip->bus->cmd_mutex);
1584 1585
	if (res == -1)
		return -EIO;
1586
	snd_printdd(SFX "%s: codec #%d probed OK\n", pci_name(chip->pci), addr);
1587 1588 1589
	return 0;
}

1590 1591
static int azx_attach_pcm_stream(struct hda_bus *bus, struct hda_codec *codec,
				 struct hda_pcm *cpcm);
1592
static void azx_stop_chip(struct azx *chip);
L
Linus Torvalds 已提交
1593

1594 1595 1596 1597 1598 1599
static void azx_bus_reset(struct hda_bus *bus)
{
	struct azx *chip = bus->private_data;

	bus->in_reset = 1;
	azx_stop_chip(chip);
1600
	azx_init_chip(chip, 1);
1601
#ifdef CONFIG_PM
1602
	if (chip->initialized) {
1603 1604 1605
		struct azx_pcm *p;
		list_for_each_entry(p, &chip->pcm_list, list)
			snd_pcm_suspend_all(p->pcm);
1606 1607 1608
		snd_hda_suspend(chip->bus);
		snd_hda_resume(chip->bus);
	}
1609
#endif
1610 1611 1612
	bus->in_reset = 0;
}

1613 1614 1615 1616 1617 1618 1619 1620 1621 1622 1623 1624 1625 1626 1627 1628
static int get_jackpoll_interval(struct azx *chip)
{
	int i = jackpoll_ms[chip->dev_index];
	unsigned int j;
	if (i == 0)
		return 0;
	if (i < 50 || i > 60000)
		j = 0;
	else
		j = msecs_to_jiffies(i);
	if (j == 0)
		snd_printk(KERN_WARNING SFX
			   "jackpoll_ms value out of range: %d\n", i);
	return j;
}

L
Linus Torvalds 已提交
1629 1630 1631 1632
/*
 * Codec initialization
 */

1633
/* number of codec slots for each chipset: 0 = default slots (i.e. 4) */
1634
static unsigned int azx_max_codecs[AZX_NUM_DRIVERS] = {
1635
	[AZX_DRIVER_NVIDIA] = 8,
1636
	[AZX_DRIVER_TERA] = 1,
1637 1638
};

1639
static int azx_codec_create(struct azx *chip, const char *model)
L
Linus Torvalds 已提交
1640 1641
{
	struct hda_bus_template bus_temp;
1642 1643
	int c, codecs, err;
	int max_slots;
L
Linus Torvalds 已提交
1644 1645 1646 1647 1648

	memset(&bus_temp, 0, sizeof(bus_temp));
	bus_temp.private_data = chip;
	bus_temp.modelname = model;
	bus_temp.pci = chip->pci;
1649 1650
	bus_temp.ops.command = azx_send_cmd;
	bus_temp.ops.get_response = azx_get_response;
1651
	bus_temp.ops.attach_pcm = azx_attach_pcm_stream;
1652
	bus_temp.ops.bus_reset = azx_bus_reset;
1653
#ifdef CONFIG_PM
1654
	bus_temp.power_save = &power_save;
1655 1656
	bus_temp.ops.pm_notify = azx_power_notify;
#endif
L
Linus Torvalds 已提交
1657

1658 1659
	err = snd_hda_bus_new(chip->card, &bus_temp, &chip->bus);
	if (err < 0)
L
Linus Torvalds 已提交
1660 1661
		return err;

1662
	if (chip->driver_caps & AZX_DCAPS_RIRB_DELAY) {
1663
		snd_printd(SFX "%s: Enable delay in RIRB handling\n", pci_name(chip->pci));
1664
		chip->bus->needs_damn_long_delay = 1;
1665
	}
1666

1667
	codecs = 0;
1668 1669
	max_slots = azx_max_codecs[chip->driver_type];
	if (!max_slots)
1670
		max_slots = AZX_DEFAULT_CODECS;
1671 1672 1673

	/* First try to probe all given codec slots */
	for (c = 0; c < max_slots; c++) {
1674
		if ((chip->codec_mask & (1 << c)) & chip->codec_probe_mask) {
1675 1676 1677 1678
			if (probe_codec(chip, c) < 0) {
				/* Some BIOSen give you wrong codec addresses
				 * that don't exist
				 */
1679
				snd_printk(KERN_WARNING SFX
1680 1681
					   "%s: Codec #%d probe error; "
					   "disabling it...\n", pci_name(chip->pci), c);
1682 1683 1684
				chip->codec_mask &= ~(1 << c);
				/* More badly, accessing to a non-existing
				 * codec often screws up the controller chip,
P
Paul Menzel 已提交
1685
				 * and disturbs the further communications.
1686 1687 1688 1689 1690
				 * Thus if an error occurs during probing,
				 * better to reset the controller chip to
				 * get back to the sanity state.
				 */
				azx_stop_chip(chip);
1691
				azx_init_chip(chip, 1);
1692 1693 1694 1695
			}
		}
	}

1696 1697 1698 1699
	/* AMD chipsets often cause the communication stalls upon certain
	 * sequence like the pin-detection.  It seems that forcing the synced
	 * access works around the stall.  Grrr...
	 */
1700
	if (chip->driver_caps & AZX_DCAPS_SYNC_WRITE) {
1701 1702
		snd_printd(SFX "%s: Enable sync_write for stable communication\n",
			pci_name(chip->pci));
1703 1704 1705 1706
		chip->bus->sync_write = 1;
		chip->bus->allow_bus_reset = 1;
	}

1707
	/* Then create codec instances */
1708
	for (c = 0; c < max_slots; c++) {
1709
		if ((chip->codec_mask & (1 << c)) & chip->codec_probe_mask) {
1710
			struct hda_codec *codec;
1711
			err = snd_hda_codec_new(chip->bus, c, &codec);
L
Linus Torvalds 已提交
1712 1713
			if (err < 0)
				continue;
1714
			codec->jackpoll_interval = get_jackpoll_interval(chip);
1715
			codec->beep_mode = chip->beep_mode;
L
Linus Torvalds 已提交
1716
			codecs++;
1717 1718 1719
		}
	}
	if (!codecs) {
1720
		snd_printk(KERN_ERR SFX "%s: no codecs initialized\n", pci_name(chip->pci));
L
Linus Torvalds 已提交
1721 1722
		return -ENXIO;
	}
1723 1724
	return 0;
}
L
Linus Torvalds 已提交
1725

1726
/* configure each codec instance */
1727
static int azx_codec_configure(struct azx *chip)
1728 1729 1730 1731 1732
{
	struct hda_codec *codec;
	list_for_each_entry(codec, &chip->bus->codec_list, list) {
		snd_hda_codec_configure(codec);
	}
L
Linus Torvalds 已提交
1733 1734 1735 1736 1737 1738 1739 1740 1741
	return 0;
}


/*
 * PCM support
 */

/* assign a stream for the PCM */
1742 1743
static inline struct azx_dev *
azx_assign_device(struct azx *chip, struct snd_pcm_substream *substream)
L
Linus Torvalds 已提交
1744
{
1745
	int dev, i, nums;
1746
	struct azx_dev *res = NULL;
1747 1748 1749
	/* make a non-zero unique key for the substream */
	int key = (substream->pcm->device << 16) | (substream->number << 2) |
		(substream->stream + 1);
1750 1751

	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
1752 1753 1754 1755 1756 1757 1758
		dev = chip->playback_index_offset;
		nums = chip->playback_streams;
	} else {
		dev = chip->capture_index_offset;
		nums = chip->capture_streams;
	}
	for (i = 0; i < nums; i++, dev++)
1759
		if (!chip->azx_dev[dev].opened) {
1760
			res = &chip->azx_dev[dev];
1761
			if (res->assigned_key == key)
1762
				break;
L
Linus Torvalds 已提交
1763
		}
1764 1765
	if (res) {
		res->opened = 1;
1766
		res->assigned_key = key;
1767 1768
	}
	return res;
L
Linus Torvalds 已提交
1769 1770 1771
}

/* release the assigned stream */
1772
static inline void azx_release_device(struct azx_dev *azx_dev)
L
Linus Torvalds 已提交
1773 1774 1775 1776
{
	azx_dev->opened = 0;
}

1777 1778 1779 1780 1781 1782 1783 1784 1785 1786 1787 1788 1789 1790 1791 1792 1793 1794 1795 1796 1797 1798 1799 1800 1801 1802 1803 1804 1805 1806 1807 1808 1809 1810 1811 1812 1813 1814 1815 1816 1817 1818 1819 1820 1821 1822 1823 1824 1825 1826 1827 1828 1829 1830 1831 1832 1833 1834
static cycle_t azx_cc_read(const struct cyclecounter *cc)
{
	struct azx_dev *azx_dev = container_of(cc, struct azx_dev, azx_cc);
	struct snd_pcm_substream *substream = azx_dev->substream;
	struct azx_pcm *apcm = snd_pcm_substream_chip(substream);
	struct azx *chip = apcm->chip;

	return azx_readl(chip, WALLCLK);
}

static void azx_timecounter_init(struct snd_pcm_substream *substream,
				bool force, cycle_t last)
{
	struct azx_dev *azx_dev = get_azx_dev(substream);
	struct timecounter *tc = &azx_dev->azx_tc;
	struct cyclecounter *cc = &azx_dev->azx_cc;
	u64 nsec;

	cc->read = azx_cc_read;
	cc->mask = CLOCKSOURCE_MASK(32);

	/*
	 * Converting from 24 MHz to ns means applying a 125/3 factor.
	 * To avoid any saturation issues in intermediate operations,
	 * the 125 factor is applied first. The division is applied
	 * last after reading the timecounter value.
	 * Applying the 1/3 factor as part of the multiplication
	 * requires at least 20 bits for a decent precision, however
	 * overflows occur after about 4 hours or less, not a option.
	 */

	cc->mult = 125; /* saturation after 195 years */
	cc->shift = 0;

	nsec = 0; /* audio time is elapsed time since trigger */
	timecounter_init(tc, cc, nsec);
	if (force)
		/*
		 * force timecounter to use predefined value,
		 * used for synchronized starts
		 */
		tc->cycle_last = last;
}

static int azx_get_wallclock_tstamp(struct snd_pcm_substream *substream,
				struct timespec *ts)
{
	struct azx_dev *azx_dev = get_azx_dev(substream);
	u64 nsec;

	nsec = timecounter_read(&azx_dev->azx_tc);
	nsec = div_u64(nsec, 3); /* can be optimized */

	*ts = ns_to_timespec(nsec);

	return 0;
}

1835
static struct snd_pcm_hardware azx_pcm_hw = {
1836 1837
	.info =			(SNDRV_PCM_INFO_MMAP |
				 SNDRV_PCM_INFO_INTERLEAVED |
L
Linus Torvalds 已提交
1838 1839
				 SNDRV_PCM_INFO_BLOCK_TRANSFER |
				 SNDRV_PCM_INFO_MMAP_VALID |
1840 1841
				 /* No full-resume yet implemented */
				 /* SNDRV_PCM_INFO_RESUME |*/
1842
				 SNDRV_PCM_INFO_PAUSE |
1843
				 SNDRV_PCM_INFO_SYNC_START |
1844
				 SNDRV_PCM_INFO_HAS_WALL_CLOCK |
1845
				 SNDRV_PCM_INFO_NO_PERIOD_WAKEUP),
L
Linus Torvalds 已提交
1846 1847 1848 1849 1850 1851 1852 1853 1854 1855 1856 1857 1858 1859
	.formats =		SNDRV_PCM_FMTBIT_S16_LE,
	.rates =		SNDRV_PCM_RATE_48000,
	.rate_min =		48000,
	.rate_max =		48000,
	.channels_min =		2,
	.channels_max =		2,
	.buffer_bytes_max =	AZX_MAX_BUF_SIZE,
	.period_bytes_min =	128,
	.period_bytes_max =	AZX_MAX_BUF_SIZE / 2,
	.periods_min =		2,
	.periods_max =		AZX_MAX_FRAG,
	.fifo_size =		0,
};

1860
static int azx_pcm_open(struct snd_pcm_substream *substream)
L
Linus Torvalds 已提交
1861 1862 1863
{
	struct azx_pcm *apcm = snd_pcm_substream_chip(substream);
	struct hda_pcm_stream *hinfo = apcm->hinfo[substream->stream];
1864 1865 1866
	struct azx *chip = apcm->chip;
	struct azx_dev *azx_dev;
	struct snd_pcm_runtime *runtime = substream->runtime;
L
Linus Torvalds 已提交
1867 1868
	unsigned long flags;
	int err;
1869
	int buff_step;
L
Linus Torvalds 已提交
1870

1871
	mutex_lock(&chip->open_mutex);
1872
	azx_dev = azx_assign_device(chip, substream);
L
Linus Torvalds 已提交
1873
	if (azx_dev == NULL) {
1874
		mutex_unlock(&chip->open_mutex);
L
Linus Torvalds 已提交
1875 1876 1877 1878 1879 1880 1881 1882 1883
		return -EBUSY;
	}
	runtime->hw = azx_pcm_hw;
	runtime->hw.channels_min = hinfo->channels_min;
	runtime->hw.channels_max = hinfo->channels_max;
	runtime->hw.formats = hinfo->formats;
	runtime->hw.rates = hinfo->rates;
	snd_pcm_limit_hw_rates(runtime);
	snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS);
1884 1885 1886 1887 1888 1889

	/* avoid wrap-around with wall-clock */
	snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_TIME,
				20,
				178000000);

1890
	if (chip->align_buffer_size)
1891 1892 1893 1894 1895 1896 1897 1898 1899 1900 1901 1902 1903 1904
		/* constrain buffer sizes to be multiple of 128
		   bytes. This is more efficient in terms of memory
		   access but isn't required by the HDA spec and
		   prevents users from specifying exact period/buffer
		   sizes. For example for 44.1kHz, a period size set
		   to 20ms will be rounded to 19.59ms. */
		buff_step = 128;
	else
		/* Don't enforce steps on buffer sizes, still need to
		   be multiple of 4 bytes (HDA spec). Tested on Intel
		   HDA controllers, may not work on all devices where
		   option needs to be disabled */
		buff_step = 4;

1905
	snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
1906
				   buff_step);
1907
	snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
1908
				   buff_step);
1909
	snd_hda_power_up_d3wait(apcm->codec);
1910 1911
	err = hinfo->ops.open(hinfo, apcm->codec, substream);
	if (err < 0) {
L
Linus Torvalds 已提交
1912
		azx_release_device(azx_dev);
1913
		snd_hda_power_down(apcm->codec);
1914
		mutex_unlock(&chip->open_mutex);
L
Linus Torvalds 已提交
1915 1916
		return err;
	}
1917
	snd_pcm_limit_hw_rates(runtime);
1918 1919 1920 1921 1922 1923 1924 1925 1926 1927 1928
	/* sanity check */
	if (snd_BUG_ON(!runtime->hw.channels_min) ||
	    snd_BUG_ON(!runtime->hw.channels_max) ||
	    snd_BUG_ON(!runtime->hw.formats) ||
	    snd_BUG_ON(!runtime->hw.rates)) {
		azx_release_device(azx_dev);
		hinfo->ops.close(hinfo, apcm->codec, substream);
		snd_hda_power_down(apcm->codec);
		mutex_unlock(&chip->open_mutex);
		return -EINVAL;
	}
1929 1930 1931 1932 1933 1934

	/* disable WALLCLOCK timestamps for capture streams
	   until we figure out how to handle digital inputs */
	if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
		runtime->hw.info &= ~SNDRV_PCM_INFO_HAS_WALL_CLOCK;

L
Linus Torvalds 已提交
1935 1936 1937 1938 1939 1940
	spin_lock_irqsave(&chip->reg_lock, flags);
	azx_dev->substream = substream;
	azx_dev->running = 0;
	spin_unlock_irqrestore(&chip->reg_lock, flags);

	runtime->private_data = azx_dev;
1941
	snd_pcm_set_sync(substream);
1942
	mutex_unlock(&chip->open_mutex);
L
Linus Torvalds 已提交
1943 1944 1945
	return 0;
}

1946
static int azx_pcm_close(struct snd_pcm_substream *substream)
L
Linus Torvalds 已提交
1947 1948 1949
{
	struct azx_pcm *apcm = snd_pcm_substream_chip(substream);
	struct hda_pcm_stream *hinfo = apcm->hinfo[substream->stream];
1950 1951
	struct azx *chip = apcm->chip;
	struct azx_dev *azx_dev = get_azx_dev(substream);
L
Linus Torvalds 已提交
1952 1953
	unsigned long flags;

1954
	mutex_lock(&chip->open_mutex);
L
Linus Torvalds 已提交
1955 1956 1957 1958 1959 1960
	spin_lock_irqsave(&chip->reg_lock, flags);
	azx_dev->substream = NULL;
	azx_dev->running = 0;
	spin_unlock_irqrestore(&chip->reg_lock, flags);
	azx_release_device(azx_dev);
	hinfo->ops.close(hinfo, apcm->codec, substream);
1961
	snd_hda_power_down(apcm->codec);
1962
	mutex_unlock(&chip->open_mutex);
L
Linus Torvalds 已提交
1963 1964 1965
	return 0;
}

1966 1967
static int azx_pcm_hw_params(struct snd_pcm_substream *substream,
			     struct snd_pcm_hw_params *hw_params)
L
Linus Torvalds 已提交
1968
{
T
Takashi Iwai 已提交
1969 1970 1971
	struct azx_pcm *apcm = snd_pcm_substream_chip(substream);
	struct azx *chip = apcm->chip;
	struct snd_pcm_runtime *runtime = substream->runtime;
1972
	struct azx_dev *azx_dev = get_azx_dev(substream);
T
Takashi Iwai 已提交
1973
	int ret;
1974

T
Takashi Iwai 已提交
1975
	mark_runtime_wc(chip, azx_dev, runtime, false);
1976 1977 1978
	azx_dev->bufsize = 0;
	azx_dev->period_bytes = 0;
	azx_dev->format_val = 0;
T
Takashi Iwai 已提交
1979
	ret = snd_pcm_lib_malloc_pages(substream,
1980
					params_buffer_bytes(hw_params));
T
Takashi Iwai 已提交
1981 1982 1983 1984
	if (ret < 0)
		return ret;
	mark_runtime_wc(chip, azx_dev, runtime, true);
	return ret;
L
Linus Torvalds 已提交
1985 1986
}

1987
static int azx_pcm_hw_free(struct snd_pcm_substream *substream)
L
Linus Torvalds 已提交
1988 1989
{
	struct azx_pcm *apcm = snd_pcm_substream_chip(substream);
1990
	struct azx_dev *azx_dev = get_azx_dev(substream);
T
Takashi Iwai 已提交
1991 1992
	struct azx *chip = apcm->chip;
	struct snd_pcm_runtime *runtime = substream->runtime;
L
Linus Torvalds 已提交
1993 1994 1995 1996 1997 1998
	struct hda_pcm_stream *hinfo = apcm->hinfo[substream->stream];

	/* reset BDL address */
	azx_sd_writel(azx_dev, SD_BDLPL, 0);
	azx_sd_writel(azx_dev, SD_BDLPU, 0);
	azx_sd_writel(azx_dev, SD_CTL, 0);
1999 2000 2001
	azx_dev->bufsize = 0;
	azx_dev->period_bytes = 0;
	azx_dev->format_val = 0;
L
Linus Torvalds 已提交
2002

2003
	snd_hda_codec_cleanup(apcm->codec, hinfo, substream);
L
Linus Torvalds 已提交
2004

T
Takashi Iwai 已提交
2005
	mark_runtime_wc(chip, azx_dev, runtime, false);
L
Linus Torvalds 已提交
2006 2007 2008
	return snd_pcm_lib_free_pages(substream);
}

2009
static int azx_pcm_prepare(struct snd_pcm_substream *substream)
L
Linus Torvalds 已提交
2010 2011
{
	struct azx_pcm *apcm = snd_pcm_substream_chip(substream);
2012 2013
	struct azx *chip = apcm->chip;
	struct azx_dev *azx_dev = get_azx_dev(substream);
L
Linus Torvalds 已提交
2014
	struct hda_pcm_stream *hinfo = apcm->hinfo[substream->stream];
2015
	struct snd_pcm_runtime *runtime = substream->runtime;
2016
	unsigned int bufsize, period_bytes, format_val, stream_tag;
2017
	int err;
2018 2019 2020
	struct hda_spdif_out *spdif =
		snd_hda_spdif_out_of_nid(apcm->codec, hinfo->nid);
	unsigned short ctls = spdif ? spdif->ctls : 0;
L
Linus Torvalds 已提交
2021

2022
	azx_stream_reset(chip, azx_dev);
2023 2024 2025
	format_val = snd_hda_calc_stream_format(runtime->rate,
						runtime->channels,
						runtime->format,
2026
						hinfo->maxbps,
2027
						ctls);
2028
	if (!format_val) {
2029
		snd_printk(KERN_ERR SFX
2030 2031
			   "%s: invalid format_val, rate=%d, ch=%d, format=%d\n",
			   pci_name(chip->pci), runtime->rate, runtime->channels, runtime->format);
L
Linus Torvalds 已提交
2032 2033 2034
		return -EINVAL;
	}

2035 2036 2037
	bufsize = snd_pcm_lib_buffer_bytes(substream);
	period_bytes = snd_pcm_lib_period_bytes(substream);

2038 2039
	snd_printdd(SFX "%s: azx_pcm_prepare: bufsize=0x%x, format=0x%x\n",
		    pci_name(chip->pci), bufsize, format_val);
2040 2041 2042

	if (bufsize != azx_dev->bufsize ||
	    period_bytes != azx_dev->period_bytes ||
2043 2044
	    format_val != azx_dev->format_val ||
	    runtime->no_period_wakeup != azx_dev->no_period_wakeup) {
2045 2046 2047
		azx_dev->bufsize = bufsize;
		azx_dev->period_bytes = period_bytes;
		azx_dev->format_val = format_val;
2048
		azx_dev->no_period_wakeup = runtime->no_period_wakeup;
2049 2050 2051 2052 2053
		err = azx_setup_periods(chip, substream, azx_dev);
		if (err < 0)
			return err;
	}

2054 2055 2056
	/* wallclk has 24Mhz clock source */
	azx_dev->period_wallclk = (((runtime->period_size * 24000) /
						runtime->rate) * 1000);
L
Linus Torvalds 已提交
2057 2058 2059 2060 2061 2062
	azx_setup_controller(chip, azx_dev);
	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
		azx_dev->fifo_size = azx_sd_readw(azx_dev, SD_FIFOSIZE) + 1;
	else
		azx_dev->fifo_size = 0;

2063 2064
	stream_tag = azx_dev->stream_tag;
	/* CA-IBG chips need the playback stream starting from 1 */
2065
	if ((chip->driver_caps & AZX_DCAPS_CTX_WORKAROUND) &&
2066 2067 2068
	    stream_tag > chip->capture_streams)
		stream_tag -= chip->capture_streams;
	return snd_hda_codec_prepare(apcm->codec, hinfo, stream_tag,
2069
				     azx_dev->format_val, substream);
L
Linus Torvalds 已提交
2070 2071
}

2072
static int azx_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
L
Linus Torvalds 已提交
2073 2074
{
	struct azx_pcm *apcm = snd_pcm_substream_chip(substream);
2075
	struct azx *chip = apcm->chip;
2076 2077
	struct azx_dev *azx_dev;
	struct snd_pcm_substream *s;
2078
	int rstart = 0, start, nsync = 0, sbits = 0;
2079
	int nwait, timeout;
L
Linus Torvalds 已提交
2080

2081 2082 2083
	azx_dev = get_azx_dev(substream);
	trace_azx_pcm_trigger(chip, azx_dev, cmd);

L
Linus Torvalds 已提交
2084
	switch (cmd) {
2085 2086
	case SNDRV_PCM_TRIGGER_START:
		rstart = 1;
L
Linus Torvalds 已提交
2087 2088
	case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
	case SNDRV_PCM_TRIGGER_RESUME:
2089
		start = 1;
L
Linus Torvalds 已提交
2090 2091
		break;
	case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
2092
	case SNDRV_PCM_TRIGGER_SUSPEND:
L
Linus Torvalds 已提交
2093
	case SNDRV_PCM_TRIGGER_STOP:
2094
		start = 0;
L
Linus Torvalds 已提交
2095 2096
		break;
	default:
2097 2098 2099 2100 2101 2102 2103 2104 2105 2106 2107 2108 2109
		return -EINVAL;
	}

	snd_pcm_group_for_each_entry(s, substream) {
		if (s->pcm->card != substream->pcm->card)
			continue;
		azx_dev = get_azx_dev(s);
		sbits |= 1 << azx_dev->index;
		nsync++;
		snd_pcm_trigger_done(s, substream);
	}

	spin_lock(&chip->reg_lock);
2110 2111 2112 2113 2114 2115 2116 2117

	/* first, set SYNC bits of corresponding streams */
	if (chip->driver_caps & AZX_DCAPS_OLD_SSYNC)
		azx_writel(chip, OLD_SSYNC,
			azx_readl(chip, OLD_SSYNC) | sbits);
	else
		azx_writel(chip, SSYNC, azx_readl(chip, SSYNC) | sbits);

2118 2119 2120 2121
	snd_pcm_group_for_each_entry(s, substream) {
		if (s->pcm->card != substream->pcm->card)
			continue;
		azx_dev = get_azx_dev(s);
2122 2123 2124 2125 2126
		if (start) {
			azx_dev->start_wallclk = azx_readl(chip, WALLCLK);
			if (!rstart)
				azx_dev->start_wallclk -=
						azx_dev->period_wallclk;
2127
			azx_stream_start(chip, azx_dev);
2128
		} else {
2129
			azx_stream_stop(chip, azx_dev);
2130
		}
2131
		azx_dev->running = start;
L
Linus Torvalds 已提交
2132 2133
	}
	spin_unlock(&chip->reg_lock);
2134 2135 2136 2137 2138 2139 2140 2141 2142 2143 2144 2145 2146 2147 2148 2149 2150 2151 2152 2153 2154 2155 2156 2157 2158 2159 2160 2161 2162 2163 2164 2165
	if (start) {
		/* wait until all FIFOs get ready */
		for (timeout = 5000; timeout; timeout--) {
			nwait = 0;
			snd_pcm_group_for_each_entry(s, substream) {
				if (s->pcm->card != substream->pcm->card)
					continue;
				azx_dev = get_azx_dev(s);
				if (!(azx_sd_readb(azx_dev, SD_STS) &
				      SD_STS_FIFO_READY))
					nwait++;
			}
			if (!nwait)
				break;
			cpu_relax();
		}
	} else {
		/* wait until all RUN bits are cleared */
		for (timeout = 5000; timeout; timeout--) {
			nwait = 0;
			snd_pcm_group_for_each_entry(s, substream) {
				if (s->pcm->card != substream->pcm->card)
					continue;
				azx_dev = get_azx_dev(s);
				if (azx_sd_readb(azx_dev, SD_CTL) &
				    SD_CTL_DMA_START)
					nwait++;
			}
			if (!nwait)
				break;
			cpu_relax();
		}
L
Linus Torvalds 已提交
2166
	}
2167 2168 2169 2170 2171 2172 2173
	spin_lock(&chip->reg_lock);
	/* reset SYNC bits */
	if (chip->driver_caps & AZX_DCAPS_OLD_SSYNC)
		azx_writel(chip, OLD_SSYNC,
			azx_readl(chip, OLD_SSYNC) & ~sbits);
	else
		azx_writel(chip, SSYNC, azx_readl(chip, SSYNC) & ~sbits);
2174 2175 2176 2177 2178 2179 2180 2181 2182 2183 2184 2185 2186 2187 2188 2189
	if (start) {
		azx_timecounter_init(substream, 0, 0);
		if (nsync > 1) {
			cycle_t cycle_last;

			/* same start cycle for master and group */
			azx_dev = get_azx_dev(substream);
			cycle_last = azx_dev->azx_tc.cycle_last;

			snd_pcm_group_for_each_entry(s, substream) {
				if (s->pcm->card != substream->pcm->card)
					continue;
				azx_timecounter_init(s, 1, cycle_last);
			}
		}
	}
2190
	spin_unlock(&chip->reg_lock);
2191
	return 0;
L
Linus Torvalds 已提交
2192 2193
}

2194 2195 2196 2197 2198 2199 2200 2201 2202
/* get the current DMA position with correction on VIA chips */
static unsigned int azx_via_get_position(struct azx *chip,
					 struct azx_dev *azx_dev)
{
	unsigned int link_pos, mini_pos, bound_pos;
	unsigned int mod_link_pos, mod_dma_pos, mod_mini_pos;
	unsigned int fifo_size;

	link_pos = azx_sd_readl(azx_dev, SD_LPIB);
2203
	if (azx_dev->substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
2204 2205 2206 2207 2208 2209 2210 2211 2212 2213 2214 2215 2216 2217 2218 2219 2220 2221 2222 2223 2224 2225 2226 2227 2228 2229 2230 2231 2232 2233 2234 2235 2236 2237 2238 2239 2240 2241 2242 2243 2244 2245 2246 2247 2248 2249
		/* Playback, no problem using link position */
		return link_pos;
	}

	/* Capture */
	/* For new chipset,
	 * use mod to get the DMA position just like old chipset
	 */
	mod_dma_pos = le32_to_cpu(*azx_dev->posbuf);
	mod_dma_pos %= azx_dev->period_bytes;

	/* azx_dev->fifo_size can't get FIFO size of in stream.
	 * Get from base address + offset.
	 */
	fifo_size = readw(chip->remap_addr + VIA_IN_STREAM0_FIFO_SIZE_OFFSET);

	if (azx_dev->insufficient) {
		/* Link position never gather than FIFO size */
		if (link_pos <= fifo_size)
			return 0;

		azx_dev->insufficient = 0;
	}

	if (link_pos <= fifo_size)
		mini_pos = azx_dev->bufsize + link_pos - fifo_size;
	else
		mini_pos = link_pos - fifo_size;

	/* Find nearest previous boudary */
	mod_mini_pos = mini_pos % azx_dev->period_bytes;
	mod_link_pos = link_pos % azx_dev->period_bytes;
	if (mod_link_pos >= fifo_size)
		bound_pos = link_pos - mod_link_pos;
	else if (mod_dma_pos >= mod_mini_pos)
		bound_pos = mini_pos - mod_mini_pos;
	else {
		bound_pos = mini_pos - mod_mini_pos + azx_dev->period_bytes;
		if (bound_pos >= azx_dev->bufsize)
			bound_pos = 0;
	}

	/* Calculate real DMA position we want */
	return bound_pos + mod_dma_pos;
}

2250
static unsigned int azx_get_position(struct azx *chip,
2251 2252
				     struct azx_dev *azx_dev,
				     bool with_check)
L
Linus Torvalds 已提交
2253 2254
{
	unsigned int pos;
2255
	int stream = azx_dev->substream->stream;
2256
	int delay = 0;
L
Linus Torvalds 已提交
2257

2258 2259 2260 2261 2262 2263
	switch (chip->position_fix[stream]) {
	case POS_FIX_LPIB:
		/* read LPIB */
		pos = azx_sd_readl(azx_dev, SD_LPIB);
		break;
	case POS_FIX_VIACOMBO:
2264
		pos = azx_via_get_position(chip, azx_dev);
2265 2266 2267 2268
		break;
	default:
		/* use the position buffer */
		pos = le32_to_cpu(*azx_dev->posbuf);
2269
		if (with_check && chip->position_fix[stream] == POS_FIX_AUTO) {
2270 2271 2272 2273 2274 2275 2276 2277 2278 2279
			if (!pos || pos == (u32)-1) {
				printk(KERN_WARNING
				       "hda-intel: Invalid position buffer, "
				       "using LPIB read method instead.\n");
				chip->position_fix[stream] = POS_FIX_LPIB;
				pos = azx_sd_readl(azx_dev, SD_LPIB);
			} else
				chip->position_fix[stream] = POS_FIX_POSBUF;
		}
		break;
2280
	}
2281

L
Linus Torvalds 已提交
2282 2283
	if (pos >= azx_dev->bufsize)
		pos = 0;
2284 2285 2286 2287 2288 2289 2290 2291 2292 2293 2294 2295 2296

	/* calculate runtime delay from LPIB */
	if (azx_dev->substream->runtime &&
	    chip->position_fix[stream] == POS_FIX_POSBUF &&
	    (chip->driver_caps & AZX_DCAPS_COUNT_LPIB_DELAY)) {
		unsigned int lpib_pos = azx_sd_readl(azx_dev, SD_LPIB);
		if (stream == SNDRV_PCM_STREAM_PLAYBACK)
			delay = pos - lpib_pos;
		else
			delay = lpib_pos - pos;
		if (delay < 0)
			delay += azx_dev->bufsize;
		if (delay >= azx_dev->period_bytes) {
2297
			snd_printk(KERN_WARNING SFX
2298
				   "%s: Unstable LPIB (%d >= %d); "
2299
				   "disabling LPIB delay counting\n",
2300
				   pci_name(chip->pci), delay, azx_dev->period_bytes);
2301 2302
			delay = 0;
			chip->driver_caps &= ~AZX_DCAPS_COUNT_LPIB_DELAY;
2303 2304 2305 2306
		}
		azx_dev->substream->runtime->delay =
			bytes_to_frames(azx_dev->substream->runtime, delay);
	}
2307
	trace_azx_get_position(chip, azx_dev, pos, delay);
2308 2309 2310 2311 2312 2313 2314 2315 2316
	return pos;
}

static snd_pcm_uframes_t azx_pcm_pointer(struct snd_pcm_substream *substream)
{
	struct azx_pcm *apcm = snd_pcm_substream_chip(substream);
	struct azx *chip = apcm->chip;
	struct azx_dev *azx_dev = get_azx_dev(substream);
	return bytes_to_frames(substream->runtime,
2317
			       azx_get_position(chip, azx_dev, false));
2318 2319 2320 2321 2322 2323 2324 2325 2326 2327 2328 2329 2330
}

/*
 * Check whether the current DMA position is acceptable for updating
 * periods.  Returns non-zero if it's OK.
 *
 * Many HD-audio controllers appear pretty inaccurate about
 * the update-IRQ timing.  The IRQ is issued before actually the
 * data is processed.  So, we need to process it afterwords in a
 * workqueue.
 */
static int azx_position_ok(struct azx *chip, struct azx_dev *azx_dev)
{
2331
	u32 wallclk;
2332 2333
	unsigned int pos;

2334 2335
	wallclk = azx_readl(chip, WALLCLK) - azx_dev->start_wallclk;
	if (wallclk < (azx_dev->period_wallclk * 2) / 3)
2336 2337
		return -1;	/* bogus (too early) interrupt */

2338
	pos = azx_get_position(chip, azx_dev, true);
2339

2340 2341
	if (WARN_ONCE(!azx_dev->period_bytes,
		      "hda-intel: zero azx_dev->period_bytes"))
2342
		return -1; /* this shouldn't happen! */
2343
	if (wallclk < (azx_dev->period_wallclk * 5) / 4 &&
2344 2345 2346
	    pos % azx_dev->period_bytes > azx_dev->period_bytes / 2)
		/* NG - it's below the first next period boundary */
		return bdl_pos_adj[chip->dev_index] ? 0 : -1;
2347
	azx_dev->start_wallclk += wallclk;
2348 2349 2350 2351 2352 2353 2354 2355 2356
	return 1; /* OK, it's fine */
}

/*
 * The work for pending PCM period updates.
 */
static void azx_irq_pending_work(struct work_struct *work)
{
	struct azx *chip = container_of(work, struct azx, irq_pending_work);
2357
	int i, pending, ok;
2358

2359 2360 2361 2362 2363 2364 2365 2366
	if (!chip->irq_pending_warned) {
		printk(KERN_WARNING
		       "hda-intel: IRQ timing workaround is activated "
		       "for card #%d. Suggest a bigger bdl_pos_adj.\n",
		       chip->card->number);
		chip->irq_pending_warned = 1;
	}

2367 2368 2369 2370 2371 2372 2373 2374 2375
	for (;;) {
		pending = 0;
		spin_lock_irq(&chip->reg_lock);
		for (i = 0; i < chip->num_streams; i++) {
			struct azx_dev *azx_dev = &chip->azx_dev[i];
			if (!azx_dev->irq_pending ||
			    !azx_dev->substream ||
			    !azx_dev->running)
				continue;
2376 2377
			ok = azx_position_ok(chip, azx_dev);
			if (ok > 0) {
2378 2379 2380 2381
				azx_dev->irq_pending = 0;
				spin_unlock(&chip->reg_lock);
				snd_pcm_period_elapsed(azx_dev->substream);
				spin_lock(&chip->reg_lock);
2382 2383
			} else if (ok < 0) {
				pending = 0;	/* too early */
2384 2385 2386 2387 2388 2389
			} else
				pending++;
		}
		spin_unlock_irq(&chip->reg_lock);
		if (!pending)
			return;
2390
		msleep(1);
2391 2392 2393 2394 2395 2396 2397 2398 2399 2400 2401 2402
	}
}

/* clear irq_pending flags and assure no on-going workq */
static void azx_clear_irq_pending(struct azx *chip)
{
	int i;

	spin_lock_irq(&chip->reg_lock);
	for (i = 0; i < chip->num_streams; i++)
		chip->azx_dev[i].irq_pending = 0;
	spin_unlock_irq(&chip->reg_lock);
L
Linus Torvalds 已提交
2403 2404
}

T
Takashi Iwai 已提交
2405 2406 2407 2408 2409 2410 2411 2412 2413 2414 2415 2416 2417 2418
#ifdef CONFIG_X86
static int azx_pcm_mmap(struct snd_pcm_substream *substream,
			struct vm_area_struct *area)
{
	struct azx_pcm *apcm = snd_pcm_substream_chip(substream);
	struct azx *chip = apcm->chip;
	if (!azx_snoop(chip))
		area->vm_page_prot = pgprot_writecombine(area->vm_page_prot);
	return snd_pcm_lib_default_mmap(substream, area);
}
#else
#define azx_pcm_mmap	NULL
#endif

2419
static struct snd_pcm_ops azx_pcm_ops = {
L
Linus Torvalds 已提交
2420 2421 2422 2423 2424 2425 2426 2427
	.open = azx_pcm_open,
	.close = azx_pcm_close,
	.ioctl = snd_pcm_lib_ioctl,
	.hw_params = azx_pcm_hw_params,
	.hw_free = azx_pcm_hw_free,
	.prepare = azx_pcm_prepare,
	.trigger = azx_pcm_trigger,
	.pointer = azx_pcm_pointer,
2428
	.wall_clock =  azx_get_wallclock_tstamp,
T
Takashi Iwai 已提交
2429
	.mmap = azx_pcm_mmap,
T
Takashi Iwai 已提交
2430
	.page = snd_pcm_sgbuf_ops_page,
L
Linus Torvalds 已提交
2431 2432
};

2433
static void azx_pcm_free(struct snd_pcm *pcm)
L
Linus Torvalds 已提交
2434
{
2435 2436
	struct azx_pcm *apcm = pcm->private_data;
	if (apcm) {
2437
		list_del(&apcm->list);
2438 2439
		kfree(apcm);
	}
L
Linus Torvalds 已提交
2440 2441
}

2442 2443
#define MAX_PREALLOC_SIZE	(32 * 1024 * 1024)

2444
static int
2445 2446
azx_attach_pcm_stream(struct hda_bus *bus, struct hda_codec *codec,
		      struct hda_pcm *cpcm)
L
Linus Torvalds 已提交
2447
{
2448
	struct azx *chip = bus->private_data;
2449
	struct snd_pcm *pcm;
L
Linus Torvalds 已提交
2450
	struct azx_pcm *apcm;
2451
	int pcm_dev = cpcm->device;
2452
	unsigned int size;
2453
	int s, err;
L
Linus Torvalds 已提交
2454

2455 2456
	list_for_each_entry(apcm, &chip->pcm_list, list) {
		if (apcm->pcm->device == pcm_dev) {
2457 2458
			snd_printk(KERN_ERR SFX "%s: PCM %d already exists\n",
				   pci_name(chip->pci), pcm_dev);
2459 2460
			return -EBUSY;
		}
2461 2462 2463 2464
	}
	err = snd_pcm_new(chip->card, cpcm->name, pcm_dev,
			  cpcm->stream[SNDRV_PCM_STREAM_PLAYBACK].substreams,
			  cpcm->stream[SNDRV_PCM_STREAM_CAPTURE].substreams,
L
Linus Torvalds 已提交
2465 2466 2467
			  &pcm);
	if (err < 0)
		return err;
T
Takashi Iwai 已提交
2468
	strlcpy(pcm->name, cpcm->name, sizeof(pcm->name));
2469
	apcm = kzalloc(sizeof(*apcm), GFP_KERNEL);
L
Linus Torvalds 已提交
2470 2471 2472
	if (apcm == NULL)
		return -ENOMEM;
	apcm->chip = chip;
2473
	apcm->pcm = pcm;
L
Linus Torvalds 已提交
2474 2475 2476
	apcm->codec = codec;
	pcm->private_data = apcm;
	pcm->private_free = azx_pcm_free;
2477 2478
	if (cpcm->pcm_type == HDA_PCM_TYPE_MODEM)
		pcm->dev_class = SNDRV_PCM_CLASS_MODEM;
2479
	list_add_tail(&apcm->list, &chip->pcm_list);
2480 2481 2482 2483 2484 2485 2486
	cpcm->pcm = pcm;
	for (s = 0; s < 2; s++) {
		apcm->hinfo[s] = &cpcm->stream[s];
		if (cpcm->stream[s].substreams)
			snd_pcm_set_ops(pcm, s, &azx_pcm_ops);
	}
	/* buffer pre-allocation */
2487 2488 2489
	size = CONFIG_SND_HDA_PREALLOC_SIZE * 1024;
	if (size > MAX_PREALLOC_SIZE)
		size = MAX_PREALLOC_SIZE;
T
Takashi Iwai 已提交
2490
	snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV_SG,
L
Linus Torvalds 已提交
2491
					      snd_dma_pci_data(chip->pci),
2492
					      size, MAX_PREALLOC_SIZE);
L
Linus Torvalds 已提交
2493 2494 2495 2496 2497 2498
	return 0;
}

/*
 * mixer creation - all stuff is implemented in hda module
 */
2499
static int azx_mixer_create(struct azx *chip)
L
Linus Torvalds 已提交
2500 2501 2502 2503 2504 2505 2506 2507
{
	return snd_hda_build_controls(chip->bus);
}


/*
 * initialize SD streams
 */
2508
static int azx_init_stream(struct azx *chip)
L
Linus Torvalds 已提交
2509 2510 2511 2512
{
	int i;

	/* initialize each stream (aka device)
2513 2514
	 * assign the starting bdl address to each stream (device)
	 * and initialize
L
Linus Torvalds 已提交
2515
	 */
2516
	for (i = 0; i < chip->num_streams; i++) {
2517
		struct azx_dev *azx_dev = &chip->azx_dev[i];
2518
		azx_dev->posbuf = (u32 __iomem *)(chip->posbuf.area + i * 8);
L
Linus Torvalds 已提交
2519 2520 2521 2522 2523 2524 2525 2526 2527 2528 2529 2530
		/* offset: SDI0=0x80, SDI1=0xa0, ... SDO3=0x160 */
		azx_dev->sd_addr = chip->remap_addr + (0x20 * i + 0x80);
		/* int mask: SDI0=0x01, SDI1=0x02, ... SDO3=0x80 */
		azx_dev->sd_int_sta_mask = 1 << i;
		/* stream tag: must be non-zero and unique */
		azx_dev->index = i;
		azx_dev->stream_tag = i + 1;
	}

	return 0;
}

2531 2532
static int azx_acquire_irq(struct azx *chip, int do_disconnect)
{
2533 2534
	if (request_irq(chip->pci->irq, azx_interrupt,
			chip->msi ? 0 : IRQF_SHARED,
2535
			KBUILD_MODNAME, chip)) {
2536 2537 2538 2539 2540 2541 2542
		printk(KERN_ERR "hda-intel: unable to grab IRQ %d, "
		       "disabling device\n", chip->pci->irq);
		if (do_disconnect)
			snd_card_disconnect(chip->card);
		return -1;
	}
	chip->irq = chip->pci->irq;
2543
	pci_intx(chip->pci, !chip->msi);
2544 2545 2546
	return 0;
}

L
Linus Torvalds 已提交
2547

2548 2549
static void azx_stop_chip(struct azx *chip)
{
2550
	if (!chip->initialized)
2551 2552 2553 2554 2555 2556 2557 2558 2559 2560 2561 2562 2563 2564 2565 2566
		return;

	/* disable interrupts */
	azx_int_disable(chip);
	azx_int_clear(chip);

	/* disable CORB/RIRB */
	azx_free_cmd_io(chip);

	/* disable position buffer */
	azx_writel(chip, DPLBASE, 0);
	azx_writel(chip, DPUBASE, 0);

	chip->initialized = 0;
}

2567
#ifdef CONFIG_PM
2568
/* power-up/down the controller */
2569
static void azx_power_notify(struct hda_bus *bus, bool power_up)
2570
{
2571
	struct azx *chip = bus->private_data;
2572

2573 2574 2575
	if (!(chip->driver_caps & AZX_DCAPS_PM_RUNTIME))
		return;

2576
	if (power_up)
2577 2578 2579
		pm_runtime_get_sync(&chip->pci->dev);
	else
		pm_runtime_put_sync(&chip->pci->dev);
2580
}
2581 2582 2583 2584 2585 2586 2587 2588 2589 2590 2591 2592 2593 2594 2595 2596 2597 2598 2599 2600 2601 2602 2603 2604 2605 2606 2607 2608 2609 2610 2611 2612 2613 2614 2615 2616 2617 2618 2619 2620 2621 2622

static DEFINE_MUTEX(card_list_lock);
static LIST_HEAD(card_list);

static void azx_add_card_list(struct azx *chip)
{
	mutex_lock(&card_list_lock);
	list_add(&chip->list, &card_list);
	mutex_unlock(&card_list_lock);
}

static void azx_del_card_list(struct azx *chip)
{
	mutex_lock(&card_list_lock);
	list_del_init(&chip->list);
	mutex_unlock(&card_list_lock);
}

/* trigger power-save check at writing parameter */
static int param_set_xint(const char *val, const struct kernel_param *kp)
{
	struct azx *chip;
	struct hda_codec *c;
	int prev = power_save;
	int ret = param_set_int(val, kp);

	if (ret || prev == power_save)
		return ret;

	mutex_lock(&card_list_lock);
	list_for_each_entry(chip, &card_list, list) {
		if (!chip->bus || chip->disabled)
			continue;
		list_for_each_entry(c, &chip->bus->codec_list, list)
			snd_hda_power_sync(c);
	}
	mutex_unlock(&card_list_lock);
	return 0;
}
#else
#define azx_add_card_list(chip) /* NOP */
#define azx_del_card_list(chip) /* NOP */
2623
#endif /* CONFIG_PM */
2624

2625
#if defined(CONFIG_PM_SLEEP) || defined(SUPPORT_VGA_SWITCHEROO)
2626 2627 2628
/*
 * power management
 */
2629
static int azx_suspend(struct device *dev)
L
Linus Torvalds 已提交
2630
{
2631 2632
	struct pci_dev *pci = to_pci_dev(dev);
	struct snd_card *card = dev_get_drvdata(dev);
T
Takashi Iwai 已提交
2633
	struct azx *chip = card->private_data;
2634
	struct azx_pcm *p;
L
Linus Torvalds 已提交
2635

2636 2637 2638
	if (chip->disabled)
		return 0;

T
Takashi Iwai 已提交
2639
	snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
2640
	azx_clear_irq_pending(chip);
2641 2642
	list_for_each_entry(p, &chip->pcm_list, list)
		snd_pcm_suspend_all(p->pcm);
2643
	if (chip->initialized)
2644
		snd_hda_suspend(chip->bus);
2645
	azx_stop_chip(chip);
2646
	if (chip->irq >= 0) {
2647
		free_irq(chip->irq, chip);
2648 2649
		chip->irq = -1;
	}
2650
	if (chip->msi)
2651
		pci_disable_msi(chip->pci);
T
Takashi Iwai 已提交
2652 2653
	pci_disable_device(pci);
	pci_save_state(pci);
2654
	pci_set_power_state(pci, PCI_D3hot);
L
Linus Torvalds 已提交
2655 2656 2657
	return 0;
}

2658
static int azx_resume(struct device *dev)
L
Linus Torvalds 已提交
2659
{
2660 2661
	struct pci_dev *pci = to_pci_dev(dev);
	struct snd_card *card = dev_get_drvdata(dev);
T
Takashi Iwai 已提交
2662
	struct azx *chip = card->private_data;
L
Linus Torvalds 已提交
2663

2664 2665 2666
	if (chip->disabled)
		return 0;

2667 2668
	pci_set_power_state(pci, PCI_D0);
	pci_restore_state(pci);
2669 2670 2671 2672 2673 2674 2675
	if (pci_enable_device(pci) < 0) {
		printk(KERN_ERR "hda-intel: pci_enable_device failed, "
		       "disabling device\n");
		snd_card_disconnect(card);
		return -EIO;
	}
	pci_set_master(pci);
2676 2677 2678 2679
	if (chip->msi)
		if (pci_enable_msi(pci) < 0)
			chip->msi = 0;
	if (azx_acquire_irq(chip, 1) < 0)
2680
		return -EIO;
2681
	azx_init_pci(chip);
2682

2683
	azx_init_chip(chip, 1);
2684

L
Linus Torvalds 已提交
2685
	snd_hda_resume(chip->bus);
T
Takashi Iwai 已提交
2686
	snd_power_change_state(card, SNDRV_CTL_POWER_D0);
L
Linus Torvalds 已提交
2687 2688
	return 0;
}
2689 2690 2691 2692 2693 2694 2695 2696 2697 2698 2699 2700 2701 2702 2703 2704 2705 2706 2707 2708 2709 2710
#endif /* CONFIG_PM_SLEEP || SUPPORT_VGA_SWITCHEROO */

#ifdef CONFIG_PM_RUNTIME
static int azx_runtime_suspend(struct device *dev)
{
	struct snd_card *card = dev_get_drvdata(dev);
	struct azx *chip = card->private_data;

	azx_stop_chip(chip);
	azx_clear_irq_pending(chip);
	return 0;
}

static int azx_runtime_resume(struct device *dev)
{
	struct snd_card *card = dev_get_drvdata(dev);
	struct azx *chip = card->private_data;

	azx_init_pci(chip);
	azx_init_chip(chip, 1);
	return 0;
}
2711 2712 2713 2714 2715 2716 2717 2718 2719 2720 2721 2722 2723

static int azx_runtime_idle(struct device *dev)
{
	struct snd_card *card = dev_get_drvdata(dev);
	struct azx *chip = card->private_data;

	if (!power_save_controller ||
	    !(chip->driver_caps & AZX_DCAPS_PM_RUNTIME))
		return -EBUSY;

	return 0;
}

2724 2725 2726 2727 2728
#endif /* CONFIG_PM_RUNTIME */

#ifdef CONFIG_PM
static const struct dev_pm_ops azx_pm = {
	SET_SYSTEM_SLEEP_PM_OPS(azx_suspend, azx_resume)
2729
	SET_RUNTIME_PM_OPS(azx_runtime_suspend, azx_runtime_resume, azx_runtime_idle)
2730 2731
};

2732 2733 2734
#define AZX_PM_OPS	&azx_pm
#else
#define AZX_PM_OPS	NULL
2735
#endif /* CONFIG_PM */
L
Linus Torvalds 已提交
2736 2737


T
Takashi Iwai 已提交
2738 2739 2740 2741 2742 2743
/*
 * reboot notifier for hang-up problem at power-down
 */
static int azx_halt(struct notifier_block *nb, unsigned long event, void *buf)
{
	struct azx *chip = container_of(nb, struct azx, reboot_notifier);
2744
	snd_hda_bus_reboot_notify(chip->bus);
T
Takashi Iwai 已提交
2745 2746 2747 2748 2749 2750 2751 2752 2753 2754 2755 2756 2757 2758 2759 2760
	azx_stop_chip(chip);
	return NOTIFY_OK;
}

static void azx_notifier_register(struct azx *chip)
{
	chip->reboot_notifier.notifier_call = azx_halt;
	register_reboot_notifier(&chip->reboot_notifier);
}

static void azx_notifier_unregister(struct azx *chip)
{
	if (chip->reboot_notifier.notifier_call)
		unregister_reboot_notifier(&chip->reboot_notifier);
}

2761 2762
static int azx_first_init(struct azx *chip);
static int azx_probe_continue(struct azx *chip);
2763

2764
#ifdef SUPPORT_VGA_SWITCHEROO
2765
static struct pci_dev *get_bound_vga(struct pci_dev *pci);
2766 2767 2768 2769 2770 2771 2772 2773

static void azx_vs_set_state(struct pci_dev *pci,
			     enum vga_switcheroo_state state)
{
	struct snd_card *card = pci_get_drvdata(pci);
	struct azx *chip = card->private_data;
	bool disabled;

2774
	wait_for_completion(&chip->probe_wait);
2775 2776 2777 2778 2779 2780 2781 2782 2783 2784 2785 2786 2787 2788 2789 2790 2791 2792 2793 2794 2795 2796 2797
	if (chip->init_failed)
		return;

	disabled = (state == VGA_SWITCHEROO_OFF);
	if (chip->disabled == disabled)
		return;

	if (!chip->bus) {
		chip->disabled = disabled;
		if (!disabled) {
			snd_printk(KERN_INFO SFX
				   "%s: Start delayed initialization\n",
				   pci_name(chip->pci));
			if (azx_first_init(chip) < 0 ||
			    azx_probe_continue(chip) < 0) {
				snd_printk(KERN_ERR SFX
					   "%s: initialization error\n",
					   pci_name(chip->pci));
				chip->init_failed = true;
			}
		}
	} else {
		snd_printk(KERN_INFO SFX
2798 2799
			   "%s: %s via VGA-switcheroo\n", pci_name(chip->pci),
			   disabled ? "Disabling" : "Enabling");
2800
		if (disabled) {
2801
			azx_suspend(&pci->dev);
2802
			chip->disabled = true;
2803
			if (snd_hda_lock_devices(chip->bus))
2804 2805
				snd_printk(KERN_WARNING SFX "%s: Cannot lock devices!\n",
					   pci_name(chip->pci));
2806 2807 2808
		} else {
			snd_hda_unlock_devices(chip->bus);
			chip->disabled = false;
2809
			azx_resume(&pci->dev);
2810 2811 2812 2813 2814 2815 2816 2817 2818
		}
	}
}

static bool azx_vs_can_switch(struct pci_dev *pci)
{
	struct snd_card *card = pci_get_drvdata(pci);
	struct azx *chip = card->private_data;

2819
	wait_for_completion(&chip->probe_wait);
2820 2821 2822 2823 2824 2825 2826 2827 2828 2829
	if (chip->init_failed)
		return false;
	if (chip->disabled || !chip->bus)
		return true;
	if (snd_hda_lock_devices(chip->bus))
		return false;
	snd_hda_unlock_devices(chip->bus);
	return true;
}

2830
static void init_vga_switcheroo(struct azx *chip)
2831 2832 2833 2834 2835 2836 2837 2838 2839 2840 2841 2842 2843 2844 2845 2846
{
	struct pci_dev *p = get_bound_vga(chip->pci);
	if (p) {
		snd_printk(KERN_INFO SFX
			   "%s: Handle VGA-switcheroo audio client\n",
			   pci_name(chip->pci));
		chip->use_vga_switcheroo = 1;
		pci_dev_put(p);
	}
}

static const struct vga_switcheroo_client_ops azx_vs_ops = {
	.set_gpu_state = azx_vs_set_state,
	.can_switch = azx_vs_can_switch,
};

2847
static int register_vga_switcheroo(struct azx *chip)
2848
{
2849 2850
	int err;

2851 2852 2853 2854 2855
	if (!chip->use_vga_switcheroo)
		return 0;
	/* FIXME: currently only handling DIS controller
	 * is there any machine with two switchable HDMI audio controllers?
	 */
2856
	err = vga_switcheroo_register_audio_client(chip->pci, &azx_vs_ops,
2857 2858
						    VGA_SWITCHEROO_DIS,
						    chip->bus != NULL);
2859 2860 2861 2862
	if (err < 0)
		return err;
	chip->vga_switcheroo_registered = 1;
	return 0;
2863 2864 2865 2866
}
#else
#define init_vga_switcheroo(chip)		/* NOP */
#define register_vga_switcheroo(chip)		0
2867
#define check_hdmi_disabled(pci)	false
2868 2869
#endif /* SUPPORT_VGA_SWITCHER */

L
Linus Torvalds 已提交
2870 2871 2872
/*
 * destructor
 */
2873
static int azx_free(struct azx *chip)
L
Linus Torvalds 已提交
2874
{
T
Takashi Iwai 已提交
2875 2876
	int i;

2877 2878
	azx_del_card_list(chip);

T
Takashi Iwai 已提交
2879 2880
	azx_notifier_unregister(chip);

2881
	chip->init_failed = 1; /* to be sure */
2882
	complete_all(&chip->probe_wait);
2883

2884 2885 2886
	if (use_vga_switcheroo(chip)) {
		if (chip->disabled && chip->bus)
			snd_hda_unlock_devices(chip->bus);
2887 2888
		if (chip->vga_switcheroo_registered)
			vga_switcheroo_unregister_client(chip->pci);
2889 2890
	}

2891
	if (chip->initialized) {
2892
		azx_clear_irq_pending(chip);
2893
		for (i = 0; i < chip->num_streams; i++)
L
Linus Torvalds 已提交
2894
			azx_stream_stop(chip, &chip->azx_dev[i]);
2895
		azx_stop_chip(chip);
L
Linus Torvalds 已提交
2896 2897
	}

2898
	if (chip->irq >= 0)
L
Linus Torvalds 已提交
2899
		free_irq(chip->irq, (void*)chip);
2900
	if (chip->msi)
2901
		pci_disable_msi(chip->pci);
2902 2903
	if (chip->remap_addr)
		iounmap(chip->remap_addr);
L
Linus Torvalds 已提交
2904

T
Takashi Iwai 已提交
2905 2906
	if (chip->azx_dev) {
		for (i = 0; i < chip->num_streams; i++)
T
Takashi Iwai 已提交
2907 2908
			if (chip->azx_dev[i].bdl.area) {
				mark_pages_wc(chip, &chip->azx_dev[i].bdl, false);
T
Takashi Iwai 已提交
2909
				snd_dma_free_pages(&chip->azx_dev[i].bdl);
T
Takashi Iwai 已提交
2910
			}
T
Takashi Iwai 已提交
2911
	}
T
Takashi Iwai 已提交
2912 2913
	if (chip->rb.area) {
		mark_pages_wc(chip, &chip->rb, false);
L
Linus Torvalds 已提交
2914
		snd_dma_free_pages(&chip->rb);
T
Takashi Iwai 已提交
2915 2916 2917
	}
	if (chip->posbuf.area) {
		mark_pages_wc(chip, &chip->posbuf, false);
L
Linus Torvalds 已提交
2918
		snd_dma_free_pages(&chip->posbuf);
T
Takashi Iwai 已提交
2919
	}
2920 2921
	if (chip->region_requested)
		pci_release_regions(chip->pci);
L
Linus Torvalds 已提交
2922
	pci_disable_device(chip->pci);
2923
	kfree(chip->azx_dev);
2924 2925 2926 2927
#ifdef CONFIG_SND_HDA_PATCH_LOADER
	if (chip->fw)
		release_firmware(chip->fw);
#endif
L
Linus Torvalds 已提交
2928 2929 2930 2931 2932
	kfree(chip);

	return 0;
}

2933
static int azx_dev_free(struct snd_device *device)
L
Linus Torvalds 已提交
2934 2935 2936 2937
{
	return azx_free(device->device_data);
}

2938
#ifdef SUPPORT_VGA_SWITCHEROO
2939 2940 2941
/*
 * Check of disabled HDMI controller by vga-switcheroo
 */
2942
static struct pci_dev *get_bound_vga(struct pci_dev *pci)
2943 2944 2945 2946 2947 2948 2949 2950 2951 2952 2953 2954 2955 2956 2957 2958 2959 2960 2961 2962 2963 2964
{
	struct pci_dev *p;

	/* check only discrete GPU */
	switch (pci->vendor) {
	case PCI_VENDOR_ID_ATI:
	case PCI_VENDOR_ID_AMD:
	case PCI_VENDOR_ID_NVIDIA:
		if (pci->devfn == 1) {
			p = pci_get_domain_bus_and_slot(pci_domain_nr(pci->bus),
							pci->bus->number, 0);
			if (p) {
				if ((p->class >> 8) == PCI_CLASS_DISPLAY_VGA)
					return p;
				pci_dev_put(p);
			}
		}
		break;
	}
	return NULL;
}

2965
static bool check_hdmi_disabled(struct pci_dev *pci)
2966 2967 2968 2969 2970
{
	bool vga_inactive = false;
	struct pci_dev *p = get_bound_vga(pci);

	if (p) {
2971
		if (vga_switcheroo_get_client_state(p) == VGA_SWITCHEROO_OFF)
2972 2973 2974 2975 2976
			vga_inactive = true;
		pci_dev_put(p);
	}
	return vga_inactive;
}
2977
#endif /* SUPPORT_VGA_SWITCHEROO */
2978

2979 2980 2981
/*
 * white/black-listing for position_fix
 */
2982
static struct snd_pci_quirk position_fix_list[] = {
T
Takashi Iwai 已提交
2983 2984
	SND_PCI_QUIRK(0x1028, 0x01cc, "Dell D820", POS_FIX_LPIB),
	SND_PCI_QUIRK(0x1028, 0x01de, "Dell Precision 390", POS_FIX_LPIB),
2985
	SND_PCI_QUIRK(0x103c, 0x306d, "HP dv3", POS_FIX_LPIB),
T
Takashi Iwai 已提交
2986
	SND_PCI_QUIRK(0x1043, 0x813d, "ASUS P5AD2", POS_FIX_LPIB),
2987
	SND_PCI_QUIRK(0x1043, 0x81b3, "ASUS", POS_FIX_LPIB),
D
Daniel T Chen 已提交
2988
	SND_PCI_QUIRK(0x1043, 0x81e7, "ASUS M2V", POS_FIX_LPIB),
2989
	SND_PCI_QUIRK(0x104d, 0x9069, "Sony VPCS11V9E", POS_FIX_LPIB),
2990
	SND_PCI_QUIRK(0x10de, 0xcb89, "Macbook Pro 7,1", POS_FIX_LPIB),
2991
	SND_PCI_QUIRK(0x1297, 0x3166, "Shuttle", POS_FIX_LPIB),
2992
	SND_PCI_QUIRK(0x1458, 0xa022, "ga-ma770-ud3", POS_FIX_LPIB),
2993
	SND_PCI_QUIRK(0x1462, 0x1002, "MSI Wind U115", POS_FIX_LPIB),
2994
	SND_PCI_QUIRK(0x1565, 0x8218, "Biostar Microtech", POS_FIX_LPIB),
2995
	SND_PCI_QUIRK(0x1849, 0x0888, "775Dual-VSTA", POS_FIX_LPIB),
2996
	SND_PCI_QUIRK(0x8086, 0x2503, "DG965OT AAD63733-203", POS_FIX_LPIB),
2997 2998 2999
	{}
};

3000
static int check_position_fix(struct azx *chip, int fix)
3001 3002 3003
{
	const struct snd_pci_quirk *q;

3004
	switch (fix) {
3005
	case POS_FIX_AUTO:
3006 3007
	case POS_FIX_LPIB:
	case POS_FIX_POSBUF:
3008
	case POS_FIX_VIACOMBO:
3009
	case POS_FIX_COMBO:
3010 3011 3012 3013 3014 3015 3016 3017 3018 3019
		return fix;
	}

	q = snd_pci_quirk_lookup(chip->pci, position_fix_list);
	if (q) {
		printk(KERN_INFO
		       "hda_intel: position_fix set to %d "
		       "for device %04x:%04x\n",
		       q->value, q->subvendor, q->subdevice);
		return q->value;
3020
	}
3021 3022

	/* Check VIA/ATI HD Audio Controller exist */
3023
	if (chip->driver_caps & AZX_DCAPS_POSFIX_VIA) {
3024
		snd_printd(SFX "%s: Using VIACOMBO position fix\n", pci_name(chip->pci));
3025
		return POS_FIX_VIACOMBO;
3026 3027
	}
	if (chip->driver_caps & AZX_DCAPS_POSFIX_LPIB) {
3028
		snd_printd(SFX "%s: Using LPIB position fix\n", pci_name(chip->pci));
3029
		return POS_FIX_LPIB;
3030
	}
3031
	return POS_FIX_AUTO;
3032 3033
}

3034 3035 3036
/*
 * black-lists for probe_mask
 */
3037
static struct snd_pci_quirk probe_mask_list[] = {
3038 3039 3040 3041 3042 3043
	/* Thinkpad often breaks the controller communication when accessing
	 * to the non-working (or non-existing) modem codec slot.
	 */
	SND_PCI_QUIRK(0x1014, 0x05b7, "Thinkpad Z60", 0x01),
	SND_PCI_QUIRK(0x17aa, 0x2010, "Thinkpad X/T/R60", 0x01),
	SND_PCI_QUIRK(0x17aa, 0x20ac, "Thinkpad X/T/R61", 0x01),
3044 3045
	/* broken BIOS */
	SND_PCI_QUIRK(0x1028, 0x20ac, "Dell Studio Desktop", 0x01),
3046 3047
	/* including bogus ALC268 in slot#2 that conflicts with ALC888 */
	SND_PCI_QUIRK(0x17c0, 0x4085, "Medion MD96630", 0x01),
3048
	/* forced codec slots */
3049
	SND_PCI_QUIRK(0x1043, 0x1262, "ASUS W5Fm", 0x103),
3050
	SND_PCI_QUIRK(0x1046, 0x1262, "ASUS W5F", 0x103),
3051 3052
	/* WinFast VP200 H (Teradici) user reported broken communication */
	SND_PCI_QUIRK(0x3a21, 0x040d, "WinFast VP200 H", 0x101),
3053 3054 3055
	{}
};

3056 3057
#define AZX_FORCE_CODEC_MASK	0x100

3058
static void check_probe_mask(struct azx *chip, int dev)
3059 3060 3061
{
	const struct snd_pci_quirk *q;

3062 3063
	chip->codec_probe_mask = probe_mask[dev];
	if (chip->codec_probe_mask == -1) {
3064 3065 3066 3067 3068 3069
		q = snd_pci_quirk_lookup(chip->pci, probe_mask_list);
		if (q) {
			printk(KERN_INFO
			       "hda_intel: probe_mask set to 0x%x "
			       "for device %04x:%04x\n",
			       q->value, q->subvendor, q->subdevice);
3070
			chip->codec_probe_mask = q->value;
3071 3072
		}
	}
3073 3074 3075 3076 3077 3078 3079 3080

	/* check forced option */
	if (chip->codec_probe_mask != -1 &&
	    (chip->codec_probe_mask & AZX_FORCE_CODEC_MASK)) {
		chip->codec_mask = chip->codec_probe_mask & 0xff;
		printk(KERN_INFO "hda_intel: codec_mask forced to 0x%x\n",
		       chip->codec_mask);
	}
3081 3082
}

3083
/*
T
Takashi Iwai 已提交
3084
 * white/black-list for enable_msi
3085
 */
3086
static struct snd_pci_quirk msi_black_list[] = {
T
Takashi Iwai 已提交
3087
	SND_PCI_QUIRK(0x1043, 0x81f2, "ASUS", 0), /* Athlon64 X2 + nvidia */
3088
	SND_PCI_QUIRK(0x1043, 0x81f6, "ASUS", 0), /* nvidia */
3089
	SND_PCI_QUIRK(0x1043, 0x822d, "ASUS", 0), /* Athlon64 X2 + nvidia MCP55 */
3090
	SND_PCI_QUIRK(0x1849, 0x0888, "ASRock", 0), /* Athlon64 X2 + nvidia */
3091
	SND_PCI_QUIRK(0xa0a0, 0x0575, "Aopen MZ915-M", 0), /* ICH6 */
3092 3093 3094
	{}
};

3095
static void check_msi(struct azx *chip)
3096 3097 3098
{
	const struct snd_pci_quirk *q;

T
Takashi Iwai 已提交
3099 3100
	if (enable_msi >= 0) {
		chip->msi = !!enable_msi;
3101
		return;
T
Takashi Iwai 已提交
3102 3103 3104
	}
	chip->msi = 1;	/* enable MSI as default */
	q = snd_pci_quirk_lookup(chip->pci, msi_black_list);
3105 3106 3107 3108 3109
	if (q) {
		printk(KERN_INFO
		       "hda_intel: msi for device %04x:%04x set to %d\n",
		       q->subvendor, q->subdevice, q->value);
		chip->msi = q->value;
3110 3111 3112 3113
		return;
	}

	/* NVidia chipsets seem to cause troubles with MSI */
3114 3115
	if (chip->driver_caps & AZX_DCAPS_NO_MSI) {
		printk(KERN_INFO "hda_intel: Disabling MSI\n");
3116
		chip->msi = 0;
3117 3118 3119
	}
}

3120
/* check the snoop mode availability */
3121
static void azx_check_snoop_available(struct azx *chip)
3122 3123 3124 3125 3126 3127 3128 3129 3130 3131 3132 3133 3134 3135 3136 3137 3138 3139 3140 3141 3142 3143
{
	bool snoop = chip->snoop;

	switch (chip->driver_type) {
	case AZX_DRIVER_VIA:
		/* force to non-snoop mode for a new VIA controller
		 * when BIOS is set
		 */
		if (snoop) {
			u8 val;
			pci_read_config_byte(chip->pci, 0x42, &val);
			if (!(val & 0x80) && chip->pci->revision == 0x30)
				snoop = false;
		}
		break;
	case AZX_DRIVER_ATIHDMI_NS:
		/* new ATI HDMI requires non-snoop */
		snoop = false;
		break;
	}

	if (snoop != chip->snoop) {
3144 3145
		snd_printk(KERN_INFO SFX "%s: Force to %s mode\n",
			   pci_name(chip->pci), snoop ? "snoop" : "non-snoop");
3146 3147 3148
		chip->snoop = snoop;
	}
}
3149

L
Linus Torvalds 已提交
3150 3151 3152
/*
 * constructor
 */
3153 3154 3155
static int azx_create(struct snd_card *card, struct pci_dev *pci,
		      int dev, unsigned int driver_caps,
		      struct azx **rchip)
L
Linus Torvalds 已提交
3156
{
3157
	static struct snd_device_ops ops = {
L
Linus Torvalds 已提交
3158 3159
		.dev_free = azx_dev_free,
	};
3160 3161
	struct azx *chip;
	int err;
L
Linus Torvalds 已提交
3162 3163

	*rchip = NULL;
3164

3165 3166
	err = pci_enable_device(pci);
	if (err < 0)
L
Linus Torvalds 已提交
3167 3168
		return err;

3169
	chip = kzalloc(sizeof(*chip), GFP_KERNEL);
3170
	if (!chip) {
3171
		snd_printk(KERN_ERR SFX "%s: Cannot allocate chip\n", pci_name(pci));
L
Linus Torvalds 已提交
3172 3173 3174 3175 3176
		pci_disable_device(pci);
		return -ENOMEM;
	}

	spin_lock_init(&chip->reg_lock);
3177
	mutex_init(&chip->open_mutex);
L
Linus Torvalds 已提交
3178 3179 3180
	chip->card = card;
	chip->pci = pci;
	chip->irq = -1;
3181 3182
	chip->driver_caps = driver_caps;
	chip->driver_type = driver_caps & 0xff;
3183
	check_msi(chip);
3184
	chip->dev_index = dev;
3185
	INIT_WORK(&chip->irq_pending_work, azx_irq_pending_work);
3186
	INIT_LIST_HEAD(&chip->pcm_list);
3187
	INIT_LIST_HEAD(&chip->list);
3188
	init_vga_switcheroo(chip);
3189
	init_completion(&chip->probe_wait);
L
Linus Torvalds 已提交
3190

3191 3192
	chip->position_fix[0] = chip->position_fix[1] =
		check_position_fix(chip, position_fix[dev]);
3193 3194 3195 3196 3197 3198
	/* combo mode uses LPIB for playback */
	if (chip->position_fix[0] == POS_FIX_COMBO) {
		chip->position_fix[0] = POS_FIX_LPIB;
		chip->position_fix[1] = POS_FIX_AUTO;
	}

3199
	check_probe_mask(chip, dev);
3200

3201
	chip->single_cmd = single_cmd;
T
Takashi Iwai 已提交
3202
	chip->snoop = hda_snoop;
3203
	azx_check_snoop_available(chip);
3204

3205 3206
	if (bdl_pos_adj[dev] < 0) {
		switch (chip->driver_type) {
3207
		case AZX_DRIVER_ICH:
3208
		case AZX_DRIVER_PCH:
3209
			bdl_pos_adj[dev] = 1;
3210 3211
			break;
		default:
3212
			bdl_pos_adj[dev] = 32;
3213 3214 3215 3216
			break;
		}
	}

3217 3218
	err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops);
	if (err < 0) {
3219 3220
		snd_printk(KERN_ERR SFX "%s: Error creating device [card]!\n",
		   pci_name(chip->pci));
3221 3222 3223 3224 3225 3226 3227 3228
		azx_free(chip);
		return err;
	}

	*rchip = chip;
	return 0;
}

3229
static int azx_first_init(struct azx *chip)
3230 3231 3232 3233 3234 3235 3236
{
	int dev = chip->dev_index;
	struct pci_dev *pci = chip->pci;
	struct snd_card *card = chip->card;
	int i, err;
	unsigned short gcap;

3237 3238 3239 3240 3241 3242 3243 3244 3245 3246
#if BITS_PER_LONG != 64
	/* Fix up base address on ULI M5461 */
	if (chip->driver_type == AZX_DRIVER_ULI) {
		u16 tmp3;
		pci_read_config_word(pci, 0x40, &tmp3);
		pci_write_config_word(pci, 0x40, tmp3 | 0x10);
		pci_write_config_dword(pci, PCI_BASE_ADDRESS_1, 0);
	}
#endif

3247
	err = pci_request_regions(pci, "ICH HD audio");
3248
	if (err < 0)
L
Linus Torvalds 已提交
3249
		return err;
3250
	chip->region_requested = 1;
L
Linus Torvalds 已提交
3251

3252
	chip->addr = pci_resource_start(pci, 0);
3253
	chip->remap_addr = pci_ioremap_bar(pci, 0);
L
Linus Torvalds 已提交
3254
	if (chip->remap_addr == NULL) {
3255
		snd_printk(KERN_ERR SFX "%s: ioremap error\n", pci_name(chip->pci));
3256
		return -ENXIO;
L
Linus Torvalds 已提交
3257 3258
	}

3259 3260 3261
	if (chip->msi)
		if (pci_enable_msi(pci) < 0)
			chip->msi = 0;
3262

3263 3264
	if (azx_acquire_irq(chip, 0) < 0)
		return -EBUSY;
L
Linus Torvalds 已提交
3265 3266 3267 3268

	pci_set_master(pci);
	synchronize_irq(chip->irq);

3269
	gcap = azx_readw(chip, GCAP);
3270
	snd_printdd(SFX "%s: chipset global capabilities = 0x%x\n", pci_name(chip->pci), gcap);
3271

3272
	/* disable SB600 64bit support for safety */
3273
	if (chip->pci->vendor == PCI_VENDOR_ID_ATI) {
3274 3275 3276 3277 3278 3279 3280 3281 3282 3283
		struct pci_dev *p_smbus;
		p_smbus = pci_get_device(PCI_VENDOR_ID_ATI,
					 PCI_DEVICE_ID_ATI_SBX00_SMBUS,
					 NULL);
		if (p_smbus) {
			if (p_smbus->revision < 0x30)
				gcap &= ~ICH6_GCAP_64OK;
			pci_dev_put(p_smbus);
		}
	}
3284

3285 3286
	/* disable 64bit DMA address on some devices */
	if (chip->driver_caps & AZX_DCAPS_NO_64BIT) {
3287
		snd_printd(SFX "%s: Disabling 64bit DMA\n", pci_name(chip->pci));
3288
		gcap &= ~ICH6_GCAP_64OK;
3289
	}
3290

3291
	/* disable buffer size rounding to 128-byte multiples if supported */
3292 3293 3294 3295 3296 3297 3298 3299 3300 3301
	if (align_buffer_size >= 0)
		chip->align_buffer_size = !!align_buffer_size;
	else {
		if (chip->driver_caps & AZX_DCAPS_BUFSIZE)
			chip->align_buffer_size = 0;
		else if (chip->driver_caps & AZX_DCAPS_ALIGN_BUFSIZE)
			chip->align_buffer_size = 1;
		else
			chip->align_buffer_size = 1;
	}
3302

3303
	/* allow 64bit DMA address if supported by H/W */
3304
	if ((gcap & ICH6_GCAP_64OK) && !pci_set_dma_mask(pci, DMA_BIT_MASK(64)))
3305
		pci_set_consistent_dma_mask(pci, DMA_BIT_MASK(64));
3306
	else {
3307 3308
		pci_set_dma_mask(pci, DMA_BIT_MASK(32));
		pci_set_consistent_dma_mask(pci, DMA_BIT_MASK(32));
3309
	}
3310

3311 3312 3313 3314 3315 3316
	/* read number of streams from GCAP register instead of using
	 * hardcoded value
	 */
	chip->capture_streams = (gcap >> 8) & 0x0f;
	chip->playback_streams = (gcap >> 12) & 0x0f;
	if (!chip->playback_streams && !chip->capture_streams) {
3317 3318 3319 3320 3321 3322 3323 3324
		/* gcap didn't give any info, switching to old method */

		switch (chip->driver_type) {
		case AZX_DRIVER_ULI:
			chip->playback_streams = ULI_NUM_PLAYBACK;
			chip->capture_streams = ULI_NUM_CAPTURE;
			break;
		case AZX_DRIVER_ATIHDMI:
3325
		case AZX_DRIVER_ATIHDMI_NS:
3326 3327 3328
			chip->playback_streams = ATIHDMI_NUM_PLAYBACK;
			chip->capture_streams = ATIHDMI_NUM_CAPTURE;
			break;
3329
		case AZX_DRIVER_GENERIC:
3330 3331 3332 3333 3334
		default:
			chip->playback_streams = ICH6_NUM_PLAYBACK;
			chip->capture_streams = ICH6_NUM_CAPTURE;
			break;
		}
3335
	}
3336 3337
	chip->capture_index_offset = 0;
	chip->playback_index_offset = chip->capture_streams;
3338
	chip->num_streams = chip->playback_streams + chip->capture_streams;
3339 3340
	chip->azx_dev = kcalloc(chip->num_streams, sizeof(*chip->azx_dev),
				GFP_KERNEL);
3341
	if (!chip->azx_dev) {
3342
		snd_printk(KERN_ERR SFX "%s: cannot malloc azx_dev\n", pci_name(chip->pci));
3343
		return -ENOMEM;
3344 3345
	}

T
Takashi Iwai 已提交
3346 3347 3348 3349 3350 3351
	for (i = 0; i < chip->num_streams; i++) {
		/* allocate memory for the BDL for each stream */
		err = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV,
					  snd_dma_pci_data(chip->pci),
					  BDL_SIZE, &chip->azx_dev[i].bdl);
		if (err < 0) {
3352
			snd_printk(KERN_ERR SFX "%s: cannot allocate BDL\n", pci_name(chip->pci));
3353
			return -ENOMEM;
T
Takashi Iwai 已提交
3354
		}
T
Takashi Iwai 已提交
3355
		mark_pages_wc(chip, &chip->azx_dev[i].bdl, true);
L
Linus Torvalds 已提交
3356
	}
3357
	/* allocate memory for the position buffer */
3358 3359 3360 3361
	err = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV,
				  snd_dma_pci_data(chip->pci),
				  chip->num_streams * 8, &chip->posbuf);
	if (err < 0) {
3362
		snd_printk(KERN_ERR SFX "%s: cannot allocate posbuf\n", pci_name(chip->pci));
3363
		return -ENOMEM;
L
Linus Torvalds 已提交
3364
	}
T
Takashi Iwai 已提交
3365
	mark_pages_wc(chip, &chip->posbuf, true);
L
Linus Torvalds 已提交
3366
	/* allocate CORB/RIRB */
3367 3368
	err = azx_alloc_cmd_io(chip);
	if (err < 0)
3369
		return err;
L
Linus Torvalds 已提交
3370 3371 3372 3373 3374

	/* initialize streams */
	azx_init_stream(chip);

	/* initialize chip */
3375
	azx_init_pci(chip);
3376
	azx_init_chip(chip, (probe_only[dev] & 2) == 0);
L
Linus Torvalds 已提交
3377 3378

	/* codec detection */
3379
	if (!chip->codec_mask) {
3380
		snd_printk(KERN_ERR SFX "%s: no codecs found!\n", pci_name(chip->pci));
3381
		return -ENODEV;
L
Linus Torvalds 已提交
3382 3383
	}

3384
	strcpy(card->driver, "HDA-Intel");
T
Takashi Iwai 已提交
3385 3386 3387 3388 3389
	strlcpy(card->shortname, driver_short_names[chip->driver_type],
		sizeof(card->shortname));
	snprintf(card->longname, sizeof(card->longname),
		 "%s at 0x%lx irq %i",
		 card->shortname, chip->addr, chip->irq);
3390

L
Linus Torvalds 已提交
3391 3392 3393
	return 0;
}

3394 3395
static void power_down_all_codecs(struct azx *chip)
{
3396
#ifdef CONFIG_PM
3397 3398 3399 3400 3401 3402 3403 3404 3405 3406
	/* The codecs were powered up in snd_hda_codec_new().
	 * Now all initialization done, so turn them down if possible
	 */
	struct hda_codec *codec;
	list_for_each_entry(codec, &chip->bus->codec_list, list) {
		snd_hda_power_down(codec);
	}
#endif
}

3407
#ifdef CONFIG_SND_HDA_PATCH_LOADER
3408 3409 3410 3411 3412 3413 3414 3415
/* callback from request_firmware_nowait() */
static void azx_firmware_cb(const struct firmware *fw, void *context)
{
	struct snd_card *card = context;
	struct azx *chip = card->private_data;
	struct pci_dev *pci = chip->pci;

	if (!fw) {
3416 3417
		snd_printk(KERN_ERR SFX "%s: Cannot load firmware, aborting\n",
			   pci_name(chip->pci));
3418 3419 3420 3421 3422 3423 3424 3425 3426 3427 3428 3429 3430 3431 3432
		goto error;
	}

	chip->fw = fw;
	if (!chip->disabled) {
		/* continue probing */
		if (azx_probe_continue(chip))
			goto error;
	}
	return; /* OK */

 error:
	snd_card_free(card);
	pci_set_drvdata(pci, NULL);
}
3433
#endif
3434

3435 3436
static int azx_probe(struct pci_dev *pci,
		     const struct pci_device_id *pci_id)
L
Linus Torvalds 已提交
3437
{
3438
	static int dev;
3439 3440
	struct snd_card *card;
	struct azx *chip;
3441
	bool probe_now;
3442
	int err;
L
Linus Torvalds 已提交
3443

3444 3445 3446 3447 3448 3449 3450
	if (dev >= SNDRV_CARDS)
		return -ENODEV;
	if (!enable[dev]) {
		dev++;
		return -ENOENT;
	}

3451 3452
	err = snd_card_create(index[dev], id[dev], THIS_MODULE, 0, &card);
	if (err < 0) {
3453
		snd_printk(KERN_ERR "hda-intel: Error creating card!\n");
3454
		return err;
L
Linus Torvalds 已提交
3455 3456
	}

3457 3458
	snd_card_set_dev(card, &pci->dev);

3459
	err = azx_create(card, pci, dev, pci_id->driver_data, &chip);
W
Wu Fengguang 已提交
3460 3461
	if (err < 0)
		goto out_free;
T
Takashi Iwai 已提交
3462
	card->private_data = chip;
3463 3464 3465 3466 3467 3468

	pci_set_drvdata(pci, card);

	err = register_vga_switcheroo(chip);
	if (err < 0) {
		snd_printk(KERN_ERR SFX
3469
			   "%s: Error registering VGA-switcheroo client\n", pci_name(pci));
3470 3471 3472 3473
		goto out_free;
	}

	if (check_hdmi_disabled(pci)) {
3474
		snd_printk(KERN_INFO SFX "%s: VGA controller is disabled\n",
3475
			   pci_name(pci));
3476
		snd_printk(KERN_INFO SFX "%s: Delaying initialization\n", pci_name(pci));
3477 3478 3479
		chip->disabled = true;
	}

3480
	probe_now = !chip->disabled;
3481 3482 3483 3484 3485
	if (probe_now) {
		err = azx_first_init(chip);
		if (err < 0)
			goto out_free;
	}
L
Linus Torvalds 已提交
3486

3487 3488
#ifdef CONFIG_SND_HDA_PATCH_LOADER
	if (patch[dev] && *patch[dev]) {
3489 3490
		snd_printk(KERN_ERR SFX "%s: Applying patch firmware '%s'\n",
			   pci_name(pci), patch[dev]);
3491 3492 3493
		err = request_firmware_nowait(THIS_MODULE, true, patch[dev],
					      &pci->dev, GFP_KERNEL, card,
					      azx_firmware_cb);
3494 3495
		if (err < 0)
			goto out_free;
3496
		probe_now = false; /* continued in azx_firmware_cb() */
3497 3498 3499
	}
#endif /* CONFIG_SND_HDA_PATCH_LOADER */

3500
	if (probe_now) {
3501 3502 3503 3504 3505
		err = azx_probe_continue(chip);
		if (err < 0)
			goto out_free;
	}

3506 3507 3508
	if (pci_dev_run_wake(pci))
		pm_runtime_put_noidle(&pci->dev);

3509
	dev++;
3510
	complete_all(&chip->probe_wait);
3511 3512 3513 3514
	return 0;

out_free:
	snd_card_free(card);
3515
	pci_set_drvdata(pci, NULL);
3516 3517 3518
	return err;
}

3519
static int azx_probe_continue(struct azx *chip)
3520 3521 3522 3523
{
	int dev = chip->dev_index;
	int err;

3524 3525 3526 3527
#ifdef CONFIG_SND_HDA_INPUT_BEEP
	chip->beep_mode = beep_mode[dev];
#endif

L
Linus Torvalds 已提交
3528
	/* create codec instances */
3529
	err = azx_codec_create(chip, model[dev]);
W
Wu Fengguang 已提交
3530 3531
	if (err < 0)
		goto out_free;
3532
#ifdef CONFIG_SND_HDA_PATCH_LOADER
3533 3534 3535
	if (chip->fw) {
		err = snd_hda_load_patch(chip->bus, chip->fw->size,
					 chip->fw->data);
3536 3537
		if (err < 0)
			goto out_free;
3538
#ifndef CONFIG_PM
3539 3540
		release_firmware(chip->fw); /* no longer needed */
		chip->fw = NULL;
3541
#endif
3542 3543
	}
#endif
3544
	if ((probe_only[dev] & 1) == 0) {
3545 3546 3547 3548
		err = azx_codec_configure(chip);
		if (err < 0)
			goto out_free;
	}
L
Linus Torvalds 已提交
3549 3550

	/* create PCM streams */
3551
	err = snd_hda_build_pcms(chip->bus);
W
Wu Fengguang 已提交
3552 3553
	if (err < 0)
		goto out_free;
L
Linus Torvalds 已提交
3554 3555

	/* create mixer controls */
3556
	err = azx_mixer_create(chip);
W
Wu Fengguang 已提交
3557 3558
	if (err < 0)
		goto out_free;
L
Linus Torvalds 已提交
3559

3560
	err = snd_card_register(chip->card);
W
Wu Fengguang 已提交
3561 3562
	if (err < 0)
		goto out_free;
L
Linus Torvalds 已提交
3563

3564 3565
	chip->running = 1;
	power_down_all_codecs(chip);
T
Takashi Iwai 已提交
3566
	azx_notifier_register(chip);
3567
	azx_add_card_list(chip);
L
Linus Torvalds 已提交
3568

3569 3570
	return 0;

W
Wu Fengguang 已提交
3571
out_free:
3572
	chip->init_failed = 1;
W
Wu Fengguang 已提交
3573
	return err;
L
Linus Torvalds 已提交
3574 3575
}

3576
static void azx_remove(struct pci_dev *pci)
L
Linus Torvalds 已提交
3577
{
3578
	struct snd_card *card = pci_get_drvdata(pci);
3579 3580 3581 3582

	if (pci_dev_run_wake(pci))
		pm_runtime_get_noresume(&pci->dev);

3583 3584
	if (card)
		snd_card_free(card);
L
Linus Torvalds 已提交
3585 3586 3587 3588
	pci_set_drvdata(pci, NULL);
}

/* PCI IDs */
3589
static DEFINE_PCI_DEVICE_TABLE(azx_ids) = {
3590
	/* CPT */
3591
	{ PCI_DEVICE(0x8086, 0x1c20),
3592
	  .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH_NOPM },
3593
	/* PBG */
3594
	{ PCI_DEVICE(0x8086, 0x1d20),
3595
	  .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH_NOPM },
3596
	/* Panther Point */
3597
	{ PCI_DEVICE(0x8086, 0x1e20),
3598
	  .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH_NOPM },
3599 3600
	/* Lynx Point */
	{ PCI_DEVICE(0x8086, 0x8c20),
3601
	  .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
3602 3603
	/* Lynx Point-LP */
	{ PCI_DEVICE(0x8086, 0x9c20),
3604
	  .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
3605 3606
	/* Lynx Point-LP */
	{ PCI_DEVICE(0x8086, 0x9c21),
3607
	  .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
3608 3609
	/* Haswell */
	{ PCI_DEVICE(0x8086, 0x0c0c),
3610
	  .driver_data = AZX_DRIVER_SCH | AZX_DCAPS_INTEL_PCH },
3611
	{ PCI_DEVICE(0x8086, 0x0d0c),
3612
	  .driver_data = AZX_DRIVER_SCH | AZX_DCAPS_INTEL_PCH },
3613 3614
	/* 5 Series/3400 */
	{ PCI_DEVICE(0x8086, 0x3b56),
3615
	  .driver_data = AZX_DRIVER_SCH | AZX_DCAPS_INTEL_PCH },
3616
	/* Poulsbo */
3617
	{ PCI_DEVICE(0x8086, 0x811b),
3618 3619
	  .driver_data = AZX_DRIVER_SCH | AZX_DCAPS_INTEL_PCH_NOPM },
	/* Oaktrail */
3620
	{ PCI_DEVICE(0x8086, 0x080a),
3621
	  .driver_data = AZX_DRIVER_SCH | AZX_DCAPS_INTEL_PCH_NOPM },
3622
	/* ICH */
3623
	{ PCI_DEVICE(0x8086, 0x2668),
3624 3625
	  .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_OLD_SSYNC |
	  AZX_DCAPS_BUFSIZE },  /* ICH6 */
3626
	{ PCI_DEVICE(0x8086, 0x27d8),
3627 3628
	  .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_OLD_SSYNC |
	  AZX_DCAPS_BUFSIZE },  /* ICH7 */
3629
	{ PCI_DEVICE(0x8086, 0x269a),
3630 3631
	  .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_OLD_SSYNC |
	  AZX_DCAPS_BUFSIZE },  /* ESB2 */
3632
	{ PCI_DEVICE(0x8086, 0x284b),
3633 3634
	  .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_OLD_SSYNC |
	  AZX_DCAPS_BUFSIZE },  /* ICH8 */
3635
	{ PCI_DEVICE(0x8086, 0x293e),
3636 3637
	  .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_OLD_SSYNC |
	  AZX_DCAPS_BUFSIZE },  /* ICH9 */
3638
	{ PCI_DEVICE(0x8086, 0x293f),
3639 3640
	  .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_OLD_SSYNC |
	  AZX_DCAPS_BUFSIZE },  /* ICH9 */
3641
	{ PCI_DEVICE(0x8086, 0x3a3e),
3642 3643
	  .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_OLD_SSYNC |
	  AZX_DCAPS_BUFSIZE },  /* ICH10 */
3644
	{ PCI_DEVICE(0x8086, 0x3a6e),
3645 3646
	  .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_OLD_SSYNC |
	  AZX_DCAPS_BUFSIZE },  /* ICH10 */
3647 3648 3649 3650
	/* Generic Intel */
	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_ANY_ID),
	  .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
	  .class_mask = 0xffffff,
3651
	  .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_BUFSIZE },
3652 3653 3654 3655 3656 3657 3658 3659
	/* ATI SB 450/600/700/800/900 */
	{ PCI_DEVICE(0x1002, 0x437b),
	  .driver_data = AZX_DRIVER_ATI | AZX_DCAPS_PRESET_ATI_SB },
	{ PCI_DEVICE(0x1002, 0x4383),
	  .driver_data = AZX_DRIVER_ATI | AZX_DCAPS_PRESET_ATI_SB },
	/* AMD Hudson */
	{ PCI_DEVICE(0x1022, 0x780d),
	  .driver_data = AZX_DRIVER_GENERIC | AZX_DCAPS_PRESET_ATI_SB },
3660
	/* ATI HDMI */
3661 3662 3663 3664 3665 3666 3667 3668 3669 3670 3671 3672 3673 3674 3675 3676 3677 3678 3679 3680 3681 3682 3683 3684 3685 3686 3687 3688
	{ PCI_DEVICE(0x1002, 0x793b),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0x7919),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0x960f),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0x970f),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0xaa00),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0xaa08),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0xaa10),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0xaa18),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0xaa20),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0xaa28),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0xaa30),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0xaa38),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0xaa40),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0xaa48),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
3689 3690 3691 3692 3693 3694 3695 3696
	{ PCI_DEVICE(0x1002, 0x9902),
	  .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0xaaa0),
	  .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0xaaa8),
	  .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0xaab0),
	  .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI },
3697
	/* VIA VT8251/VT8237A */
3698 3699
	{ PCI_DEVICE(0x1106, 0x3288),
	  .driver_data = AZX_DRIVER_VIA | AZX_DCAPS_POSFIX_VIA },
3700 3701 3702 3703
	/* VIA GFX VT7122/VX900 */
	{ PCI_DEVICE(0x1106, 0x9170), .driver_data = AZX_DRIVER_GENERIC },
	/* VIA GFX VT6122/VX11 */
	{ PCI_DEVICE(0x1106, 0x9140), .driver_data = AZX_DRIVER_GENERIC },
3704 3705 3706 3707 3708
	/* SIS966 */
	{ PCI_DEVICE(0x1039, 0x7502), .driver_data = AZX_DRIVER_SIS },
	/* ULI M5461 */
	{ PCI_DEVICE(0x10b9, 0x5461), .driver_data = AZX_DRIVER_ULI },
	/* NVIDIA MCP */
3709 3710 3711
	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
	  .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
	  .class_mask = 0xffffff,
3712
	  .driver_data = AZX_DRIVER_NVIDIA | AZX_DCAPS_PRESET_NVIDIA },
3713
	/* Teradici */
3714 3715
	{ PCI_DEVICE(0x6549, 0x1200),
	  .driver_data = AZX_DRIVER_TERA | AZX_DCAPS_NO_64BIT },
3716 3717
	{ PCI_DEVICE(0x6549, 0x2200),
	  .driver_data = AZX_DRIVER_TERA | AZX_DCAPS_NO_64BIT },
3718
	/* Creative X-Fi (CA0110-IBG) */
3719 3720 3721 3722 3723
	/* CTHDA chips */
	{ PCI_DEVICE(0x1102, 0x0010),
	  .driver_data = AZX_DRIVER_CTHDA | AZX_DCAPS_PRESET_CTHDA },
	{ PCI_DEVICE(0x1102, 0x0012),
	  .driver_data = AZX_DRIVER_CTHDA | AZX_DCAPS_PRESET_CTHDA },
3724 3725 3726 3727 3728
#if !defined(CONFIG_SND_CTXFI) && !defined(CONFIG_SND_CTXFI_MODULE)
	/* the following entry conflicts with snd-ctxfi driver,
	 * as ctxfi driver mutates from HD-audio to native mode with
	 * a special command sequence.
	 */
3729 3730 3731
	{ PCI_DEVICE(PCI_VENDOR_ID_CREATIVE, PCI_ANY_ID),
	  .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
	  .class_mask = 0xffffff,
3732
	  .driver_data = AZX_DRIVER_CTX | AZX_DCAPS_CTX_WORKAROUND |
3733
	  AZX_DCAPS_RIRB_PRE_DELAY | AZX_DCAPS_POSFIX_LPIB },
3734 3735
#else
	/* this entry seems still valid -- i.e. without emu20kx chip */
3736 3737
	{ PCI_DEVICE(0x1102, 0x0009),
	  .driver_data = AZX_DRIVER_CTX | AZX_DCAPS_CTX_WORKAROUND |
3738
	  AZX_DCAPS_RIRB_PRE_DELAY | AZX_DCAPS_POSFIX_LPIB },
3739
#endif
3740 3741
	/* Vortex86MX */
	{ PCI_DEVICE(0x17f3, 0x3010), .driver_data = AZX_DRIVER_GENERIC },
3742 3743
	/* VMware HDAudio */
	{ PCI_DEVICE(0x15ad, 0x1977), .driver_data = AZX_DRIVER_GENERIC },
3744
	/* AMD/ATI Generic, PCI class code and Vendor ID for HD Audio */
3745 3746 3747
	{ PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_ANY_ID),
	  .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
	  .class_mask = 0xffffff,
3748
	  .driver_data = AZX_DRIVER_GENERIC | AZX_DCAPS_PRESET_ATI_HDMI },
3749 3750 3751
	{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_ANY_ID),
	  .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
	  .class_mask = 0xffffff,
3752
	  .driver_data = AZX_DRIVER_GENERIC | AZX_DCAPS_PRESET_ATI_HDMI },
L
Linus Torvalds 已提交
3753 3754 3755 3756 3757
	{ 0, }
};
MODULE_DEVICE_TABLE(pci, azx_ids);

/* pci_driver definition */
3758
static struct pci_driver azx_driver = {
3759
	.name = KBUILD_MODNAME,
L
Linus Torvalds 已提交
3760 3761
	.id_table = azx_ids,
	.probe = azx_probe,
3762
	.remove = azx_remove,
3763 3764 3765
	.driver = {
		.pm = AZX_PM_OPS,
	},
L
Linus Torvalds 已提交
3766 3767
};

3768
module_pci_driver(azx_driver);