processor_idle.c 32.3 KB
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/*
 * processor_idle - idle state submodule to the ACPI processor driver
 *
 *  Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
 *  Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
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 *  Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de>
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 *  Copyright (C) 2004  Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
 *  			- Added processor hotplug support
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 *  Copyright (C) 2005  Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
 *  			- Added support for C3 on SMP
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 *
 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
 *  the Free Software Foundation; either version 2 of the License, or (at
 *  your option) any later version.
 *
 *  This program is distributed in the hope that it will be useful, but
 *  WITHOUT ANY WARRANTY; without even the implied warranty of
 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 *  General Public License for more details.
 *
 *  You should have received a copy of the GNU General Public License along
 *  with this program; if not, write to the Free Software Foundation, Inc.,
 *  59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
 *
 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 */

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/cpufreq.h>
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#include <linux/slab.h>
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#include <linux/acpi.h>
#include <linux/dmi.h>
#include <linux/moduleparam.h>
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#include <linux/sched.h>	/* need_resched() */
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#include <linux/pm_qos.h>
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#include <linux/clockchips.h>
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#include <linux/cpuidle.h>
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#include <linux/irqflags.h>
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/*
 * Include the apic definitions for x86 to have the APIC timer related defines
 * available also for UP (on SMP it gets magically included via linux/smp.h).
 * asm/acpi.h is not an option, as it would require more include magic. Also
 * creating an empty asm-ia64/apic.h would just trade pest vs. cholera.
 */
#ifdef CONFIG_X86
#include <asm/apic.h>
#endif

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#include <asm/io.h>
#include <asm/uaccess.h>

#include <acpi/acpi_bus.h>
#include <acpi/processor.h>
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#include <asm/processor.h>
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#define PREFIX "ACPI: "

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#define ACPI_PROCESSOR_CLASS            "processor"
#define _COMPONENT              ACPI_PROCESSOR_COMPONENT
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ACPI_MODULE_NAME("processor_idle");
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#define PM_TIMER_TICK_NS		(1000000000ULL/PM_TIMER_FREQUENCY)
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#define C2_OVERHEAD			1	/* 1us */
#define C3_OVERHEAD			1	/* 1us */
#define PM_TIMER_TICKS_TO_US(p)		(((p) * 1000)/(PM_TIMER_FREQUENCY/1000))
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static unsigned int max_cstate __read_mostly = ACPI_PROCESSOR_MAX_POWER;
module_param(max_cstate, uint, 0000);
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static unsigned int nocst __read_mostly;
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module_param(nocst, uint, 0000);
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static int bm_check_disable __read_mostly;
module_param(bm_check_disable, uint, 0000);
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static unsigned int latency_factor __read_mostly = 2;
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module_param(latency_factor, uint, 0644);
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static int disabled_by_idle_boot_param(void)
{
	return boot_option_idle_override == IDLE_POLL ||
		boot_option_idle_override == IDLE_FORCE_MWAIT ||
		boot_option_idle_override == IDLE_HALT;
}

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/*
 * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3.
 * For now disable this. Probably a bug somewhere else.
 *
 * To skip this limit, boot/load with a large max_cstate limit.
 */
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static int set_max_cstate(const struct dmi_system_id *id)
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{
	if (max_cstate > ACPI_PROCESSOR_MAX_POWER)
		return 0;

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	printk(KERN_NOTICE PREFIX "%s detected - limiting to C%ld max_cstate."
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	       " Override with \"processor.max_cstate=%d\"\n", id->ident,
	       (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1);
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	max_cstate = (long)id->driver_data;
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	return 0;
}

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/* Actually this shouldn't be __cpuinitdata, would be better to fix the
   callers to only run once -AK */
static struct dmi_system_id __cpuinitdata processor_power_dmi_table[] = {
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	{ set_max_cstate, "Clevo 5600D", {
	  DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
	  DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")},
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	 (void *)2},
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	{ set_max_cstate, "Pavilion zv5000", {
	  DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
	  DMI_MATCH(DMI_PRODUCT_NAME,"Pavilion zv5000 (DS502A#ABA)")},
	 (void *)1},
	{ set_max_cstate, "Asus L8400B", {
	  DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."),
	  DMI_MATCH(DMI_PRODUCT_NAME,"L8400B series Notebook PC")},
	 (void *)1},
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	{},
};

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/*
 * Callers should disable interrupts before the call and enable
 * interrupts after return.
 */
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static void acpi_safe_halt(void)
{
	current_thread_info()->status &= ~TS_POLLING;
	/*
	 * TS_POLLING-cleared state must be visible before we
	 * test NEED_RESCHED:
	 */
	smp_mb();
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	if (!need_resched()) {
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		safe_halt();
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		local_irq_disable();
	}
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	current_thread_info()->status |= TS_POLLING;
}

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#ifdef ARCH_APICTIMER_STOPS_ON_C3

/*
 * Some BIOS implementations switch to C3 in the published C2 state.
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 * This seems to be a common problem on AMD boxen, but other vendors
 * are affected too. We pick the most conservative approach: we assume
 * that the local APIC stops in both C2 and C3.
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 */
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static void lapic_timer_check_state(int state, struct acpi_processor *pr,
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				   struct acpi_processor_cx *cx)
{
	struct acpi_processor_power *pwr = &pr->power;
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	u8 type = local_apic_timer_c2_ok ? ACPI_STATE_C3 : ACPI_STATE_C2;
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	if (cpu_has(&cpu_data(pr->id), X86_FEATURE_ARAT))
		return;

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	if (amd_e400_c1e_detected)
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		type = ACPI_STATE_C1;

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	/*
	 * Check, if one of the previous states already marked the lapic
	 * unstable
	 */
	if (pwr->timer_broadcast_on_state < state)
		return;

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	if (cx->type >= type)
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		pr->power.timer_broadcast_on_state = state;
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}

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static void __lapic_timer_propagate_broadcast(void *arg)
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{
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	struct acpi_processor *pr = (struct acpi_processor *) arg;
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	unsigned long reason;

	reason = pr->power.timer_broadcast_on_state < INT_MAX ?
		CLOCK_EVT_NOTIFY_BROADCAST_ON : CLOCK_EVT_NOTIFY_BROADCAST_OFF;

	clockevents_notify(reason, &pr->id);
}

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static void lapic_timer_propagate_broadcast(struct acpi_processor *pr)
{
	smp_call_function_single(pr->id, __lapic_timer_propagate_broadcast,
				 (void *)pr, 1);
}

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/* Power(C) State timer broadcast control */
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static void lapic_timer_state_broadcast(struct acpi_processor *pr,
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				       struct acpi_processor_cx *cx,
				       int broadcast)
{
	int state = cx - pr->power.states;

	if (state >= pr->power.timer_broadcast_on_state) {
		unsigned long reason;

		reason = broadcast ?  CLOCK_EVT_NOTIFY_BROADCAST_ENTER :
			CLOCK_EVT_NOTIFY_BROADCAST_EXIT;
		clockevents_notify(reason, &pr->id);
	}
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}

#else

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static void lapic_timer_check_state(int state, struct acpi_processor *pr,
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				   struct acpi_processor_cx *cstate) { }
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static void lapic_timer_propagate_broadcast(struct acpi_processor *pr) { }
static void lapic_timer_state_broadcast(struct acpi_processor *pr,
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				       struct acpi_processor_cx *cx,
				       int broadcast)
{
}
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#endif

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/*
 * Suspend / resume control
 */
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static u32 saved_bm_rld;

static void acpi_idle_bm_rld_save(void)
{
	acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD, &saved_bm_rld);
}
static void acpi_idle_bm_rld_restore(void)
{
	u32 resumed_bm_rld;

	acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD, &resumed_bm_rld);

	if (resumed_bm_rld != saved_bm_rld)
		acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, saved_bm_rld);
}
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int acpi_processor_suspend(struct acpi_device * device, pm_message_t state)
{
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	acpi_idle_bm_rld_save();
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	return 0;
}

int acpi_processor_resume(struct acpi_device * device)
{
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	acpi_idle_bm_rld_restore();
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	return 0;
}

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#if defined(CONFIG_X86)
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static void tsc_check_state(int state)
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{
	switch (boot_cpu_data.x86_vendor) {
	case X86_VENDOR_AMD:
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	case X86_VENDOR_INTEL:
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		/*
		 * AMD Fam10h TSC will tick in all
		 * C/P/S0/S1 states when this bit is set.
		 */
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		if (boot_cpu_has(X86_FEATURE_NONSTOP_TSC))
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			return;
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		/*FALL THROUGH*/
	default:
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		/* TSC could halt in idle, so notify users */
		if (state > ACPI_STATE_C1)
			mark_tsc_unstable("TSC halts in idle");
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	}
}
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#else
static void tsc_check_state(int state) { return; }
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#endif

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static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr)
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{

	if (!pr)
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		return -EINVAL;
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	if (!pr->pblk)
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		return -ENODEV;
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	/* if info is obtained from pblk/fadt, type equals state */
	pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2;
	pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3;

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#ifndef CONFIG_HOTPLUG_CPU
	/*
	 * Check for P_LVL2_UP flag before entering C2 and above on
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	 * an SMP system.
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	 */
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	if ((num_online_cpus() > 1) &&
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	    !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
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		return -ENODEV;
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#endif

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	/* determine C2 and C3 address from pblk */
	pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4;
	pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5;

	/* determine latencies from FADT */
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	pr->power.states[ACPI_STATE_C2].latency = acpi_gbl_FADT.C2latency;
	pr->power.states[ACPI_STATE_C3].latency = acpi_gbl_FADT.C3latency;
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	/*
	 * FADT specified C2 latency must be less than or equal to
	 * 100 microseconds.
	 */
	if (acpi_gbl_FADT.C2latency > ACPI_PROCESSOR_MAX_C2_LATENCY) {
		ACPI_DEBUG_PRINT((ACPI_DB_INFO,
			"C2 latency too large [%d]\n", acpi_gbl_FADT.C2latency));
		/* invalidate C2 */
		pr->power.states[ACPI_STATE_C2].address = 0;
	}

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	/*
	 * FADT supplied C3 latency must be less than or equal to
	 * 1000 microseconds.
	 */
	if (acpi_gbl_FADT.C3latency > ACPI_PROCESSOR_MAX_C3_LATENCY) {
		ACPI_DEBUG_PRINT((ACPI_DB_INFO,
			"C3 latency too large [%d]\n", acpi_gbl_FADT.C3latency));
		/* invalidate C3 */
		pr->power.states[ACPI_STATE_C3].address = 0;
	}

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	ACPI_DEBUG_PRINT((ACPI_DB_INFO,
			  "lvl2[0x%08x] lvl3[0x%08x]\n",
			  pr->power.states[ACPI_STATE_C2].address,
			  pr->power.states[ACPI_STATE_C3].address));

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	return 0;
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}

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static int acpi_processor_get_power_info_default(struct acpi_processor *pr)
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{
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	if (!pr->power.states[ACPI_STATE_C1].valid) {
		/* set the first C-State to C1 */
		/* all processors need to support C1 */
		pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1;
		pr->power.states[ACPI_STATE_C1].valid = 1;
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		pr->power.states[ACPI_STATE_C1].entry_method = ACPI_CSTATE_HALT;
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	}
	/* the C0 state only exists as a filler in our array */
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	pr->power.states[ACPI_STATE_C0].valid = 1;
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	return 0;
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}

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static int acpi_processor_get_power_info_cst(struct acpi_processor *pr)
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{
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	acpi_status status = 0;
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	u64 count;
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	int current_count;
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	int i;
	struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
	union acpi_object *cst;
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	if (nocst)
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		return -ENODEV;
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	current_count = 0;
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	status = acpi_evaluate_object(pr->handle, "_CST", NULL, &buffer);
	if (ACPI_FAILURE(status)) {
		ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No _CST, giving up\n"));
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		return -ENODEV;
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	}
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	cst = buffer.pointer;
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	/* There must be at least 2 elements */
	if (!cst || (cst->type != ACPI_TYPE_PACKAGE) || cst->package.count < 2) {
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		printk(KERN_ERR PREFIX "not enough elements in _CST\n");
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		status = -EFAULT;
		goto end;
	}

	count = cst->package.elements[0].integer.value;

	/* Validate number of power states. */
	if (count < 1 || count != cst->package.count - 1) {
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		printk(KERN_ERR PREFIX "count given by _CST is not valid\n");
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		status = -EFAULT;
		goto end;
	}

	/* Tell driver that at least _CST is supported. */
	pr->flags.has_cst = 1;

	for (i = 1; i <= count; i++) {
		union acpi_object *element;
		union acpi_object *obj;
		struct acpi_power_register *reg;
		struct acpi_processor_cx cx;

		memset(&cx, 0, sizeof(cx));

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		element = &(cst->package.elements[i]);
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		if (element->type != ACPI_TYPE_PACKAGE)
			continue;

		if (element->package.count != 4)
			continue;

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		obj = &(element->package.elements[0]);
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		if (obj->type != ACPI_TYPE_BUFFER)
			continue;

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		reg = (struct acpi_power_register *)obj->buffer.pointer;
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		if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO &&
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		    (reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE))
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			continue;

		/* There should be an easy way to extract an integer... */
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		obj = &(element->package.elements[1]);
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		if (obj->type != ACPI_TYPE_INTEGER)
			continue;

		cx.type = obj->integer.value;
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		/*
		 * Some buggy BIOSes won't list C1 in _CST -
		 * Let acpi_processor_get_power_info_default() handle them later
		 */
		if (i == 1 && cx.type != ACPI_STATE_C1)
			current_count++;

		cx.address = reg->address;
		cx.index = current_count + 1;

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		cx.entry_method = ACPI_CSTATE_SYSTEMIO;
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		if (reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE) {
			if (acpi_processor_ffh_cstate_probe
					(pr->id, &cx, reg) == 0) {
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				cx.entry_method = ACPI_CSTATE_FFH;
			} else if (cx.type == ACPI_STATE_C1) {
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				/*
				 * C1 is a special case where FIXED_HARDWARE
				 * can be handled in non-MWAIT way as well.
				 * In that case, save this _CST entry info.
				 * Otherwise, ignore this info and continue.
				 */
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				cx.entry_method = ACPI_CSTATE_HALT;
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				snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT");
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			} else {
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				continue;
			}
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			if (cx.type == ACPI_STATE_C1 &&
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			    (boot_option_idle_override == IDLE_NOMWAIT)) {
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				/*
				 * In most cases the C1 space_id obtained from
				 * _CST object is FIXED_HARDWARE access mode.
				 * But when the option of idle=halt is added,
				 * the entry_method type should be changed from
				 * CSTATE_FFH to CSTATE_HALT.
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				 * When the option of idle=nomwait is added,
				 * the C1 entry_method type should be
				 * CSTATE_HALT.
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				 */
				cx.entry_method = ACPI_CSTATE_HALT;
				snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT");
			}
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		} else {
			snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI IOPORT 0x%x",
				 cx.address);
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		}
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		if (cx.type == ACPI_STATE_C1) {
			cx.valid = 1;
		}
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		obj = &(element->package.elements[2]);
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		if (obj->type != ACPI_TYPE_INTEGER)
			continue;

		cx.latency = obj->integer.value;

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		obj = &(element->package.elements[3]);
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		if (obj->type != ACPI_TYPE_INTEGER)
			continue;

		cx.power = obj->integer.value;

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		current_count++;
		memcpy(&(pr->power.states[current_count]), &cx, sizeof(cx));

		/*
		 * We support total ACPI_PROCESSOR_MAX_POWER - 1
		 * (From 1 through ACPI_PROCESSOR_MAX_POWER - 1)
		 */
		if (current_count >= (ACPI_PROCESSOR_MAX_POWER - 1)) {
			printk(KERN_WARNING
			       "Limiting number of power states to max (%d)\n",
			       ACPI_PROCESSOR_MAX_POWER);
			printk(KERN_WARNING
			       "Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n");
			break;
		}
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	}

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	ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found %d power states\n",
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			  current_count));
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	/* Validate number of power states discovered */
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	if (current_count < 2)
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		status = -EFAULT;
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      end:
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	kfree(buffer.pointer);
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	return status;
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}

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static void acpi_processor_power_verify_c3(struct acpi_processor *pr,
					   struct acpi_processor_cx *cx)
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{
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	static int bm_check_flag = -1;
	static int bm_control_flag = -1;
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	if (!cx->address)
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		return;
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	/*
	 * PIIX4 Erratum #18: We don't support C3 when Type-F (fast)
	 * DMA transfers are used by any ISA device to avoid livelock.
	 * Note that we could disable Type-F DMA (as recommended by
	 * the erratum), but this is known to disrupt certain ISA
	 * devices thus we take the conservative approach.
	 */
	else if (errata.piix4.fdma) {
		ACPI_DEBUG_PRINT((ACPI_DB_INFO,
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				  "C3 not supported on PIIX4 with Type-F DMA\n"));
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		return;
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542 543
	}

544
	/* All the logic here assumes flags.bm_check is same across all CPUs */
545
	if (bm_check_flag == -1) {
546 547 548
		/* Determine whether bm_check is needed based on CPU  */
		acpi_processor_power_init_bm_check(&(pr->flags), pr->id);
		bm_check_flag = pr->flags.bm_check;
549
		bm_control_flag = pr->flags.bm_control;
550 551
	} else {
		pr->flags.bm_check = bm_check_flag;
552
		pr->flags.bm_control = bm_control_flag;
553 554 555 556
	}

	if (pr->flags.bm_check) {
		if (!pr->flags.bm_control) {
557 558 559 560 561 562 563 564 565 566
			if (pr->flags.has_cst != 1) {
				/* bus mastering control is necessary */
				ACPI_DEBUG_PRINT((ACPI_DB_INFO,
					"C3 support requires BM control\n"));
				return;
			} else {
				/* Here we enter C3 without bus mastering */
				ACPI_DEBUG_PRINT((ACPI_DB_INFO,
					"C3 support without BM control\n"));
			}
567 568 569 570 571 572
		}
	} else {
		/*
		 * WBINVD should be set in fadt, for C3 state to be
		 * supported on when bm_check is not required.
		 */
573
		if (!(acpi_gbl_FADT.flags & ACPI_FADT_WBINVD)) {
574
			ACPI_DEBUG_PRINT((ACPI_DB_INFO,
L
Len Brown 已提交
575 576
					  "Cache invalidation should work properly"
					  " for C3 to be enabled on SMP systems\n"));
577
			return;
578 579 580
		}
	}

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Linus Torvalds 已提交
581 582 583 584 585 586 587
	/*
	 * Otherwise we've met all of our C3 requirements.
	 * Normalize the C3 latency to expidite policy.  Enable
	 * checking of bus mastering status (bm_check) so we can
	 * use this in our C3 policy
	 */
	cx->valid = 1;
588 589

	cx->latency_ticks = cx->latency;
590 591 592 593 594 595 596 597
	/*
	 * On older chipsets, BM_RLD needs to be set
	 * in order for Bus Master activity to wake the
	 * system from C3.  Newer chipsets handle DMA
	 * during C3 automatically and BM_RLD is a NOP.
	 * In either case, the proper way to
	 * handle BM_RLD is to set it and leave it set.
	 */
598
	acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, 1);
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599

600
	return;
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601 602 603 604 605 606
}

static int acpi_processor_power_verify(struct acpi_processor *pr)
{
	unsigned int i;
	unsigned int working = 0;
607

608
	pr->power.timer_broadcast_on_state = INT_MAX;
609

610
	for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
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		struct acpi_processor_cx *cx = &pr->power.states[i];

		switch (cx->type) {
		case ACPI_STATE_C1:
			cx->valid = 1;
			break;

		case ACPI_STATE_C2:
619 620 621 622
			if (!cx->address)
				break;
			cx->valid = 1; 
			cx->latency_ticks = cx->latency; /* Normalize latency */
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623 624 625 626 627 628
			break;

		case ACPI_STATE_C3:
			acpi_processor_power_verify_c3(pr, cx);
			break;
		}
629 630
		if (!cx->valid)
			continue;
L
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631

632 633 634
		lapic_timer_check_state(i, pr, cx);
		tsc_check_state(cx->type);
		working++;
L
Linus Torvalds 已提交
635
	}
636

637
	lapic_timer_propagate_broadcast(pr);
L
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638 639 640 641

	return (working);
}

L
Len Brown 已提交
642
static int acpi_processor_get_power_info(struct acpi_processor *pr)
L
Linus Torvalds 已提交
643 644 645 646 647 648 649 650
{
	unsigned int i;
	int result;


	/* NOTE: the idle thread may not be running while calling
	 * this function */

651 652 653
	/* Zero initialize all the C-states info. */
	memset(pr->power.states, 0, sizeof(pr->power.states));

L
Linus Torvalds 已提交
654
	result = acpi_processor_get_power_info_cst(pr);
655
	if (result == -ENODEV)
656
		result = acpi_processor_get_power_info_fadt(pr);
657

658 659 660 661 662
	if (result)
		return result;

	acpi_processor_get_power_info_default(pr);

663
	pr->power.count = acpi_processor_power_verify(pr);
L
Linus Torvalds 已提交
664 665 666 667 668 669

	/*
	 * if one state of type C2 or C3 is available, mark this
	 * CPU as being "idle manageable"
	 */
	for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
670
		if (pr->power.states[i].valid) {
L
Linus Torvalds 已提交
671
			pr->power.count = i;
672 673
			if (pr->power.states[i].type >= ACPI_STATE_C2)
				pr->flags.power = 1;
674
		}
L
Linus Torvalds 已提交
675 676
	}

677
	return 0;
L
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678 679
}

680 681 682 683 684 685 686
/**
 * acpi_idle_bm_check - checks if bus master activity was detected
 */
static int acpi_idle_bm_check(void)
{
	u32 bm_status = 0;

687 688 689
	if (bm_check_disable)
		return 0;

690
	acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status);
691
	if (bm_status)
692
		acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, 1);
693 694 695 696 697 698 699 700 701 702 703 704 705 706 707 708
	/*
	 * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect
	 * the true state of bus mastering activity; forcing us to
	 * manually check the BMIDEA bit of each IDE channel.
	 */
	else if (errata.piix4.bmisx) {
		if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01)
		    || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01))
			bm_status = 1;
	}
	return bm_status;
}

/**
 * acpi_idle_do_entry - a helper function that does C2 and C3 type entry
 * @cx: cstate data
709 710
 *
 * Caller disables interrupt before call and enables interrupt after return.
711 712 713
 */
static inline void acpi_idle_do_entry(struct acpi_processor_cx *cx)
{
714 715
	/* Don't trace irqs off for idle */
	stop_critical_timings();
716
	if (cx->entry_method == ACPI_CSTATE_FFH) {
717 718
		/* Call into architectural FFH based C-state */
		acpi_processor_ffh_cstate_enter(cx);
719 720
	} else if (cx->entry_method == ACPI_CSTATE_HALT) {
		acpi_safe_halt();
721 722 723 724 725 726
	} else {
		/* IO port based C-state */
		inb(cx->address);
		/* Dummy wait op - must do something useless after P_LVL2 read
		   because chipsets cannot guarantee that STPCLK# signal
		   gets asserted in time to freeze execution properly. */
727
		inl(acpi_gbl_FADT.xpm_timer_block.address);
728
	}
729
	start_critical_timings();
730 731 732 733 734
}

/**
 * acpi_idle_enter_c1 - enters an ACPI C1 state-type
 * @dev: the target CPU
735
 * @drv: cpuidle driver containing cpuidle state info
736
 * @index: index of target state
737 738 739 740
 *
 * This is equivalent to the HALT instruction.
 */
static int acpi_idle_enter_c1(struct cpuidle_device *dev,
741
		struct cpuidle_driver *drv, int index)
742
{
743 744
	ktime_t  kt1, kt2;
	s64 idle_time;
745
	struct acpi_processor *pr;
746 747
	struct cpuidle_state_usage *state_usage = &dev->states_usage[index];
	struct acpi_processor_cx *cx = cpuidle_get_statedata(state_usage);
748

749
	pr = __this_cpu_read(processors);
750
	dev->last_residency = 0;
751 752

	if (unlikely(!pr))
753
		return -EINVAL;
754

755
	local_irq_disable();
756

757
	lapic_timer_state_broadcast(pr, cx, 1);
758
	kt1 = ktime_get_real();
759
	acpi_idle_do_entry(cx);
760 761
	kt2 = ktime_get_real();
	idle_time =  ktime_to_us(ktime_sub(kt2, kt1));
762

763 764 765
	/* Update device last_residency*/
	dev->last_residency = (int)idle_time;

766
	local_irq_enable();
767
	cx->usage++;
768
	lapic_timer_state_broadcast(pr, cx, 0);
769

770
	return index;
771 772 773 774 775
}

/**
 * acpi_idle_enter_simple - enters an ACPI state without BM handling
 * @dev: the target CPU
776
 * @drv: cpuidle driver with cpuidle state information
777
 * @index: the index of suggested state
778 779
 */
static int acpi_idle_enter_simple(struct cpuidle_device *dev,
780
		struct cpuidle_driver *drv, int index)
781 782
{
	struct acpi_processor *pr;
783 784
	struct cpuidle_state_usage *state_usage = &dev->states_usage[index];
	struct acpi_processor_cx *cx = cpuidle_get_statedata(state_usage);
785
	ktime_t  kt1, kt2;
786
	s64 idle_time_ns;
787
	s64 idle_time;
788

789
	pr = __this_cpu_read(processors);
790
	dev->last_residency = 0;
791 792

	if (unlikely(!pr))
793
		return -EINVAL;
794

795
	local_irq_disable();
796

797 798 799 800 801 802 803
	if (cx->entry_method != ACPI_CSTATE_FFH) {
		current_thread_info()->status &= ~TS_POLLING;
		/*
		 * TS_POLLING-cleared state must be visible before we test
		 * NEED_RESCHED:
		 */
		smp_mb();
804

805 806 807
		if (unlikely(need_resched())) {
			current_thread_info()->status |= TS_POLLING;
			local_irq_enable();
808
			return -EINVAL;
809
		}
810 811
	}

812 813 814 815
	/*
	 * Must be done before busmaster disable as we might need to
	 * access HPET !
	 */
816
	lapic_timer_state_broadcast(pr, cx, 1);
817

818 819 820
	if (cx->type == ACPI_STATE_C3)
		ACPI_FLUSH_CPU_CACHE();

821
	kt1 = ktime_get_real();
822 823
	/* Tell the scheduler that we are going deep-idle: */
	sched_clock_idle_sleep_event();
824
	acpi_idle_do_entry(cx);
825
	kt2 = ktime_get_real();
826 827 828
	idle_time_ns = ktime_to_ns(ktime_sub(kt2, kt1));
	idle_time = idle_time_ns;
	do_div(idle_time, NSEC_PER_USEC);
829

830 831 832
	/* Update device last_residency*/
	dev->last_residency = (int)idle_time;

833
	/* Tell the scheduler how much we idled: */
834
	sched_clock_idle_wakeup_event(idle_time_ns);
835 836

	local_irq_enable();
837 838
	if (cx->entry_method != ACPI_CSTATE_FFH)
		current_thread_info()->status |= TS_POLLING;
839 840 841

	cx->usage++;

842
	lapic_timer_state_broadcast(pr, cx, 0);
843
	cx->time += idle_time;
844
	return index;
845 846 847
}

static int c3_cpu_count;
848
static DEFINE_RAW_SPINLOCK(c3_lock);
849 850 851 852

/**
 * acpi_idle_enter_bm - enters C3 with proper BM handling
 * @dev: the target CPU
853
 * @drv: cpuidle driver containing state data
854
 * @index: the index of suggested state
855 856 857 858
 *
 * If BM is detected, the deepest non-C3 idle state is entered instead.
 */
static int acpi_idle_enter_bm(struct cpuidle_device *dev,
859
		struct cpuidle_driver *drv, int index)
860 861
{
	struct acpi_processor *pr;
862 863
	struct cpuidle_state_usage *state_usage = &dev->states_usage[index];
	struct acpi_processor_cx *cx = cpuidle_get_statedata(state_usage);
864
	ktime_t  kt1, kt2;
865
	s64 idle_time_ns;
866 867
	s64 idle_time;

868

869
	pr = __this_cpu_read(processors);
870
	dev->last_residency = 0;
871 872

	if (unlikely(!pr))
873
		return -EINVAL;
874

875
	if (!cx->bm_sts_skip && acpi_idle_bm_check()) {
876 877 878
		if (drv->safe_state_index >= 0) {
			return drv->states[drv->safe_state_index].enter(dev,
						drv, drv->safe_state_index);
879
		} else {
880
			local_irq_disable();
881
			acpi_safe_halt();
882
			local_irq_enable();
883
			return -EINVAL;
884 885 886
		}
	}

887
	local_irq_disable();
888

889 890 891 892 893 894 895
	if (cx->entry_method != ACPI_CSTATE_FFH) {
		current_thread_info()->status &= ~TS_POLLING;
		/*
		 * TS_POLLING-cleared state must be visible before we test
		 * NEED_RESCHED:
		 */
		smp_mb();
896

897 898 899
		if (unlikely(need_resched())) {
			current_thread_info()->status |= TS_POLLING;
			local_irq_enable();
900
			return -EINVAL;
901
		}
902 903
	}

904 905
	acpi_unlazy_tlb(smp_processor_id());

906 907
	/* Tell the scheduler that we are going deep-idle: */
	sched_clock_idle_sleep_event();
908 909 910 911
	/*
	 * Must be done before busmaster disable as we might need to
	 * access HPET !
	 */
912
	lapic_timer_state_broadcast(pr, cx, 1);
913

914
	kt1 = ktime_get_real();
915 916 917 918 919 920 921 922 923 924 925
	/*
	 * disable bus master
	 * bm_check implies we need ARB_DIS
	 * !bm_check implies we need cache flush
	 * bm_control implies whether we can do ARB_DIS
	 *
	 * That leaves a case where bm_check is set and bm_control is
	 * not set. In that case we cannot do much, we enter C3
	 * without doing anything.
	 */
	if (pr->flags.bm_check && pr->flags.bm_control) {
926
		raw_spin_lock(&c3_lock);
927 928 929
		c3_cpu_count++;
		/* Disable bus master arbitration when all CPUs are in C3 */
		if (c3_cpu_count == num_online_cpus())
930
			acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 1);
931
		raw_spin_unlock(&c3_lock);
932 933 934
	} else if (!pr->flags.bm_check) {
		ACPI_FLUSH_CPU_CACHE();
	}
935

936
	acpi_idle_do_entry(cx);
937

938 939
	/* Re-enable bus master arbitration */
	if (pr->flags.bm_check && pr->flags.bm_control) {
940
		raw_spin_lock(&c3_lock);
941
		acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 0);
942
		c3_cpu_count--;
943
		raw_spin_unlock(&c3_lock);
944
	}
945
	kt2 = ktime_get_real();
946
	idle_time_ns = ktime_to_ns(ktime_sub(kt2, kt1));
947 948
	idle_time = idle_time_ns;
	do_div(idle_time, NSEC_PER_USEC);
949

950 951 952
	/* Update device last_residency*/
	dev->last_residency = (int)idle_time;

953
	/* Tell the scheduler how much we idled: */
954
	sched_clock_idle_wakeup_event(idle_time_ns);
955 956

	local_irq_enable();
957 958
	if (cx->entry_method != ACPI_CSTATE_FFH)
		current_thread_info()->status |= TS_POLLING;
959 960 961

	cx->usage++;

962
	lapic_timer_state_broadcast(pr, cx, 0);
963
	cx->time += idle_time;
964
	return index;
965 966 967 968 969 970 971 972
}

struct cpuidle_driver acpi_idle_driver = {
	.name =		"acpi_idle",
	.owner =	THIS_MODULE,
};

/**
973 974 975
 * acpi_processor_setup_cpuidle_cx - prepares and configures CPUIDLE
 * device i.e. per-cpu data
 *
976 977
 * @pr: the ACPI processor
 */
978
static int acpi_processor_setup_cpuidle_cx(struct acpi_processor *pr)
979
{
980
	int i, count = CPUIDLE_DRIVER_STATE_START;
981
	struct acpi_processor_cx *cx;
982
	struct cpuidle_state_usage *state_usage;
983 984 985 986 987 988 989 990 991
	struct cpuidle_device *dev = &pr->power.dev;

	if (!pr->flags.power_setup_done)
		return -EINVAL;

	if (pr->flags.power == 0) {
		return -EINVAL;
	}

992
	dev->cpu = pr->id;
993

994 995 996
	if (max_cstate == 0)
		max_cstate = 1;

997 998
	for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
		cx = &pr->power.states[i];
999
		state_usage = &dev->states_usage[count];
1000 1001 1002 1003 1004 1005 1006 1007 1008

		if (!cx->valid)
			continue;

#ifdef CONFIG_HOTPLUG_CPU
		if ((cx->type != ACPI_STATE_C1) && (num_online_cpus() > 1) &&
		    !pr->flags.has_cst &&
		    !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
			continue;
1009
#endif
1010

1011
		cpuidle_set_statedata(state_usage, cx);
1012

1013 1014 1015 1016 1017 1018 1019 1020 1021 1022 1023 1024 1025 1026 1027 1028 1029 1030 1031 1032 1033 1034 1035 1036 1037 1038 1039 1040 1041 1042 1043 1044 1045
		count++;
		if (count == CPUIDLE_STATE_MAX)
			break;
	}

	dev->state_count = count;

	if (!count)
		return -EINVAL;

	return 0;
}

/**
 * acpi_processor_setup_cpuidle states- prepares and configures cpuidle
 * global state data i.e. idle routines
 *
 * @pr: the ACPI processor
 */
static int acpi_processor_setup_cpuidle_states(struct acpi_processor *pr)
{
	int i, count = CPUIDLE_DRIVER_STATE_START;
	struct acpi_processor_cx *cx;
	struct cpuidle_state *state;
	struct cpuidle_driver *drv = &acpi_idle_driver;

	if (!pr->flags.power_setup_done)
		return -EINVAL;

	if (pr->flags.power == 0)
		return -EINVAL;

	drv->safe_state_index = -1;
1046
	for (i = 0; i < CPUIDLE_STATE_MAX; i++) {
1047 1048
		drv->states[i].name[0] = '\0';
		drv->states[i].desc[0] = '\0';
1049 1050
	}

1051 1052 1053
	if (max_cstate == 0)
		max_cstate = 1;

1054 1055 1056 1057 1058 1059 1060 1061 1062 1063 1064
	for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
		cx = &pr->power.states[i];

		if (!cx->valid)
			continue;

#ifdef CONFIG_HOTPLUG_CPU
		if ((cx->type != ACPI_STATE_C1) && (num_online_cpus() > 1) &&
		    !pr->flags.has_cst &&
		    !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
			continue;
1065
#endif
1066

1067
		state = &drv->states[count];
1068
		snprintf(state->name, CPUIDLE_NAME_LEN, "C%d", i);
1069
		strncpy(state->desc, cx->desc, CPUIDLE_DESC_LEN);
1070
		state->exit_latency = cx->latency;
1071
		state->target_residency = cx->latency * latency_factor;
1072 1073 1074 1075

		state->flags = 0;
		switch (cx->type) {
			case ACPI_STATE_C1:
1076 1077 1078
			if (cx->entry_method == ACPI_CSTATE_FFH)
				state->flags |= CPUIDLE_FLAG_TIME_VALID;

1079
			state->enter = acpi_idle_enter_c1;
1080
			drv->safe_state_index = count;
1081 1082 1083 1084 1085
			break;

			case ACPI_STATE_C2:
			state->flags |= CPUIDLE_FLAG_TIME_VALID;
			state->enter = acpi_idle_enter_simple;
1086
			drv->safe_state_index = count;
1087 1088 1089 1090 1091 1092 1093 1094 1095 1096 1097
			break;

			case ACPI_STATE_C3:
			state->flags |= CPUIDLE_FLAG_TIME_VALID;
			state->enter = pr->flags.bm_check ?
					acpi_idle_enter_bm :
					acpi_idle_enter_simple;
			break;
		}

		count++;
1098 1099
		if (count == CPUIDLE_STATE_MAX)
			break;
1100 1101
	}

1102
	drv->state_count = count;
1103 1104 1105 1106 1107 1108 1109

	if (!count)
		return -EINVAL;

	return 0;
}

1110
int acpi_processor_hotplug(struct acpi_processor *pr)
1111
{
1112
	int ret = 0;
1113

1114
	if (disabled_by_idle_boot_param())
1115 1116
		return 0;

1117 1118 1119 1120 1121 1122 1123 1124 1125 1126 1127 1128 1129
	if (!pr)
		return -EINVAL;

	if (nocst) {
		return -ENODEV;
	}

	if (!pr->flags.power_setup_done)
		return -ENODEV;

	cpuidle_pause_and_lock();
	cpuidle_disable_device(&pr->power.dev);
	acpi_processor_get_power_info(pr);
1130
	if (pr->flags.power) {
1131
		acpi_processor_setup_cpuidle_cx(pr);
1132 1133
		ret = cpuidle_enable_device(&pr->power.dev);
	}
1134 1135 1136 1137 1138
	cpuidle_resume_and_unlock();

	return ret;
}

1139 1140 1141 1142 1143 1144 1145 1146 1147 1148 1149 1150 1151 1152 1153 1154 1155 1156 1157 1158 1159 1160 1161 1162 1163 1164 1165 1166 1167 1168 1169 1170 1171 1172 1173 1174 1175 1176 1177 1178 1179 1180 1181 1182 1183 1184 1185 1186 1187 1188 1189 1190 1191 1192 1193 1194 1195 1196 1197 1198 1199
int acpi_processor_cst_has_changed(struct acpi_processor *pr)
{
	int cpu;
	struct acpi_processor *_pr;

	if (disabled_by_idle_boot_param())
		return 0;

	if (!pr)
		return -EINVAL;

	if (nocst)
		return -ENODEV;

	if (!pr->flags.power_setup_done)
		return -ENODEV;

	/*
	 * FIXME:  Design the ACPI notification to make it once per
	 * system instead of once per-cpu.  This condition is a hack
	 * to make the code that updates C-States be called once.
	 */

	if (smp_processor_id() == 0 &&
			cpuidle_get_driver() == &acpi_idle_driver) {

		cpuidle_pause_and_lock();
		/* Protect against cpu-hotplug */
		get_online_cpus();

		/* Disable all cpuidle devices */
		for_each_online_cpu(cpu) {
			_pr = per_cpu(processors, cpu);
			if (!_pr || !_pr->flags.power_setup_done)
				continue;
			cpuidle_disable_device(&_pr->power.dev);
		}

		/* Populate Updated C-state information */
		acpi_processor_setup_cpuidle_states(pr);

		/* Enable all cpuidle devices */
		for_each_online_cpu(cpu) {
			_pr = per_cpu(processors, cpu);
			if (!_pr || !_pr->flags.power_setup_done)
				continue;
			acpi_processor_get_power_info(_pr);
			if (_pr->flags.power) {
				acpi_processor_setup_cpuidle_cx(_pr);
				cpuidle_enable_device(&_pr->power.dev);
			}
		}
		put_online_cpus();
		cpuidle_resume_and_unlock();
	}

	return 0;
}

static int acpi_processor_registered;

1200
int __cpuinit acpi_processor_power_init(struct acpi_processor *pr,
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			      struct acpi_device *device)
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{
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	acpi_status status = 0;
1204
	int retval;
1205
	static int first_run;
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1207
	if (disabled_by_idle_boot_param())
1208
		return 0;
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	if (!first_run) {
		dmi_check_system(processor_power_dmi_table);
1212
		max_cstate = acpi_processor_cstate_check(max_cstate);
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		if (max_cstate < ACPI_C_STATES_MAX)
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			printk(KERN_NOTICE
			       "ACPI: processor limited to max C-state %d\n",
			       max_cstate);
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		first_run++;
	}

1220
	if (!pr)
1221
		return -EINVAL;
1222

1223
	if (acpi_gbl_FADT.cst_control && !nocst) {
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		status =
1225
		    acpi_os_write_port(acpi_gbl_FADT.smi_command, acpi_gbl_FADT.cst_control, 8);
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		if (ACPI_FAILURE(status)) {
1227 1228
			ACPI_EXCEPTION((AE_INFO, status,
					"Notifying BIOS of _CST ability failed"));
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		}
	}

	acpi_processor_get_power_info(pr);
1233
	pr->flags.power_setup_done = 1;
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	/*
	 * Install the idle handler if processor power management is supported.
	 * Note that we use previously set idle handler will be used on
	 * platforms that only support C1.
	 */
1240
	if (pr->flags.power) {
1241 1242 1243 1244 1245 1246 1247 1248 1249 1250 1251 1252 1253 1254 1255 1256 1257 1258 1259 1260
		/* Register acpi_idle_driver if not already registered */
		if (!acpi_processor_registered) {
			acpi_processor_setup_cpuidle_states(pr);
			retval = cpuidle_register_driver(&acpi_idle_driver);
			if (retval)
				return retval;
			printk(KERN_DEBUG "ACPI: %s registered with cpuidle\n",
					acpi_idle_driver.name);
		}
		/* Register per-cpu cpuidle_device. Cpuidle driver
		 * must already be registered before registering device
		 */
		acpi_processor_setup_cpuidle_cx(pr);
		retval = cpuidle_register_device(&pr->power.dev);
		if (retval) {
			if (acpi_processor_registered == 0)
				cpuidle_unregister_driver(&acpi_idle_driver);
			return retval;
		}
		acpi_processor_registered++;
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	}
1262
	return 0;
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}

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int acpi_processor_power_exit(struct acpi_processor *pr,
			      struct acpi_device *device)
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{
1268
	if (disabled_by_idle_boot_param())
1269 1270
		return 0;

1271 1272 1273 1274 1275 1276
	if (pr->flags.power) {
		cpuidle_unregister_device(&pr->power.dev);
		acpi_processor_registered--;
		if (acpi_processor_registered == 0)
			cpuidle_unregister_driver(&acpi_idle_driver);
	}
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1278
	pr->flags.power_setup_done = 0;
1279
	return 0;
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}