processor_idle.c 48.9 KB
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/*
 * processor_idle - idle state submodule to the ACPI processor driver
 *
 *  Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
 *  Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
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 *  Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de>
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 *  Copyright (C) 2004  Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
 *  			- Added processor hotplug support
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 *  Copyright (C) 2005  Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
 *  			- Added support for C3 on SMP
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 *
 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
 *  the Free Software Foundation; either version 2 of the License, or (at
 *  your option) any later version.
 *
 *  This program is distributed in the hope that it will be useful, but
 *  WITHOUT ANY WARRANTY; without even the implied warranty of
 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 *  General Public License for more details.
 *
 *  You should have received a copy of the GNU General Public License along
 *  with this program; if not, write to the Free Software Foundation, Inc.,
 *  59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
 *
 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 */

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/cpufreq.h>
#include <linux/proc_fs.h>
#include <linux/seq_file.h>
#include <linux/acpi.h>
#include <linux/dmi.h>
#include <linux/moduleparam.h>
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#include <linux/sched.h>	/* need_resched() */
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#include <linux/pm_qos_params.h>
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#include <linux/clockchips.h>
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#include <linux/cpuidle.h>
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#include <linux/cpuidle.h>
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/*
 * Include the apic definitions for x86 to have the APIC timer related defines
 * available also for UP (on SMP it gets magically included via linux/smp.h).
 * asm/acpi.h is not an option, as it would require more include magic. Also
 * creating an empty asm-ia64/apic.h would just trade pest vs. cholera.
 */
#ifdef CONFIG_X86
#include <asm/apic.h>
#endif

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#include <asm/io.h>
#include <asm/uaccess.h>

#include <acpi/acpi_bus.h>
#include <acpi/processor.h>
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#include <asm/processor.h>
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#define ACPI_PROCESSOR_COMPONENT        0x01000000
#define ACPI_PROCESSOR_CLASS            "processor"
#define _COMPONENT              ACPI_PROCESSOR_COMPONENT
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ACPI_MODULE_NAME("processor_idle");
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#define ACPI_PROCESSOR_FILE_POWER	"power"
#define US_TO_PM_TIMER_TICKS(t)		((t * (PM_TIMER_FREQUENCY/1000)) / 1000)
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#define PM_TIMER_TICK_NS		(1000000000ULL/PM_TIMER_FREQUENCY)
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#ifndef CONFIG_CPU_IDLE
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#define C2_OVERHEAD			4	/* 1us (3.579 ticks per us) */
#define C3_OVERHEAD			4	/* 1us (3.579 ticks per us) */
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static void (*pm_idle_save) (void) __read_mostly;
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#else
#define C2_OVERHEAD			1	/* 1us */
#define C3_OVERHEAD			1	/* 1us */
#endif
#define PM_TIMER_TICKS_TO_US(p)		(((p) * 1000)/(PM_TIMER_FREQUENCY/1000))
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static unsigned int max_cstate __read_mostly = ACPI_PROCESSOR_MAX_POWER;
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#ifdef CONFIG_CPU_IDLE
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module_param(max_cstate, uint, 0000);
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#else
module_param(max_cstate, uint, 0644);
#endif
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static unsigned int nocst __read_mostly;
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module_param(nocst, uint, 0000);

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#ifndef CONFIG_CPU_IDLE
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/*
 * bm_history -- bit-mask with a bit per jiffy of bus-master activity
 * 1000 HZ: 0xFFFFFFFF: 32 jiffies = 32ms
 * 800 HZ: 0xFFFFFFFF: 32 jiffies = 40ms
 * 100 HZ: 0x0000000F: 4 jiffies = 40ms
 * reduce history for more aggressive entry into C3
 */
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static unsigned int bm_history __read_mostly =
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    (HZ >= 800 ? 0xFFFFFFFF : ((1U << (HZ / 25)) - 1));
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module_param(bm_history, uint, 0644);
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static int acpi_processor_set_power_policy(struct acpi_processor *pr);

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#else	/* CONFIG_CPU_IDLE */
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static unsigned int latency_factor __read_mostly = 2;
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module_param(latency_factor, uint, 0644);
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#endif
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/*
 * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3.
 * For now disable this. Probably a bug somewhere else.
 *
 * To skip this limit, boot/load with a large max_cstate limit.
 */
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static int set_max_cstate(const struct dmi_system_id *id)
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{
	if (max_cstate > ACPI_PROCESSOR_MAX_POWER)
		return 0;

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	printk(KERN_NOTICE PREFIX "%s detected - limiting to C%ld max_cstate."
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	       " Override with \"processor.max_cstate=%d\"\n", id->ident,
	       (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1);
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	max_cstate = (long)id->driver_data;
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	return 0;
}

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/* Actually this shouldn't be __cpuinitdata, would be better to fix the
   callers to only run once -AK */
static struct dmi_system_id __cpuinitdata processor_power_dmi_table[] = {
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	{ set_max_cstate, "IBM ThinkPad R40e", {
	  DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
	  DMI_MATCH(DMI_BIOS_VERSION,"1SET70WW")}, (void *)1},
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	{ set_max_cstate, "IBM ThinkPad R40e", {
	  DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
	  DMI_MATCH(DMI_BIOS_VERSION,"1SET60WW")}, (void *)1},
	{ set_max_cstate, "IBM ThinkPad R40e", {
	  DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
	  DMI_MATCH(DMI_BIOS_VERSION,"1SET43WW") }, (void*)1},
	{ set_max_cstate, "IBM ThinkPad R40e", {
	  DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
	  DMI_MATCH(DMI_BIOS_VERSION,"1SET45WW") }, (void*)1},
	{ set_max_cstate, "IBM ThinkPad R40e", {
	  DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
	  DMI_MATCH(DMI_BIOS_VERSION,"1SET47WW") }, (void*)1},
	{ set_max_cstate, "IBM ThinkPad R40e", {
	  DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
	  DMI_MATCH(DMI_BIOS_VERSION,"1SET50WW") }, (void*)1},
	{ set_max_cstate, "IBM ThinkPad R40e", {
	  DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
	  DMI_MATCH(DMI_BIOS_VERSION,"1SET52WW") }, (void*)1},
	{ set_max_cstate, "IBM ThinkPad R40e", {
	  DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
	  DMI_MATCH(DMI_BIOS_VERSION,"1SET55WW") }, (void*)1},
	{ set_max_cstate, "IBM ThinkPad R40e", {
	  DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
	  DMI_MATCH(DMI_BIOS_VERSION,"1SET56WW") }, (void*)1},
	{ set_max_cstate, "IBM ThinkPad R40e", {
	  DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
	  DMI_MATCH(DMI_BIOS_VERSION,"1SET59WW") }, (void*)1},
	{ set_max_cstate, "IBM ThinkPad R40e", {
	  DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
	  DMI_MATCH(DMI_BIOS_VERSION,"1SET60WW") }, (void*)1},
	{ set_max_cstate, "IBM ThinkPad R40e", {
	  DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
	  DMI_MATCH(DMI_BIOS_VERSION,"1SET61WW") }, (void*)1},
	{ set_max_cstate, "IBM ThinkPad R40e", {
	  DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
	  DMI_MATCH(DMI_BIOS_VERSION,"1SET62WW") }, (void*)1},
	{ set_max_cstate, "IBM ThinkPad R40e", {
	  DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
	  DMI_MATCH(DMI_BIOS_VERSION,"1SET64WW") }, (void*)1},
	{ set_max_cstate, "IBM ThinkPad R40e", {
	  DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
	  DMI_MATCH(DMI_BIOS_VERSION,"1SET65WW") }, (void*)1},
	{ set_max_cstate, "IBM ThinkPad R40e", {
	  DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
	  DMI_MATCH(DMI_BIOS_VERSION,"1SET68WW") }, (void*)1},
	{ set_max_cstate, "Medion 41700", {
	  DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
	  DMI_MATCH(DMI_BIOS_VERSION,"R01-A1J")}, (void *)1},
	{ set_max_cstate, "Clevo 5600D", {
	  DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
	  DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")},
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	 (void *)2},
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	{},
};

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static inline u32 ticks_elapsed(u32 t1, u32 t2)
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{
	if (t2 >= t1)
		return (t2 - t1);
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	else if (!(acpi_gbl_FADT.flags & ACPI_FADT_32BIT_TIMER))
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		return (((0x00FFFFFF - t1) + t2) & 0x00FFFFFF);
	else
		return ((0xFFFFFFFF - t1) + t2);
}

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static inline u32 ticks_elapsed_in_us(u32 t1, u32 t2)
{
	if (t2 >= t1)
		return PM_TIMER_TICKS_TO_US(t2 - t1);
	else if (!(acpi_gbl_FADT.flags & ACPI_FADT_32BIT_TIMER))
		return PM_TIMER_TICKS_TO_US(((0x00FFFFFF - t1) + t2) & 0x00FFFFFF);
	else
		return PM_TIMER_TICKS_TO_US((0xFFFFFFFF - t1) + t2);
}

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/*
 * Callers should disable interrupts before the call and enable
 * interrupts after return.
 */
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static void acpi_safe_halt(void)
{
	current_thread_info()->status &= ~TS_POLLING;
	/*
	 * TS_POLLING-cleared state must be visible before we
	 * test NEED_RESCHED:
	 */
	smp_mb();
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	if (!need_resched()) {
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		safe_halt();
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		local_irq_disable();
	}
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	current_thread_info()->status |= TS_POLLING;
}

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#ifndef CONFIG_CPU_IDLE

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static void
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acpi_processor_power_activate(struct acpi_processor *pr,
			      struct acpi_processor_cx *new)
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{
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	struct acpi_processor_cx *old;
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	if (!pr || !new)
		return;

	old = pr->power.state;

	if (old)
		old->promotion.count = 0;
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	new->demotion.count = 0;
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	/* Cleanup from old state. */
	if (old) {
		switch (old->type) {
		case ACPI_STATE_C3:
			/* Disable bus master reload */
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			if (new->type != ACPI_STATE_C3 && pr->flags.bm_check)
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				acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 0);
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			break;
		}
	}

	/* Prepare to use new state. */
	switch (new->type) {
	case ACPI_STATE_C3:
		/* Enable bus master reload */
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		if (old->type != ACPI_STATE_C3 && pr->flags.bm_check)
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			acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 1);
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		break;
	}

	pr->power.state = new;

	return;
}

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static atomic_t c3_cpu_count;
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/* Common C-state entry for C2, C3, .. */
static void acpi_cstate_enter(struct acpi_processor_cx *cstate)
{
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	if (cstate->entry_method == ACPI_CSTATE_FFH) {
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		/* Call into architectural FFH based C-state */
		acpi_processor_ffh_cstate_enter(cstate);
	} else {
		int unused;
		/* IO port based C-state */
		inb(cstate->address);
		/* Dummy wait op - must do something useless after P_LVL2 read
		   because chipsets cannot guarantee that STPCLK# signal
		   gets asserted in time to freeze execution properly. */
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		unused = inl(acpi_gbl_FADT.xpm_timer_block.address);
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	}
}
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#endif /* !CONFIG_CPU_IDLE */
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#ifdef ARCH_APICTIMER_STOPS_ON_C3

/*
 * Some BIOS implementations switch to C3 in the published C2 state.
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 * This seems to be a common problem on AMD boxen, but other vendors
 * are affected too. We pick the most conservative approach: we assume
 * that the local APIC stops in both C2 and C3.
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 */
static void acpi_timer_check_state(int state, struct acpi_processor *pr,
				   struct acpi_processor_cx *cx)
{
	struct acpi_processor_power *pwr = &pr->power;
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	u8 type = local_apic_timer_c2_ok ? ACPI_STATE_C3 : ACPI_STATE_C2;
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	/*
	 * Check, if one of the previous states already marked the lapic
	 * unstable
	 */
	if (pwr->timer_broadcast_on_state < state)
		return;

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	if (cx->type >= type)
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		pr->power.timer_broadcast_on_state = state;
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}

static void acpi_propagate_timer_broadcast(struct acpi_processor *pr)
{
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	unsigned long reason;

	reason = pr->power.timer_broadcast_on_state < INT_MAX ?
		CLOCK_EVT_NOTIFY_BROADCAST_ON : CLOCK_EVT_NOTIFY_BROADCAST_OFF;

	clockevents_notify(reason, &pr->id);
}

/* Power(C) State timer broadcast control */
static void acpi_state_timer_broadcast(struct acpi_processor *pr,
				       struct acpi_processor_cx *cx,
				       int broadcast)
{
	int state = cx - pr->power.states;

	if (state >= pr->power.timer_broadcast_on_state) {
		unsigned long reason;

		reason = broadcast ?  CLOCK_EVT_NOTIFY_BROADCAST_ENTER :
			CLOCK_EVT_NOTIFY_BROADCAST_EXIT;
		clockevents_notify(reason, &pr->id);
	}
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}

#else

static void acpi_timer_check_state(int state, struct acpi_processor *pr,
				   struct acpi_processor_cx *cstate) { }
static void acpi_propagate_timer_broadcast(struct acpi_processor *pr) { }
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static void acpi_state_timer_broadcast(struct acpi_processor *pr,
				       struct acpi_processor_cx *cx,
				       int broadcast)
{
}
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#endif

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/*
 * Suspend / resume control
 */
static int acpi_idle_suspend;

int acpi_processor_suspend(struct acpi_device * device, pm_message_t state)
{
	acpi_idle_suspend = 1;
	return 0;
}

int acpi_processor_resume(struct acpi_device * device)
{
	acpi_idle_suspend = 0;
	return 0;
}

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#if defined (CONFIG_GENERIC_TIME) && defined (CONFIG_X86)
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static int tsc_halts_in_c(int state)
{
	switch (boot_cpu_data.x86_vendor) {
	case X86_VENDOR_AMD:
		/*
		 * AMD Fam10h TSC will tick in all
		 * C/P/S0/S1 states when this bit is set.
		 */
		if (boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
			return 0;
		/*FALL THROUGH*/
	case X86_VENDOR_INTEL:
		/* Several cases known where TSC halts in C2 too */
	default:
		return state > ACPI_STATE_C1;
	}
}
#endif

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#ifndef CONFIG_CPU_IDLE
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static void acpi_processor_idle(void)
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{
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	struct acpi_processor *pr = NULL;
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	struct acpi_processor_cx *cx = NULL;
	struct acpi_processor_cx *next_state = NULL;
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	int sleep_ticks = 0;
	u32 t1, t2 = 0;
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	/*
	 * Interrupts must be disabled during bus mastering calculations and
	 * for C2/C3 transitions.
	 */
	local_irq_disable();

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	pr = __get_cpu_var(processors);
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	if (!pr) {
		local_irq_enable();
		return;
	}

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	/*
	 * Check whether we truly need to go idle, or should
	 * reschedule:
	 */
	if (unlikely(need_resched())) {
		local_irq_enable();
		return;
	}

	cx = pr->power.state;
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	if (!cx || acpi_idle_suspend) {
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		if (pm_idle_save) {
			pm_idle_save(); /* enables IRQs */
		} else {
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			acpi_safe_halt();
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			local_irq_enable();
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		}
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		return;
	}
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	/*
	 * Check BM Activity
	 * -----------------
	 * Check for bus mastering activity (if required), record, and check
	 * for demotion.
	 */
	if (pr->flags.bm_check) {
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		u32 bm_status = 0;
		unsigned long diff = jiffies - pr->power.bm_check_timestamp;
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		if (diff > 31)
			diff = 31;
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		pr->power.bm_activity <<= diff;
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		acpi_get_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status);
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		if (bm_status) {
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			pr->power.bm_activity |= 0x1;
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			acpi_set_register(ACPI_BITREG_BUS_MASTER_STATUS, 1);
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		}
		/*
		 * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect
		 * the true state of bus mastering activity; forcing us to
		 * manually check the BMIDEA bit of each IDE channel.
		 */
		else if (errata.piix4.bmisx) {
			if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01)
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			    || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01))
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				pr->power.bm_activity |= 0x1;
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		}

		pr->power.bm_check_timestamp = jiffies;

		/*
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		 * If bus mastering is or was active this jiffy, demote
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		 * to avoid a faulty transition.  Note that the processor
		 * won't enter a low-power state during this call (to this
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		 * function) but should upon the next.
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		 *
		 * TBD: A better policy might be to fallback to the demotion
		 *      state (use it for this quantum only) istead of
		 *      demoting -- and rely on duration as our sole demotion
		 *      qualification.  This may, however, introduce DMA
		 *      issues (e.g. floppy DMA transfer overrun/underrun).
		 */
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		if ((pr->power.bm_activity & 0x1) &&
		    cx->demotion.threshold.bm) {
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			local_irq_enable();
			next_state = cx->demotion.state;
			goto end;
		}
	}

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#ifdef CONFIG_HOTPLUG_CPU
	/*
	 * Check for P_LVL2_UP flag before entering C2 and above on
	 * an SMP system. We do it here instead of doing it at _CST/P_LVL
	 * detection phase, to work cleanly with logical CPU hotplug.
	 */
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	if ((cx->type != ACPI_STATE_C1) && (num_online_cpus() > 1) &&
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	    !pr->flags.has_cst && !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
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		cx = &pr->power.states[ACPI_STATE_C1];
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#endif
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	/*
	 * Sleep:
	 * ------
	 * Invoke the current Cx state to put the processor to sleep.
	 */
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	if (cx->type == ACPI_STATE_C2 || cx->type == ACPI_STATE_C3) {
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		current_thread_info()->status &= ~TS_POLLING;
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		/*
		 * TS_POLLING-cleared state must be visible before we
		 * test NEED_RESCHED:
		 */
		smp_mb();
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		if (need_resched()) {
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			current_thread_info()->status |= TS_POLLING;
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			local_irq_enable();
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			return;
		}
	}

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	switch (cx->type) {

	case ACPI_STATE_C1:
		/*
		 * Invoke C1.
		 * Use the appropriate idle routine, the one that would
		 * be used without acpi C-states.
		 */
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		if (pm_idle_save) {
			pm_idle_save(); /* enables IRQs */
		} else {
527
			acpi_safe_halt();
528 529
			local_irq_enable();
		}
530

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		/*
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532
		 * TBD: Can't get time duration while in C1, as resumes
L
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533 534
		 *      go to an ISR rather than here.  Need to instrument
		 *      base interrupt handler.
535 536 537
		 *
		 * Note: the TSC better not stop in C1, sched_clock() will
		 *       skew otherwise.
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538 539
		 */
		sleep_ticks = 0xFFFFFFFF;
540

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541 542 543 544
		break;

	case ACPI_STATE_C2:
		/* Get start time (ticks) */
545
		t1 = inl(acpi_gbl_FADT.xpm_timer_block.address);
546 547
		/* Tell the scheduler that we are going deep-idle: */
		sched_clock_idle_sleep_event();
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548
		/* Invoke C2 */
549
		acpi_state_timer_broadcast(pr, cx, 1);
550
		acpi_cstate_enter(cx);
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551
		/* Get end time (ticks) */
552
		t2 = inl(acpi_gbl_FADT.xpm_timer_block.address);
553

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554
#if defined (CONFIG_GENERIC_TIME) && defined (CONFIG_X86)
555
		/* TSC halts in C2, so notify users */
556 557
		if (tsc_halts_in_c(ACPI_STATE_C2))
			mark_tsc_unstable("possible TSC halt in C2");
558
#endif
559 560 561 562 563 564
		/* Compute time (ticks) that we were actually asleep */
		sleep_ticks = ticks_elapsed(t1, t2);

		/* Tell the scheduler how much we idled: */
		sched_clock_idle_wakeup_event(sleep_ticks*PM_TIMER_TICK_NS);

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		/* Re-enable interrupts */
		local_irq_enable();
567 568 569
		/* Do not account our idle-switching overhead: */
		sleep_ticks -= cx->latency_ticks + C2_OVERHEAD;

570
		current_thread_info()->status |= TS_POLLING;
571
		acpi_state_timer_broadcast(pr, cx, 0);
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		break;

	case ACPI_STATE_C3:
575
		acpi_unlazy_tlb(smp_processor_id());
576 577 578 579 580
		/*
		 * Must be done before busmaster disable as we might
		 * need to access HPET !
		 */
		acpi_state_timer_broadcast(pr, cx, 1);
581 582 583 584 585 586 587 588 589 590 591
		/*
		 * disable bus master
		 * bm_check implies we need ARB_DIS
		 * !bm_check implies we need cache flush
		 * bm_control implies whether we can do ARB_DIS
		 *
		 * That leaves a case where bm_check is set and bm_control is
		 * not set. In that case we cannot do much, we enter C3
		 * without doing anything.
		 */
		if (pr->flags.bm_check && pr->flags.bm_control) {
592
			if (atomic_inc_return(&c3_cpu_count) ==
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593
			    num_online_cpus()) {
594 595 596 597
				/*
				 * All CPUs are trying to go to C3
				 * Disable bus master arbitration
				 */
598
				acpi_set_register(ACPI_BITREG_ARB_DISABLE, 1);
599
			}
600
		} else if (!pr->flags.bm_check) {
601 602 603
			/* SMP with no shared cache... Invalidate cache  */
			ACPI_FLUSH_CPU_CACHE();
		}
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604

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605
		/* Get start time (ticks) */
606
		t1 = inl(acpi_gbl_FADT.xpm_timer_block.address);
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607
		/* Invoke C3 */
608 609
		/* Tell the scheduler that we are going deep-idle: */
		sched_clock_idle_sleep_event();
610
		acpi_cstate_enter(cx);
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611
		/* Get end time (ticks) */
612
		t2 = inl(acpi_gbl_FADT.xpm_timer_block.address);
613
		if (pr->flags.bm_check && pr->flags.bm_control) {
614 615
			/* Enable bus master arbitration */
			atomic_dec(&c3_cpu_count);
616
			acpi_set_register(ACPI_BITREG_ARB_DISABLE, 0);
617 618
		}

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619
#if defined (CONFIG_GENERIC_TIME) && defined (CONFIG_X86)
620
		/* TSC halts in C3, so notify users */
621 622
		if (tsc_halts_in_c(ACPI_STATE_C3))
			mark_tsc_unstable("TSC halts in C3");
623
#endif
624 625 626 627 628
		/* Compute time (ticks) that we were actually asleep */
		sleep_ticks = ticks_elapsed(t1, t2);
		/* Tell the scheduler how much we idled: */
		sched_clock_idle_wakeup_event(sleep_ticks*PM_TIMER_TICK_NS);

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629 630
		/* Re-enable interrupts */
		local_irq_enable();
631 632 633
		/* Do not account our idle-switching overhead: */
		sleep_ticks -= cx->latency_ticks + C3_OVERHEAD;

634
		current_thread_info()->status |= TS_POLLING;
635
		acpi_state_timer_broadcast(pr, cx, 0);
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		break;

	default:
		local_irq_enable();
		return;
	}
642 643 644
	cx->usage++;
	if ((cx->type != ACPI_STATE_C1) && (sleep_ticks > 0))
		cx->time += sleep_ticks;
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	next_state = pr->power.state;

648 649 650
#ifdef CONFIG_HOTPLUG_CPU
	/* Don't do promotion/demotion */
	if ((cx->type == ACPI_STATE_C1) && (num_online_cpus() > 1) &&
651
	    !pr->flags.has_cst && !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED)) {
652 653 654 655 656
		next_state = cx;
		goto end;
	}
#endif

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	/*
	 * Promotion?
	 * ----------
	 * Track the number of longs (time asleep is greater than threshold)
	 * and promote when the count threshold is reached.  Note that bus
	 * mastering activity may prevent promotions.
	 * Do not promote above max_cstate.
	 */
	if (cx->promotion.state &&
	    ((cx->promotion.state - pr->power.states) <= max_cstate)) {
667
		if (sleep_ticks > cx->promotion.threshold.ticks &&
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		  cx->promotion.state->latency <=
				pm_qos_requirement(PM_QOS_CPU_DMA_LATENCY)) {
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670
			cx->promotion.count++;
L
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671 672 673
			cx->demotion.count = 0;
			if (cx->promotion.count >=
			    cx->promotion.threshold.count) {
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674
				if (pr->flags.bm_check) {
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675 676 677 678 679
					if (!
					    (pr->power.bm_activity & cx->
					     promotion.threshold.bm)) {
						next_state =
						    cx->promotion.state;
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680 681
						goto end;
					}
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682
				} else {
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683 684 685 686 687 688 689 690 691 692 693 694 695 696 697 698 699 700 701 702 703 704 705 706
					next_state = cx->promotion.state;
					goto end;
				}
			}
		}
	}

	/*
	 * Demotion?
	 * ---------
	 * Track the number of shorts (time asleep is less than time threshold)
	 * and demote when the usage threshold is reached.
	 */
	if (cx->demotion.state) {
		if (sleep_ticks < cx->demotion.threshold.ticks) {
			cx->demotion.count++;
			cx->promotion.count = 0;
			if (cx->demotion.count >= cx->demotion.threshold.count) {
				next_state = cx->demotion.state;
				goto end;
			}
		}
	}

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707
      end:
L
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708 709
	/*
	 * Demote if current state exceeds max_cstate
710
	 * or if the latency of the current state is unacceptable
L
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711
	 */
712
	if ((pr->power.state - pr->power.states) > max_cstate ||
M
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713 714
		pr->power.state->latency >
				pm_qos_requirement(PM_QOS_CPU_DMA_LATENCY)) {
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715 716 717 718 719 720 721 722 723 724 725 726 727 728
		if (cx->demotion.state)
			next_state = cx->demotion.state;
	}

	/*
	 * New Cx State?
	 * -------------
	 * If we're going to start using a new Cx state we must clean up
	 * from the previous and prepare to use the new.
	 */
	if (next_state != pr->power.state)
		acpi_processor_power_activate(pr, next_state);
}

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729
static int acpi_processor_set_power_policy(struct acpi_processor *pr)
L
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730 731 732 733 734 735 736 737 738
{
	unsigned int i;
	unsigned int state_is_set = 0;
	struct acpi_processor_cx *lower = NULL;
	struct acpi_processor_cx *higher = NULL;
	struct acpi_processor_cx *cx;


	if (!pr)
739
		return -EINVAL;
L
Linus Torvalds 已提交
740 741 742 743 744 745 746 747 748 749 750

	/*
	 * This function sets the default Cx state policy (OS idle handler).
	 * Our scheme is to promote quickly to C2 but more conservatively
	 * to C3.  We're favoring C2  for its characteristics of low latency
	 * (quick response), good power savings, and ability to allow bus
	 * mastering activity.  Note that the Cx state policy is completely
	 * customizable and can be altered dynamically.
	 */

	/* startup state */
L
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751
	for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
L
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752 753 754 755 756 757 758 759
		cx = &pr->power.states[i];
		if (!cx->valid)
			continue;

		if (!state_is_set)
			pr->power.state = cx;
		state_is_set++;
		break;
L
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760
	}
L
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761 762

	if (!state_is_set)
763
		return -ENODEV;
L
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764 765

	/* demotion */
L
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766
	for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
L
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767 768 769 770 771 772 773 774 775 776 777 778 779 780 781 782 783 784 785 786 787 788
		cx = &pr->power.states[i];
		if (!cx->valid)
			continue;

		if (lower) {
			cx->demotion.state = lower;
			cx->demotion.threshold.ticks = cx->latency_ticks;
			cx->demotion.threshold.count = 1;
			if (cx->type == ACPI_STATE_C3)
				cx->demotion.threshold.bm = bm_history;
		}

		lower = cx;
	}

	/* promotion */
	for (i = (ACPI_PROCESSOR_MAX_POWER - 1); i > 0; i--) {
		cx = &pr->power.states[i];
		if (!cx->valid)
			continue;

		if (higher) {
L
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789
			cx->promotion.state = higher;
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790 791 792 793 794 795 796 797 798 799 800 801
			cx->promotion.threshold.ticks = cx->latency_ticks;
			if (cx->type >= ACPI_STATE_C2)
				cx->promotion.threshold.count = 4;
			else
				cx->promotion.threshold.count = 10;
			if (higher->type == ACPI_STATE_C3)
				cx->promotion.threshold.bm = bm_history;
		}

		higher = cx;
	}

802
	return 0;
L
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803
}
804
#endif /* !CONFIG_CPU_IDLE */
L
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805

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806
static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr)
L
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807 808 809
{

	if (!pr)
810
		return -EINVAL;
L
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811 812

	if (!pr->pblk)
813
		return -ENODEV;
L
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814 815 816 817 818

	/* if info is obtained from pblk/fadt, type equals state */
	pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2;
	pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3;

819 820 821
#ifndef CONFIG_HOTPLUG_CPU
	/*
	 * Check for P_LVL2_UP flag before entering C2 and above on
822
	 * an SMP system.
823
	 */
824
	if ((num_online_cpus() > 1) &&
825
	    !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
826
		return -ENODEV;
827 828
#endif

L
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829 830 831 832 833
	/* determine C2 and C3 address from pblk */
	pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4;
	pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5;

	/* determine latencies from FADT */
834 835
	pr->power.states[ACPI_STATE_C2].latency = acpi_gbl_FADT.C2latency;
	pr->power.states[ACPI_STATE_C3].latency = acpi_gbl_FADT.C3latency;
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836 837 838 839 840 841

	ACPI_DEBUG_PRINT((ACPI_DB_INFO,
			  "lvl2[0x%08x] lvl3[0x%08x]\n",
			  pr->power.states[ACPI_STATE_C2].address,
			  pr->power.states[ACPI_STATE_C3].address));

842
	return 0;
L
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843 844
}

845
static int acpi_processor_get_power_info_default(struct acpi_processor *pr)
846
{
847 848 849 850 851
	if (!pr->power.states[ACPI_STATE_C1].valid) {
		/* set the first C-State to C1 */
		/* all processors need to support C1 */
		pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1;
		pr->power.states[ACPI_STATE_C1].valid = 1;
852
		pr->power.states[ACPI_STATE_C1].entry_method = ACPI_CSTATE_HALT;
853 854
	}
	/* the C0 state only exists as a filler in our array */
855
	pr->power.states[ACPI_STATE_C0].valid = 1;
856
	return 0;
857 858
}

L
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859
static int acpi_processor_get_power_info_cst(struct acpi_processor *pr)
L
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860
{
L
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861 862
	acpi_status status = 0;
	acpi_integer count;
863
	int current_count;
L
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864 865 866
	int i;
	struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
	union acpi_object *cst;
L
Linus Torvalds 已提交
867 868 869


	if (nocst)
870
		return -ENODEV;
L
Linus Torvalds 已提交
871

872
	current_count = 0;
L
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873 874 875 876

	status = acpi_evaluate_object(pr->handle, "_CST", NULL, &buffer);
	if (ACPI_FAILURE(status)) {
		ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No _CST, giving up\n"));
877
		return -ENODEV;
L
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878
	}
L
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879

880
	cst = buffer.pointer;
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881 882 883

	/* There must be at least 2 elements */
	if (!cst || (cst->type != ACPI_TYPE_PACKAGE) || cst->package.count < 2) {
884
		printk(KERN_ERR PREFIX "not enough elements in _CST\n");
L
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885 886 887 888 889 890 891 892
		status = -EFAULT;
		goto end;
	}

	count = cst->package.elements[0].integer.value;

	/* Validate number of power states. */
	if (count < 1 || count != cst->package.count - 1) {
893
		printk(KERN_ERR PREFIX "count given by _CST is not valid\n");
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894 895 896 897 898 899 900 901 902 903 904 905 906 907 908
		status = -EFAULT;
		goto end;
	}

	/* Tell driver that at least _CST is supported. */
	pr->flags.has_cst = 1;

	for (i = 1; i <= count; i++) {
		union acpi_object *element;
		union acpi_object *obj;
		struct acpi_power_register *reg;
		struct acpi_processor_cx cx;

		memset(&cx, 0, sizeof(cx));

909
		element = &(cst->package.elements[i]);
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910 911 912 913 914 915
		if (element->type != ACPI_TYPE_PACKAGE)
			continue;

		if (element->package.count != 4)
			continue;

916
		obj = &(element->package.elements[0]);
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917 918 919 920

		if (obj->type != ACPI_TYPE_BUFFER)
			continue;

L
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921
		reg = (struct acpi_power_register *)obj->buffer.pointer;
L
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922 923

		if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO &&
L
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924
		    (reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE))
L
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925 926 927
			continue;

		/* There should be an easy way to extract an integer... */
928
		obj = &(element->package.elements[1]);
L
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929 930 931 932
		if (obj->type != ACPI_TYPE_INTEGER)
			continue;

		cx.type = obj->integer.value;
933 934 935 936 937 938 939 940 941 942
		/*
		 * Some buggy BIOSes won't list C1 in _CST -
		 * Let acpi_processor_get_power_info_default() handle them later
		 */
		if (i == 1 && cx.type != ACPI_STATE_C1)
			current_count++;

		cx.address = reg->address;
		cx.index = current_count + 1;

943
		cx.entry_method = ACPI_CSTATE_SYSTEMIO;
944 945 946
		if (reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE) {
			if (acpi_processor_ffh_cstate_probe
					(pr->id, &cx, reg) == 0) {
947 948
				cx.entry_method = ACPI_CSTATE_FFH;
			} else if (cx.type == ACPI_STATE_C1) {
949 950 951 952 953 954
				/*
				 * C1 is a special case where FIXED_HARDWARE
				 * can be handled in non-MWAIT way as well.
				 * In that case, save this _CST entry info.
				 * Otherwise, ignore this info and continue.
				 */
955
				cx.entry_method = ACPI_CSTATE_HALT;
956
				snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT");
957
			} else {
958 959
				continue;
			}
960 961
			if (cx.type == ACPI_STATE_C1 &&
					(idle_halt || idle_nomwait)) {
Z
Zhao Yakui 已提交
962 963 964 965 966 967
				/*
				 * In most cases the C1 space_id obtained from
				 * _CST object is FIXED_HARDWARE access mode.
				 * But when the option of idle=halt is added,
				 * the entry_method type should be changed from
				 * CSTATE_FFH to CSTATE_HALT.
968 969 970
				 * When the option of idle=nomwait is added,
				 * the C1 entry_method type should be
				 * CSTATE_HALT.
Z
Zhao Yakui 已提交
971 972 973 974
				 */
				cx.entry_method = ACPI_CSTATE_HALT;
				snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT");
			}
975 976 977
		} else {
			snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI IOPORT 0x%x",
				 cx.address);
978
		}
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979

980 981 982
		if (cx.type == ACPI_STATE_C1) {
			cx.valid = 1;
		}
983

984
		obj = &(element->package.elements[2]);
L
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985 986 987 988 989
		if (obj->type != ACPI_TYPE_INTEGER)
			continue;

		cx.latency = obj->integer.value;

990
		obj = &(element->package.elements[3]);
L
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991 992 993 994 995
		if (obj->type != ACPI_TYPE_INTEGER)
			continue;

		cx.power = obj->integer.value;

996 997 998 999 1000 1001 1002 1003 1004 1005 1006 1007 1008 1009 1010
		current_count++;
		memcpy(&(pr->power.states[current_count]), &cx, sizeof(cx));

		/*
		 * We support total ACPI_PROCESSOR_MAX_POWER - 1
		 * (From 1 through ACPI_PROCESSOR_MAX_POWER - 1)
		 */
		if (current_count >= (ACPI_PROCESSOR_MAX_POWER - 1)) {
			printk(KERN_WARNING
			       "Limiting number of power states to max (%d)\n",
			       ACPI_PROCESSOR_MAX_POWER);
			printk(KERN_WARNING
			       "Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n");
			break;
		}
L
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1011 1012
	}

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1013
	ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found %d power states\n",
1014
			  current_count));
L
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1015 1016

	/* Validate number of power states discovered */
1017
	if (current_count < 2)
1018
		status = -EFAULT;
L
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1019

L
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1020
      end:
1021
	kfree(buffer.pointer);
L
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1022

1023
	return status;
L
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1024 1025 1026 1027 1028 1029
}

static void acpi_processor_power_verify_c2(struct acpi_processor_cx *cx)
{

	if (!cx->address)
1030
		return;
L
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1031 1032 1033 1034 1035 1036 1037

	/*
	 * C2 latency must be less than or equal to 100
	 * microseconds.
	 */
	else if (cx->latency > ACPI_PROCESSOR_MAX_C2_LATENCY) {
		ACPI_DEBUG_PRINT((ACPI_DB_INFO,
L
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1038
				  "latency too large [%d]\n", cx->latency));
1039
		return;
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1040 1041 1042 1043 1044 1045 1046
	}

	/*
	 * Otherwise we've met all of our C2 requirements.
	 * Normalize the C2 latency to expidite policy
	 */
	cx->valid = 1;
1047 1048

#ifndef CONFIG_CPU_IDLE
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1049
	cx->latency_ticks = US_TO_PM_TIMER_TICKS(cx->latency);
1050 1051 1052
#else
	cx->latency_ticks = cx->latency;
#endif
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1053

1054
	return;
L
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1055 1056
}

L
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1057 1058
static void acpi_processor_power_verify_c3(struct acpi_processor *pr,
					   struct acpi_processor_cx *cx)
L
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1059
{
1060 1061
	static int bm_check_flag;

L
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1062 1063

	if (!cx->address)
1064
		return;
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1065 1066 1067 1068 1069 1070 1071

	/*
	 * C3 latency must be less than or equal to 1000
	 * microseconds.
	 */
	else if (cx->latency > ACPI_PROCESSOR_MAX_C3_LATENCY) {
		ACPI_DEBUG_PRINT((ACPI_DB_INFO,
L
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1072
				  "latency too large [%d]\n", cx->latency));
1073
		return;
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1074 1075 1076 1077 1078 1079 1080 1081 1082 1083 1084
	}

	/*
	 * PIIX4 Erratum #18: We don't support C3 when Type-F (fast)
	 * DMA transfers are used by any ISA device to avoid livelock.
	 * Note that we could disable Type-F DMA (as recommended by
	 * the erratum), but this is known to disrupt certain ISA
	 * devices thus we take the conservative approach.
	 */
	else if (errata.piix4.fdma) {
		ACPI_DEBUG_PRINT((ACPI_DB_INFO,
L
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1085
				  "C3 not supported on PIIX4 with Type-F DMA\n"));
1086
		return;
L
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1087 1088
	}

1089 1090 1091 1092 1093 1094 1095 1096 1097 1098 1099
	/* All the logic here assumes flags.bm_check is same across all CPUs */
	if (!bm_check_flag) {
		/* Determine whether bm_check is needed based on CPU  */
		acpi_processor_power_init_bm_check(&(pr->flags), pr->id);
		bm_check_flag = pr->flags.bm_check;
	} else {
		pr->flags.bm_check = bm_check_flag;
	}

	if (pr->flags.bm_check) {
		if (!pr->flags.bm_control) {
1100 1101 1102 1103 1104 1105 1106 1107 1108 1109
			if (pr->flags.has_cst != 1) {
				/* bus mastering control is necessary */
				ACPI_DEBUG_PRINT((ACPI_DB_INFO,
					"C3 support requires BM control\n"));
				return;
			} else {
				/* Here we enter C3 without bus mastering */
				ACPI_DEBUG_PRINT((ACPI_DB_INFO,
					"C3 support without BM control\n"));
			}
1110 1111 1112 1113 1114 1115
		}
	} else {
		/*
		 * WBINVD should be set in fadt, for C3 state to be
		 * supported on when bm_check is not required.
		 */
1116
		if (!(acpi_gbl_FADT.flags & ACPI_FADT_WBINVD)) {
1117
			ACPI_DEBUG_PRINT((ACPI_DB_INFO,
L
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1118 1119
					  "Cache invalidation should work properly"
					  " for C3 to be enabled on SMP systems\n"));
1120
			return;
1121
		}
1122
		acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 0);
1123 1124
	}

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	/*
	 * Otherwise we've met all of our C3 requirements.
	 * Normalize the C3 latency to expidite policy.  Enable
	 * checking of bus mastering status (bm_check) so we can
	 * use this in our C3 policy
	 */
	cx->valid = 1;
1132 1133

#ifndef CONFIG_CPU_IDLE
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1134
	cx->latency_ticks = US_TO_PM_TIMER_TICKS(cx->latency);
1135 1136 1137
#else
	cx->latency_ticks = cx->latency;
#endif
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1138

1139
	return;
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1140 1141 1142 1143 1144 1145
}

static int acpi_processor_power_verify(struct acpi_processor *pr)
{
	unsigned int i;
	unsigned int working = 0;
1146

1147
	pr->power.timer_broadcast_on_state = INT_MAX;
1148

L
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1149
	for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
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1150 1151 1152 1153 1154 1155 1156 1157 1158
		struct acpi_processor_cx *cx = &pr->power.states[i];

		switch (cx->type) {
		case ACPI_STATE_C1:
			cx->valid = 1;
			break;

		case ACPI_STATE_C2:
			acpi_processor_power_verify_c2(cx);
1159
			if (cx->valid)
1160
				acpi_timer_check_state(i, pr, cx);
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			break;

		case ACPI_STATE_C3:
			acpi_processor_power_verify_c3(pr, cx);
1165
			if (cx->valid)
1166
				acpi_timer_check_state(i, pr, cx);
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			break;
		}

		if (cx->valid)
			working++;
	}
1173

1174
	acpi_propagate_timer_broadcast(pr);
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1175 1176 1177 1178

	return (working);
}

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static int acpi_processor_get_power_info(struct acpi_processor *pr)
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1180 1181 1182 1183 1184 1185 1186 1187
{
	unsigned int i;
	int result;


	/* NOTE: the idle thread may not be running while calling
	 * this function */

1188 1189 1190
	/* Zero initialize all the C-states info. */
	memset(pr->power.states, 0, sizeof(pr->power.states));

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	result = acpi_processor_get_power_info_cst(pr);
1192
	if (result == -ENODEV)
1193
		result = acpi_processor_get_power_info_fadt(pr);
1194

1195 1196 1197 1198 1199
	if (result)
		return result;

	acpi_processor_get_power_info_default(pr);

1200
	pr->power.count = acpi_processor_power_verify(pr);
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1201

1202
#ifndef CONFIG_CPU_IDLE
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	/*
	 * Set Default Policy
	 * ------------------
	 * Now that we know which states are supported, set the default
	 * policy.  Note that this policy can be changed dynamically
	 * (e.g. encourage deeper sleeps to conserve battery life when
	 * not on AC).
	 */
	result = acpi_processor_set_power_policy(pr);
	if (result)
1213
		return result;
1214
#endif
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1215 1216 1217 1218 1219 1220

	/*
	 * if one state of type C2 or C3 is available, mark this
	 * CPU as being "idle manageable"
	 */
	for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
1221
		if (pr->power.states[i].valid) {
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			pr->power.count = i;
1223 1224
			if (pr->power.states[i].type >= ACPI_STATE_C2)
				pr->flags.power = 1;
1225
		}
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1226 1227
	}

1228
	return 0;
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1229 1230 1231 1232
}

static int acpi_processor_power_seq_show(struct seq_file *seq, void *offset)
{
1233
	struct acpi_processor *pr = seq->private;
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1234
	unsigned int i;
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1235 1236 1237 1238 1239 1240


	if (!pr)
		goto end;

	seq_printf(seq, "active state:            C%zd\n"
L
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1241
		   "max_cstate:              C%d\n"
1242 1243
		   "bus master activity:     %08x\n"
		   "maximum allowed latency: %d usec\n",
L
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1244
		   pr->power.state ? pr->power.state - pr->power.states : 0,
1245
		   max_cstate, (unsigned)pr->power.bm_activity,
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1246
		   pm_qos_requirement(PM_QOS_CPU_DMA_LATENCY));
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1247 1248 1249 1250 1251

	seq_puts(seq, "states:\n");

	for (i = 1; i <= pr->power.count; i++) {
		seq_printf(seq, "   %cC%d:                  ",
L
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1252 1253
			   (&pr->power.states[i] ==
			    pr->power.state ? '*' : ' '), i);
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1254 1255 1256 1257 1258 1259 1260 1261 1262 1263 1264 1265 1266 1267 1268 1269 1270 1271 1272 1273 1274 1275 1276

		if (!pr->power.states[i].valid) {
			seq_puts(seq, "<not supported>\n");
			continue;
		}

		switch (pr->power.states[i].type) {
		case ACPI_STATE_C1:
			seq_printf(seq, "type[C1] ");
			break;
		case ACPI_STATE_C2:
			seq_printf(seq, "type[C2] ");
			break;
		case ACPI_STATE_C3:
			seq_printf(seq, "type[C3] ");
			break;
		default:
			seq_printf(seq, "type[--] ");
			break;
		}

		if (pr->power.states[i].promotion.state)
			seq_printf(seq, "promotion[C%zd] ",
L
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1277 1278
				   (pr->power.states[i].promotion.state -
				    pr->power.states));
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1279 1280 1281 1282 1283
		else
			seq_puts(seq, "promotion[--] ");

		if (pr->power.states[i].demotion.state)
			seq_printf(seq, "demotion[C%zd] ",
L
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1284 1285
				   (pr->power.states[i].demotion.state -
				    pr->power.states));
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1286 1287 1288
		else
			seq_puts(seq, "demotion[--] ");

1289
		seq_printf(seq, "latency[%03d] usage[%08d] duration[%020llu]\n",
L
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1290
			   pr->power.states[i].latency,
1291
			   pr->power.states[i].usage,
1292
			   (unsigned long long)pr->power.states[i].time);
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1293 1294
	}

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1295
      end:
1296
	return 0;
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1297 1298 1299 1300 1301
}

static int acpi_processor_power_open_fs(struct inode *inode, struct file *file)
{
	return single_open(file, acpi_processor_power_seq_show,
L
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1302
			   PDE(inode)->data);
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1303 1304
}

1305
static const struct file_operations acpi_processor_power_fops = {
1306
	.owner = THIS_MODULE,
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	.open = acpi_processor_power_open_fs,
	.read = seq_read,
	.llseek = seq_lseek,
	.release = single_release,
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1311 1312
};

1313 1314 1315 1316 1317 1318
#ifndef CONFIG_CPU_IDLE

int acpi_processor_cst_has_changed(struct acpi_processor *pr)
{
	int result = 0;

1319 1320
	if (boot_option_idle_override)
		return 0;
1321 1322 1323 1324 1325 1326 1327 1328 1329 1330 1331 1332 1333 1334 1335 1336 1337 1338 1339 1340 1341 1342 1343

	if (!pr)
		return -EINVAL;

	if (nocst) {
		return -ENODEV;
	}

	if (!pr->flags.power_setup_done)
		return -ENODEV;

	/* Fall back to the default idle loop */
	pm_idle = pm_idle_save;
	synchronize_sched();	/* Relies on interrupts forcing exit from idle. */

	pr->flags.power = 0;
	result = acpi_processor_get_power_info(pr);
	if ((pr->flags.power == 1) && (pr->flags.power_setup_done))
		pm_idle = acpi_processor_idle;

	return result;
}

1344
#ifdef CONFIG_SMP
1345 1346 1347 1348 1349 1350 1351 1352 1353 1354 1355 1356 1357 1358
static void smp_callback(void *v)
{
	/* we already woke the CPU up, nothing more to do */
}

/*
 * This function gets called when a part of the kernel has a new latency
 * requirement.  This means we need to get all processors out of their C-state,
 * and then recalculate a new suitable C-state. Just do a cross-cpu IPI; that
 * wakes them all right up.
 */
static int acpi_processor_latency_notify(struct notifier_block *b,
		unsigned long l, void *v)
{
1359
	smp_call_function(smp_callback, NULL, 1);
1360 1361 1362 1363 1364 1365
	return NOTIFY_OK;
}

static struct notifier_block acpi_processor_latency_notifier = {
	.notifier_call = acpi_processor_latency_notify,
};
1366 1367 1368 1369 1370 1371 1372 1373 1374 1375 1376 1377 1378 1379 1380 1381 1382 1383 1384 1385 1386 1387 1388 1389 1390 1391 1392 1393 1394 1395 1396 1397 1398 1399 1400 1401 1402 1403 1404 1405 1406 1407 1408 1409 1410 1411 1412 1413 1414 1415

#endif

#else /* CONFIG_CPU_IDLE */

/**
 * acpi_idle_bm_check - checks if bus master activity was detected
 */
static int acpi_idle_bm_check(void)
{
	u32 bm_status = 0;

	acpi_get_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status);
	if (bm_status)
		acpi_set_register(ACPI_BITREG_BUS_MASTER_STATUS, 1);
	/*
	 * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect
	 * the true state of bus mastering activity; forcing us to
	 * manually check the BMIDEA bit of each IDE channel.
	 */
	else if (errata.piix4.bmisx) {
		if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01)
		    || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01))
			bm_status = 1;
	}
	return bm_status;
}

/**
 * acpi_idle_update_bm_rld - updates the BM_RLD bit depending on target state
 * @pr: the processor
 * @target: the new target state
 */
static inline void acpi_idle_update_bm_rld(struct acpi_processor *pr,
					   struct acpi_processor_cx *target)
{
	if (pr->flags.bm_rld_set && target->type != ACPI_STATE_C3) {
		acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 0);
		pr->flags.bm_rld_set = 0;
	}

	if (!pr->flags.bm_rld_set && target->type == ACPI_STATE_C3) {
		acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 1);
		pr->flags.bm_rld_set = 1;
	}
}

/**
 * acpi_idle_do_entry - a helper function that does C2 and C3 type entry
 * @cx: cstate data
1416 1417
 *
 * Caller disables interrupt before call and enables interrupt after return.
1418 1419 1420
 */
static inline void acpi_idle_do_entry(struct acpi_processor_cx *cx)
{
1421
	if (cx->entry_method == ACPI_CSTATE_FFH) {
1422 1423
		/* Call into architectural FFH based C-state */
		acpi_processor_ffh_cstate_enter(cx);
1424 1425
	} else if (cx->entry_method == ACPI_CSTATE_HALT) {
		acpi_safe_halt();
1426 1427 1428 1429 1430 1431 1432 1433 1434 1435 1436 1437 1438 1439 1440 1441 1442 1443 1444 1445 1446
	} else {
		int unused;
		/* IO port based C-state */
		inb(cx->address);
		/* Dummy wait op - must do something useless after P_LVL2 read
		   because chipsets cannot guarantee that STPCLK# signal
		   gets asserted in time to freeze execution properly. */
		unused = inl(acpi_gbl_FADT.xpm_timer_block.address);
	}
}

/**
 * acpi_idle_enter_c1 - enters an ACPI C1 state-type
 * @dev: the target CPU
 * @state: the state data
 *
 * This is equivalent to the HALT instruction.
 */
static int acpi_idle_enter_c1(struct cpuidle_device *dev,
			      struct cpuidle_state *state)
{
1447
	u32 t1, t2;
1448 1449
	struct acpi_processor *pr;
	struct acpi_processor_cx *cx = cpuidle_get_statedata(state);
1450

1451
	pr = __get_cpu_var(processors);
1452 1453 1454 1455

	if (unlikely(!pr))
		return 0;

1456
	local_irq_disable();
1457 1458 1459 1460 1461 1462 1463 1464

	/* Do not access any ACPI IO ports in suspend path */
	if (acpi_idle_suspend) {
		acpi_safe_halt();
		local_irq_enable();
		return 0;
	}

1465 1466 1467
	if (pr->flags.bm_check)
		acpi_idle_update_bm_rld(pr, cx);

1468
	t1 = inl(acpi_gbl_FADT.xpm_timer_block.address);
1469
	acpi_idle_do_entry(cx);
1470
	t2 = inl(acpi_gbl_FADT.xpm_timer_block.address);
1471

1472
	local_irq_enable();
1473 1474
	cx->usage++;

1475
	return ticks_elapsed_in_us(t1, t2);
1476 1477 1478 1479 1480 1481 1482 1483 1484 1485 1486 1487 1488
}

/**
 * acpi_idle_enter_simple - enters an ACPI state without BM handling
 * @dev: the target CPU
 * @state: the state data
 */
static int acpi_idle_enter_simple(struct cpuidle_device *dev,
				  struct cpuidle_state *state)
{
	struct acpi_processor *pr;
	struct acpi_processor_cx *cx = cpuidle_get_statedata(state);
	u32 t1, t2;
1489 1490
	int sleep_ticks = 0;

1491
	pr = __get_cpu_var(processors);
1492 1493 1494 1495

	if (unlikely(!pr))
		return 0;

1496 1497 1498
	if (acpi_idle_suspend)
		return(acpi_idle_enter_c1(dev, state));

1499 1500 1501 1502 1503 1504 1505 1506 1507 1508 1509 1510 1511 1512
	local_irq_disable();
	current_thread_info()->status &= ~TS_POLLING;
	/*
	 * TS_POLLING-cleared state must be visible before we test
	 * NEED_RESCHED:
	 */
	smp_mb();

	if (unlikely(need_resched())) {
		current_thread_info()->status |= TS_POLLING;
		local_irq_enable();
		return 0;
	}

1513 1514 1515 1516 1517 1518 1519 1520 1521
	/*
	 * Must be done before busmaster disable as we might need to
	 * access HPET !
	 */
	acpi_state_timer_broadcast(pr, cx, 1);

	if (pr->flags.bm_check)
		acpi_idle_update_bm_rld(pr, cx);

1522 1523 1524 1525
	if (cx->type == ACPI_STATE_C3)
		ACPI_FLUSH_CPU_CACHE();

	t1 = inl(acpi_gbl_FADT.xpm_timer_block.address);
1526 1527
	/* Tell the scheduler that we are going deep-idle: */
	sched_clock_idle_sleep_event();
1528 1529 1530
	acpi_idle_do_entry(cx);
	t2 = inl(acpi_gbl_FADT.xpm_timer_block.address);

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Pavel Machek 已提交
1531
#if defined (CONFIG_GENERIC_TIME) && defined (CONFIG_X86)
1532
	/* TSC could halt in idle, so notify users */
1533 1534
	if (tsc_halts_in_c(cx->type))
		mark_tsc_unstable("TSC halts in idle");;
1535
#endif
1536 1537 1538 1539
	sleep_ticks = ticks_elapsed(t1, t2);

	/* Tell the scheduler how much we idled: */
	sched_clock_idle_wakeup_event(sleep_ticks*PM_TIMER_TICK_NS);
1540 1541 1542 1543 1544 1545 1546

	local_irq_enable();
	current_thread_info()->status |= TS_POLLING;

	cx->usage++;

	acpi_state_timer_broadcast(pr, cx, 0);
1547
	cx->time += sleep_ticks;
1548 1549 1550 1551 1552 1553 1554 1555 1556 1557 1558 1559 1560 1561 1562 1563 1564 1565 1566
	return ticks_elapsed_in_us(t1, t2);
}

static int c3_cpu_count;
static DEFINE_SPINLOCK(c3_lock);

/**
 * acpi_idle_enter_bm - enters C3 with proper BM handling
 * @dev: the target CPU
 * @state: the state data
 *
 * If BM is detected, the deepest non-C3 idle state is entered instead.
 */
static int acpi_idle_enter_bm(struct cpuidle_device *dev,
			      struct cpuidle_state *state)
{
	struct acpi_processor *pr;
	struct acpi_processor_cx *cx = cpuidle_get_statedata(state);
	u32 t1, t2;
1567 1568
	int sleep_ticks = 0;

1569
	pr = __get_cpu_var(processors);
1570 1571 1572 1573

	if (unlikely(!pr))
		return 0;

1574 1575 1576
	if (acpi_idle_suspend)
		return(acpi_idle_enter_c1(dev, state));

1577 1578 1579 1580
	if (acpi_idle_bm_check()) {
		if (dev->safe_state) {
			return dev->safe_state->enter(dev, dev->safe_state);
		} else {
1581
			local_irq_disable();
1582
			acpi_safe_halt();
1583
			local_irq_enable();
1584 1585 1586 1587
			return 0;
		}
	}

1588 1589 1590 1591 1592 1593 1594 1595 1596 1597 1598 1599 1600 1601
	local_irq_disable();
	current_thread_info()->status &= ~TS_POLLING;
	/*
	 * TS_POLLING-cleared state must be visible before we test
	 * NEED_RESCHED:
	 */
	smp_mb();

	if (unlikely(need_resched())) {
		current_thread_info()->status |= TS_POLLING;
		local_irq_enable();
		return 0;
	}

1602 1603
	acpi_unlazy_tlb(smp_processor_id());

1604 1605
	/* Tell the scheduler that we are going deep-idle: */
	sched_clock_idle_sleep_event();
1606 1607 1608 1609 1610 1611
	/*
	 * Must be done before busmaster disable as we might need to
	 * access HPET !
	 */
	acpi_state_timer_broadcast(pr, cx, 1);

1612
	acpi_idle_update_bm_rld(pr, cx);
1613

1614 1615 1616 1617 1618 1619 1620 1621 1622 1623 1624
	/*
	 * disable bus master
	 * bm_check implies we need ARB_DIS
	 * !bm_check implies we need cache flush
	 * bm_control implies whether we can do ARB_DIS
	 *
	 * That leaves a case where bm_check is set and bm_control is
	 * not set. In that case we cannot do much, we enter C3
	 * without doing anything.
	 */
	if (pr->flags.bm_check && pr->flags.bm_control) {
1625 1626 1627 1628 1629 1630
		spin_lock(&c3_lock);
		c3_cpu_count++;
		/* Disable bus master arbitration when all CPUs are in C3 */
		if (c3_cpu_count == num_online_cpus())
			acpi_set_register(ACPI_BITREG_ARB_DISABLE, 1);
		spin_unlock(&c3_lock);
1631 1632 1633
	} else if (!pr->flags.bm_check) {
		ACPI_FLUSH_CPU_CACHE();
	}
1634

1635 1636 1637
	t1 = inl(acpi_gbl_FADT.xpm_timer_block.address);
	acpi_idle_do_entry(cx);
	t2 = inl(acpi_gbl_FADT.xpm_timer_block.address);
1638

1639 1640
	/* Re-enable bus master arbitration */
	if (pr->flags.bm_check && pr->flags.bm_control) {
1641
		spin_lock(&c3_lock);
1642
		acpi_set_register(ACPI_BITREG_ARB_DISABLE, 0);
1643 1644 1645 1646
		c3_cpu_count--;
		spin_unlock(&c3_lock);
	}

P
Pavel Machek 已提交
1647
#if defined (CONFIG_GENERIC_TIME) && defined (CONFIG_X86)
1648
	/* TSC could halt in idle, so notify users */
1649 1650
	if (tsc_halts_in_c(ACPI_STATE_C3))
		mark_tsc_unstable("TSC halts in idle");
1651
#endif
1652 1653 1654
	sleep_ticks = ticks_elapsed(t1, t2);
	/* Tell the scheduler how much we idled: */
	sched_clock_idle_wakeup_event(sleep_ticks*PM_TIMER_TICK_NS);
1655 1656 1657 1658 1659 1660 1661

	local_irq_enable();
	current_thread_info()->status |= TS_POLLING;

	cx->usage++;

	acpi_state_timer_broadcast(pr, cx, 0);
1662
	cx->time += sleep_ticks;
1663 1664 1665 1666 1667 1668 1669 1670 1671 1672 1673 1674 1675 1676
	return ticks_elapsed_in_us(t1, t2);
}

struct cpuidle_driver acpi_idle_driver = {
	.name =		"acpi_idle",
	.owner =	THIS_MODULE,
};

/**
 * acpi_processor_setup_cpuidle - prepares and configures CPUIDLE
 * @pr: the ACPI processor
 */
static int acpi_processor_setup_cpuidle(struct acpi_processor *pr)
{
1677
	int i, count = CPUIDLE_DRIVER_STATE_START;
1678 1679 1680 1681 1682 1683 1684 1685 1686 1687 1688
	struct acpi_processor_cx *cx;
	struct cpuidle_state *state;
	struct cpuidle_device *dev = &pr->power.dev;

	if (!pr->flags.power_setup_done)
		return -EINVAL;

	if (pr->flags.power == 0) {
		return -EINVAL;
	}

1689
	dev->cpu = pr->id;
1690 1691 1692 1693 1694
	for (i = 0; i < CPUIDLE_STATE_MAX; i++) {
		dev->states[i].name[0] = '\0';
		dev->states[i].desc[0] = '\0';
	}

1695 1696 1697 1698 1699 1700 1701 1702 1703 1704 1705 1706
	for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
		cx = &pr->power.states[i];
		state = &dev->states[count];

		if (!cx->valid)
			continue;

#ifdef CONFIG_HOTPLUG_CPU
		if ((cx->type != ACPI_STATE_C1) && (num_online_cpus() > 1) &&
		    !pr->flags.has_cst &&
		    !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
			continue;
1707
#endif
1708 1709 1710
		cpuidle_set_statedata(state, cx);

		snprintf(state->name, CPUIDLE_NAME_LEN, "C%d", i);
1711
		strncpy(state->desc, cx->desc, CPUIDLE_DESC_LEN);
1712
		state->exit_latency = cx->latency;
1713
		state->target_residency = cx->latency * latency_factor;
1714 1715 1716 1717 1718 1719
		state->power_usage = cx->power;

		state->flags = 0;
		switch (cx->type) {
			case ACPI_STATE_C1:
			state->flags |= CPUIDLE_FLAG_SHALLOW;
1720 1721 1722
			if (cx->entry_method == ACPI_CSTATE_FFH)
				state->flags |= CPUIDLE_FLAG_TIME_VALID;

1723
			state->enter = acpi_idle_enter_c1;
1724
			dev->safe_state = state;
1725 1726 1727 1728 1729 1730
			break;

			case ACPI_STATE_C2:
			state->flags |= CPUIDLE_FLAG_BALANCED;
			state->flags |= CPUIDLE_FLAG_TIME_VALID;
			state->enter = acpi_idle_enter_simple;
1731
			dev->safe_state = state;
1732 1733 1734 1735 1736 1737 1738 1739 1740 1741 1742 1743 1744
			break;

			case ACPI_STATE_C3:
			state->flags |= CPUIDLE_FLAG_DEEP;
			state->flags |= CPUIDLE_FLAG_TIME_VALID;
			state->flags |= CPUIDLE_FLAG_CHECK_BM;
			state->enter = pr->flags.bm_check ?
					acpi_idle_enter_bm :
					acpi_idle_enter_simple;
			break;
		}

		count++;
1745 1746
		if (count == CPUIDLE_STATE_MAX)
			break;
1747 1748 1749 1750 1751 1752 1753 1754 1755 1756 1757 1758
	}

	dev->state_count = count;

	if (!count)
		return -EINVAL;

	return 0;
}

int acpi_processor_cst_has_changed(struct acpi_processor *pr)
{
1759
	int ret = 0;
1760

1761 1762 1763
	if (boot_option_idle_override)
		return 0;

1764 1765 1766 1767 1768 1769 1770 1771 1772 1773 1774 1775 1776
	if (!pr)
		return -EINVAL;

	if (nocst) {
		return -ENODEV;
	}

	if (!pr->flags.power_setup_done)
		return -ENODEV;

	cpuidle_pause_and_lock();
	cpuidle_disable_device(&pr->power.dev);
	acpi_processor_get_power_info(pr);
1777 1778 1779 1780
	if (pr->flags.power) {
		acpi_processor_setup_cpuidle(pr);
		ret = cpuidle_enable_device(&pr->power.dev);
	}
1781 1782 1783 1784 1785 1786
	cpuidle_resume_and_unlock();

	return ret;
}

#endif /* CONFIG_CPU_IDLE */
1787

1788
int __cpuinit acpi_processor_power_init(struct acpi_processor *pr,
L
Len Brown 已提交
1789
			      struct acpi_device *device)
L
Linus Torvalds 已提交
1790
{
L
Len Brown 已提交
1791
	acpi_status status = 0;
1792
	static int first_run;
L
Len Brown 已提交
1793
	struct proc_dir_entry *entry = NULL;
L
Linus Torvalds 已提交
1794 1795
	unsigned int i;

1796 1797
	if (boot_option_idle_override)
		return 0;
L
Linus Torvalds 已提交
1798 1799

	if (!first_run) {
Z
Zhao Yakui 已提交
1800 1801 1802 1803 1804 1805 1806 1807 1808
		if (idle_halt) {
			/*
			 * When the boot option of "idle=halt" is added, halt
			 * is used for CPU IDLE.
			 * In such case C2/C3 is meaningless. So the max_cstate
			 * is set to one.
			 */
			max_cstate = 1;
		}
L
Linus Torvalds 已提交
1809
		dmi_check_system(processor_power_dmi_table);
1810
		max_cstate = acpi_processor_cstate_check(max_cstate);
L
Linus Torvalds 已提交
1811
		if (max_cstate < ACPI_C_STATES_MAX)
L
Len Brown 已提交
1812 1813 1814
			printk(KERN_NOTICE
			       "ACPI: processor limited to max C-state %d\n",
			       max_cstate);
L
Linus Torvalds 已提交
1815
		first_run++;
M
Mark Gross 已提交
1816 1817 1818
#if !defined(CONFIG_CPU_IDLE) && defined(CONFIG_SMP)
		pm_qos_add_notifier(PM_QOS_CPU_DMA_LATENCY,
				&acpi_processor_latency_notifier);
1819
#endif
L
Linus Torvalds 已提交
1820 1821
	}

1822
	if (!pr)
1823
		return -EINVAL;
1824

1825
	if (acpi_gbl_FADT.cst_control && !nocst) {
L
Len Brown 已提交
1826
		status =
1827
		    acpi_os_write_port(acpi_gbl_FADT.smi_command, acpi_gbl_FADT.cst_control, 8);
L
Linus Torvalds 已提交
1828
		if (ACPI_FAILURE(status)) {
1829 1830
			ACPI_EXCEPTION((AE_INFO, status,
					"Notifying BIOS of _CST ability failed"));
L
Linus Torvalds 已提交
1831 1832 1833 1834
		}
	}

	acpi_processor_get_power_info(pr);
1835
	pr->flags.power_setup_done = 1;
L
Linus Torvalds 已提交
1836 1837 1838 1839 1840 1841

	/*
	 * Install the idle handler if processor power management is supported.
	 * Note that we use previously set idle handler will be used on
	 * platforms that only support C1.
	 */
1842
	if (pr->flags.power) {
1843 1844 1845 1846 1847 1848
#ifdef CONFIG_CPU_IDLE
		acpi_processor_setup_cpuidle(pr);
		if (cpuidle_register_device(&pr->power.dev))
			return -EIO;
#endif

L
Linus Torvalds 已提交
1849 1850 1851
		printk(KERN_INFO PREFIX "CPU%d (power states:", pr->id);
		for (i = 1; i <= pr->power.count; i++)
			if (pr->power.states[i].valid)
L
Len Brown 已提交
1852 1853
				printk(" C%d[C%d]", i,
				       pr->power.states[i].type);
L
Linus Torvalds 已提交
1854 1855
		printk(")\n");

1856
#ifndef CONFIG_CPU_IDLE
L
Linus Torvalds 已提交
1857 1858 1859 1860
		if (pr->id == 0) {
			pm_idle_save = pm_idle;
			pm_idle = acpi_processor_idle;
		}
1861
#endif
L
Linus Torvalds 已提交
1862 1863 1864
	}

	/* 'power' [R] */
1865 1866 1867 1868
	entry = proc_create_data(ACPI_PROCESSOR_FILE_POWER,
				 S_IRUGO, acpi_device_dir(device),
				 &acpi_processor_power_fops,
				 acpi_driver_data(device));
L
Linus Torvalds 已提交
1869
	if (!entry)
1870
		return -EIO;
1871
	return 0;
L
Linus Torvalds 已提交
1872 1873
}

L
Len Brown 已提交
1874 1875
int acpi_processor_power_exit(struct acpi_processor *pr,
			      struct acpi_device *device)
L
Linus Torvalds 已提交
1876
{
1877 1878 1879
	if (boot_option_idle_override)
		return 0;

1880
#ifdef CONFIG_CPU_IDLE
1881
	cpuidle_unregister_device(&pr->power.dev);
1882
#endif
L
Linus Torvalds 已提交
1883 1884 1885
	pr->flags.power_setup_done = 0;

	if (acpi_device_dir(device))
L
Len Brown 已提交
1886 1887
		remove_proc_entry(ACPI_PROCESSOR_FILE_POWER,
				  acpi_device_dir(device));
L
Linus Torvalds 已提交
1888

1889 1890
#ifndef CONFIG_CPU_IDLE

L
Linus Torvalds 已提交
1891 1892 1893 1894 1895 1896 1897 1898 1899 1900
	/* Unregister the idle handler when processor #0 is removed. */
	if (pr->id == 0) {
		pm_idle = pm_idle_save;

		/*
		 * We are about to unload the current idle thread pm callback
		 * (pm_idle), Wait for all processors to update cached/local
		 * copies of pm_idle before proceeding.
		 */
		cpu_idle_wait();
1901
#ifdef CONFIG_SMP
M
Mark Gross 已提交
1902 1903
		pm_qos_remove_notifier(PM_QOS_CPU_DMA_LATENCY,
				&acpi_processor_latency_notifier);
1904
#endif
L
Linus Torvalds 已提交
1905
	}
1906
#endif
L
Linus Torvalds 已提交
1907

1908
	return 0;
L
Linus Torvalds 已提交
1909
}