i915_gem_context.c 58.8 KB
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/*
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 * SPDX-License-Identifier: MIT
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 *
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 * Copyright © 2011-2012 Intel Corporation
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 */

/*
 * This file implements HW context support. On gen5+ a HW context consists of an
 * opaque GPU object which is referenced at times of context saves and restores.
 * With RC6 enabled, the context is also referenced as the GPU enters and exists
 * from RC6 (GPU has it's own internal power context, except on gen5). Though
 * something like a context does exist for the media ring, the code only
 * supports contexts for the render ring.
 *
 * In software, there is a distinction between contexts created by the user,
 * and the default HW context. The default HW context is used by GPU clients
 * that do not request setup of their own hardware context. The default
 * context's state is never restored to help prevent programming errors. This
 * would happen if a client ran and piggy-backed off another clients GPU state.
 * The default context only exists to give the GPU some offset to load as the
 * current to invoke a save of the context we actually care about. In fact, the
 * code could likely be constructed, albeit in a more complicated fashion, to
 * never use the default context, though that limits the driver's ability to
 * swap out, and/or destroy other contexts.
 *
 * All other contexts are created as a request by the GPU client. These contexts
 * store GPU state, and thus allow GPU clients to not re-emit state (and
 * potentially query certain state) at any time. The kernel driver makes
 * certain that the appropriate commands are inserted.
 *
 * The context life cycle is semi-complicated in that context BOs may live
 * longer than the context itself because of the way the hardware, and object
 * tracking works. Below is a very crude representation of the state machine
 * describing the context life.
 *                                         refcount     pincount     active
 * S0: initial state                          0            0           0
 * S1: context created                        1            0           0
 * S2: context is currently running           2            1           X
 * S3: GPU referenced, but not current        2            0           1
 * S4: context is current, but destroyed      1            1           0
 * S5: like S3, but destroyed                 1            0           1
 *
 * The most common (but not all) transitions:
 * S0->S1: client creates a context
 * S1->S2: client submits execbuf with context
 * S2->S3: other clients submits execbuf with context
 * S3->S1: context object was retired
 * S3->S2: clients submits another execbuf
 * S2->S4: context destroy called with current context
 * S3->S5->S0: destroy path
 * S4->S5->S0: destroy path on current context
 *
 * There are two confusing terms used above:
 *  The "current context" means the context which is currently running on the
D
Damien Lespiau 已提交
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 *  GPU. The GPU has loaded its state already and has stored away the gtt
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 *  offset of the BO. The GPU is not actively referencing the data at this
 *  offset, but it will on the next context switch. The only way to avoid this
 *  is to do a GPU reset.
 *
 *  An "active context' is one which was previously the "current context" and is
 *  on the active list waiting for the next context switch to occur. Until this
 *  happens, the object must remain at the same gtt offset. It is therefore
 *  possible to destroy a context, but it is still active.
 *
 */

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#include <linux/log2.h>
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#include <linux/nospec.h>
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#include <drm/i915_drm.h>
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#include "gt/intel_engine_heartbeat.h"
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#include "gt/intel_engine_user.h"
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#include "gt/intel_lrc_reg.h"
#include "gt/intel_ring.h"
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#include "i915_gem_context.h"
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#include "i915_globals.h"
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#include "i915_trace.h"
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#include "i915_user_extensions.h"
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#define ALL_L3_SLICES(dev) (1 << NUM_L3_SLICES(dev)) - 1

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static struct i915_global_gem_context {
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	struct i915_global base;
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	struct kmem_cache *slab_luts;
} global;

struct i915_lut_handle *i915_lut_handle_alloc(void)
{
	return kmem_cache_alloc(global.slab_luts, GFP_KERNEL);
}

void i915_lut_handle_free(struct i915_lut_handle *lut)
{
	return kmem_cache_free(global.slab_luts, lut);
}

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static void lut_close(struct i915_gem_context *ctx)
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{
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	struct radix_tree_iter iter;
	void __rcu **slot;

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	lockdep_assert_held(&ctx->mutex);
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	rcu_read_lock();
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	radix_tree_for_each_slot(slot, &ctx->handles_vma, &iter, 0) {
		struct i915_vma *vma = rcu_dereference_raw(*slot);
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		struct drm_i915_gem_object *obj = vma->obj;
		struct i915_lut_handle *lut;

		if (!kref_get_unless_zero(&obj->base.refcount))
			continue;
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		rcu_read_unlock();
		i915_gem_object_lock(obj);
		list_for_each_entry(lut, &obj->lut_list, obj_link) {
			if (lut->ctx != ctx)
				continue;
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			if (lut->handle != iter.index)
				continue;

			list_del(&lut->obj_link);
			break;
		}
		i915_gem_object_unlock(obj);
		rcu_read_lock();

		if (&lut->obj_link != &obj->lut_list) {
			i915_lut_handle_free(lut);
			radix_tree_iter_delete(&ctx->handles_vma, &iter, slot);
			if (atomic_dec_and_test(&vma->open_count) &&
			    !i915_vma_is_ggtt(vma))
				i915_vma_close(vma);
			i915_gem_object_put(obj);
		}

		i915_gem_object_put(obj);
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	}
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	rcu_read_unlock();
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}

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static struct intel_context *
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lookup_user_engine(struct i915_gem_context *ctx,
		   unsigned long flags,
		   const struct i915_engine_class_instance *ci)
#define LOOKUP_USER_INDEX BIT(0)
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{
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	int idx;
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	if (!!(flags & LOOKUP_USER_INDEX) != i915_gem_context_user_engines(ctx))
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		return ERR_PTR(-EINVAL);

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	if (!i915_gem_context_user_engines(ctx)) {
		struct intel_engine_cs *engine;

		engine = intel_engine_lookup_user(ctx->i915,
						  ci->engine_class,
						  ci->engine_instance);
		if (!engine)
			return ERR_PTR(-EINVAL);

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		idx = engine->legacy_idx;
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	} else {
		idx = ci->engine_instance;
	}

	return i915_gem_context_get_engine(ctx, idx);
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}

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static struct i915_address_space *
context_get_vm_rcu(struct i915_gem_context *ctx)
{
	GEM_BUG_ON(!rcu_access_pointer(ctx->vm));

	do {
		struct i915_address_space *vm;

		/*
		 * We do not allow downgrading from full-ppgtt [to a shared
		 * global gtt], so ctx->vm cannot become NULL.
		 */
		vm = rcu_dereference(ctx->vm);
		if (!kref_get_unless_zero(&vm->ref))
			continue;

		/*
		 * This ppgtt may have be reallocated between
		 * the read and the kref, and reassigned to a third
		 * context. In order to avoid inadvertent sharing
		 * of this ppgtt with that third context (and not
		 * src), we have to confirm that we have the same
		 * ppgtt after passing through the strong memory
		 * barrier implied by a successful
		 * kref_get_unless_zero().
		 *
		 * Once we have acquired the current ppgtt of ctx,
		 * we no longer care if it is released from ctx, as
		 * it cannot be reallocated elsewhere.
		 */

		if (vm == rcu_access_pointer(ctx->vm))
			return rcu_pointer_handoff(vm);

		i915_vm_put(vm);
	} while (1);
}

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static void __free_engines(struct i915_gem_engines *e, unsigned int count)
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{
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	while (count--) {
		if (!e->engines[count])
			continue;

		intel_context_put(e->engines[count]);
	}
	kfree(e);
}

static void free_engines(struct i915_gem_engines *e)
{
	__free_engines(e, e->num_engines);
}

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static void free_engines_rcu(struct rcu_head *rcu)
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{
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	free_engines(container_of(rcu, struct i915_gem_engines, rcu));
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}

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static struct i915_gem_engines *default_engines(struct i915_gem_context *ctx)
{
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	const struct intel_gt *gt = &ctx->i915->gt;
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	struct intel_engine_cs *engine;
	struct i915_gem_engines *e;
	enum intel_engine_id id;

	e = kzalloc(struct_size(e, engines, I915_NUM_ENGINES), GFP_KERNEL);
	if (!e)
		return ERR_PTR(-ENOMEM);

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	init_rcu_head(&e->rcu);
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	for_each_engine(engine, gt, id) {
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		struct intel_context *ce;

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		if (engine->legacy_idx == INVALID_ENGINE)
			continue;

		GEM_BUG_ON(engine->legacy_idx >= I915_NUM_ENGINES);
		GEM_BUG_ON(e->engines[engine->legacy_idx]);

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		ce = intel_context_create(ctx, engine);
		if (IS_ERR(ce)) {
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			__free_engines(e, e->num_engines + 1);
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			return ERR_CAST(ce);
		}
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		e->engines[engine->legacy_idx] = ce;
		e->num_engines = max(e->num_engines, engine->legacy_idx);
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	}
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	e->num_engines++;
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	return e;
}

static void i915_gem_context_free(struct i915_gem_context *ctx)
{
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	GEM_BUG_ON(!i915_gem_context_is_closed(ctx));
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	spin_lock(&ctx->i915->gem.contexts.lock);
	list_del(&ctx->link);
	spin_unlock(&ctx->i915->gem.contexts.lock);

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	free_engines(rcu_access_pointer(ctx->engines));
	mutex_destroy(&ctx->engines_mutex);
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	kfree(ctx->jump_whitelist);

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	if (ctx->timeline)
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		intel_timeline_put(ctx->timeline);
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	put_pid(ctx->pid);
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	mutex_destroy(&ctx->mutex);
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	kfree_rcu(ctx, rcu);
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}

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static void contexts_free_all(struct llist_node *list)
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{
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	struct i915_gem_context *ctx, *cn;
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	llist_for_each_entry_safe(ctx, cn, list, free_link)
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		i915_gem_context_free(ctx);
}

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static void contexts_flush_free(struct i915_gem_contexts *gc)
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{
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	contexts_free_all(llist_del_all(&gc->free_list));
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}

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static void contexts_free_worker(struct work_struct *work)
{
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	struct i915_gem_contexts *gc =
		container_of(work, typeof(*gc), free_work);
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	contexts_flush_free(gc);
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}

void i915_gem_context_release(struct kref *ref)
{
	struct i915_gem_context *ctx = container_of(ref, typeof(*ctx), ref);
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	struct i915_gem_contexts *gc = &ctx->i915->gem.contexts;
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	trace_i915_context_free(ctx);
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	if (llist_add(&ctx->free_link, &gc->free_list))
		schedule_work(&gc->free_work);
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}

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static inline struct i915_gem_engines *
__context_engines_static(const struct i915_gem_context *ctx)
{
	return rcu_dereference_protected(ctx->engines, true);
}

static bool __reset_engine(struct intel_engine_cs *engine)
{
	struct intel_gt *gt = engine->gt;
	bool success = false;

	if (!intel_has_reset_engine(gt))
		return false;

	if (!test_and_set_bit(I915_RESET_ENGINE + engine->id,
			      &gt->reset.flags)) {
		success = intel_engine_reset(engine, NULL) == 0;
		clear_and_wake_up_bit(I915_RESET_ENGINE + engine->id,
				      &gt->reset.flags);
	}

	return success;
}

static void __reset_context(struct i915_gem_context *ctx,
			    struct intel_engine_cs *engine)
{
	intel_gt_handle_error(engine->gt, engine->mask, 0,
			      "context closure in %s", ctx->name);
}

static bool __cancel_engine(struct intel_engine_cs *engine)
{
	/*
	 * Send a "high priority pulse" down the engine to cause the
	 * current request to be momentarily preempted. (If it fails to
	 * be preempted, it will be reset). As we have marked our context
	 * as banned, any incomplete request, including any running, will
	 * be skipped following the preemption.
	 *
	 * If there is no hangchecking (one of the reasons why we try to
	 * cancel the context) and no forced preemption, there may be no
	 * means by which we reset the GPU and evict the persistent hog.
	 * Ergo if we are unable to inject a preemptive pulse that can
	 * kill the banned context, we fallback to doing a local reset
	 * instead.
	 */
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	if (IS_ACTIVE(CONFIG_DRM_I915_PREEMPT_TIMEOUT) &&
	    !intel_engine_pulse(engine))
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		return true;

	/* If we are unable to send a pulse, try resetting this engine. */
	return __reset_engine(engine);
}

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static struct intel_engine_cs *__active_engine(struct i915_request *rq)
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{
	struct intel_engine_cs *engine, *locked;

	/*
	 * Serialise with __i915_request_submit() so that it sees
	 * is-banned?, or we know the request is already inflight.
	 */
	locked = READ_ONCE(rq->engine);
	spin_lock_irq(&locked->active.lock);
	while (unlikely(locked != (engine = READ_ONCE(rq->engine)))) {
		spin_unlock(&locked->active.lock);
		spin_lock(&engine->active.lock);
		locked = engine;
	}

	engine = NULL;
	if (i915_request_is_active(rq) && !rq->fence.error)
		engine = rq->engine;

	spin_unlock_irq(&locked->active.lock);

	return engine;
}

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static struct intel_engine_cs *active_engine(struct intel_context *ce)
{
	struct intel_engine_cs *engine = NULL;
	struct i915_request *rq;

	if (!ce->timeline)
		return NULL;

	rcu_read_lock();
	list_for_each_entry_reverse(rq, &ce->timeline->requests, link) {
		if (i915_request_completed(rq))
			break;

		/* Check with the backend if the request is inflight */
		engine = __active_engine(rq);
		if (engine)
			break;
	}
	rcu_read_unlock();

	return engine;
}

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static void kill_context(struct i915_gem_context *ctx)
{
	struct i915_gem_engines_iter it;
	struct intel_context *ce;

	/*
	 * If we are already banned, it was due to a guilty request causing
	 * a reset and the entire context being evicted from the GPU.
	 */
	if (i915_gem_context_is_banned(ctx))
		return;

	i915_gem_context_set_banned(ctx);

	/*
	 * Map the user's engine back to the actual engines; one virtual
	 * engine will be mapped to multiple engines, and using ctx->engine[]
	 * the same engine may be have multiple instances in the user's map.
	 * However, we only care about pending requests, so only include
	 * engines on which there are incomplete requests.
	 */
	for_each_gem_engine(ce, __context_engines_static(ctx), it) {
		struct intel_engine_cs *engine;

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		/*
		 * Check the current active state of this context; if we
		 * are currently executing on the GPU we need to evict
		 * ourselves. On the other hand, if we haven't yet been
		 * submitted to the GPU or if everything is complete,
		 * we have nothing to do.
		 */
		engine = active_engine(ce);
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		/* First attempt to gracefully cancel the context */
		if (engine && !__cancel_engine(engine))
			/*
			 * If we are unable to send a preemptive pulse to bump
			 * the context from the GPU, we have to resort to a full
			 * reset. We hope the collateral damage is worth it.
			 */
			__reset_context(ctx, engine);
	}
}

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static void set_closed_name(struct i915_gem_context *ctx)
{
	char *s;

	/* Replace '[]' with '<>' to indicate closed in debug prints */

	s = strrchr(ctx->name, '[');
	if (!s)
		return;

	*s = '<';

	s = strchr(s + 1, ']');
	if (s)
		*s = '>';
}

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static void context_close(struct i915_gem_context *ctx)
{
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	struct i915_address_space *vm;
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	i915_gem_context_set_closed(ctx);
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	set_closed_name(ctx);
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	mutex_lock(&ctx->mutex);

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	vm = i915_gem_context_vm(ctx);
	if (vm)
		i915_vm_close(vm);

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	ctx->file_priv = ERR_PTR(-EBADF);
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	/*
	 * The LUT uses the VMA as a backpointer to unref the object,
	 * so we need to clear the LUT before we close all the VMA (inside
	 * the ppgtt).
	 */
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	lut_close(ctx);

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	mutex_unlock(&ctx->mutex);
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	/*
	 * If the user has disabled hangchecking, we can not be sure that
	 * the batches will ever complete after the context is closed,
	 * keeping the context and all resources pinned forever. So in this
	 * case we opt to forcibly kill off all remaining requests on
	 * context close.
	 */
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	if (!i915_gem_context_is_persistent(ctx) ||
	    !i915_modparams.enable_hangcheck)
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		kill_context(ctx);

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	i915_gem_context_put(ctx);
}

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static int __context_set_persistence(struct i915_gem_context *ctx, bool state)
{
	if (i915_gem_context_is_persistent(ctx) == state)
		return 0;

	if (state) {
		/*
		 * Only contexts that are short-lived [that will expire or be
		 * reset] are allowed to survive past termination. We require
		 * hangcheck to ensure that the persistent requests are healthy.
		 */
		if (!i915_modparams.enable_hangcheck)
			return -EINVAL;

		i915_gem_context_set_persistence(ctx);
	} else {
		/* To cancel a context we use "preempt-to-idle" */
		if (!(ctx->i915->caps.scheduler & I915_SCHEDULER_CAP_PREEMPTION))
			return -ENODEV;

		i915_gem_context_clear_persistence(ctx);
	}

	return 0;
}

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static struct i915_gem_context *
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__create_context(struct drm_i915_private *i915)
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{
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	struct i915_gem_context *ctx;
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	struct i915_gem_engines *e;
	int err;
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	int i;
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	ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
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	if (!ctx)
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		return ERR_PTR(-ENOMEM);
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	kref_init(&ctx->ref);
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	ctx->i915 = i915;
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	ctx->sched.priority = I915_USER_PRIORITY(I915_PRIORITY_NORMAL);
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	mutex_init(&ctx->mutex);
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	mutex_init(&ctx->engines_mutex);
	e = default_engines(ctx);
	if (IS_ERR(e)) {
		err = PTR_ERR(e);
		goto err_free;
	}
	RCU_INIT_POINTER(ctx->engines, e);
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	INIT_RADIX_TREE(&ctx->handles_vma, GFP_KERNEL);
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	/* NB: Mark all slices as needing a remap so that when the context first
	 * loads it will restore whatever remap state already exists. If there
	 * is no remap info, it will be a NOP. */
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	ctx->remap_slice = ALL_L3_SLICES(i915);
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	i915_gem_context_set_bannable(ctx);
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	i915_gem_context_set_recoverable(ctx);
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	__context_set_persistence(ctx, true /* cgroup hook? */);
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	for (i = 0; i < ARRAY_SIZE(ctx->hang_timestamp); i++)
		ctx->hang_timestamp[i] = jiffies - CONTEXT_FAST_HANG_JIFFIES;

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	ctx->jump_whitelist = NULL;
	ctx->jump_whitelist_cmds = 0;

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	spin_lock(&i915->gem.contexts.lock);
	list_add_tail(&ctx->link, &i915->gem.contexts.list);
	spin_unlock(&i915->gem.contexts.lock);

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	return ctx;
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err_free:
	kfree(ctx);
	return ERR_PTR(err);
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}

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static void
context_apply_all(struct i915_gem_context *ctx,
		  void (*fn)(struct intel_context *ce, void *data),
		  void *data)
{
	struct i915_gem_engines_iter it;
	struct intel_context *ce;

	for_each_gem_engine(ce, i915_gem_context_lock_engines(ctx), it)
		fn(ce, data);
	i915_gem_context_unlock_engines(ctx);
}

static void __apply_ppgtt(struct intel_context *ce, void *vm)
{
	i915_vm_put(ce->vm);
	ce->vm = i915_vm_get(vm);
}

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static struct i915_address_space *
__set_ppgtt(struct i915_gem_context *ctx, struct i915_address_space *vm)
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{
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	struct i915_address_space *old = i915_gem_context_vm(ctx);
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	GEM_BUG_ON(old && i915_vm_is_4lvl(vm) != i915_vm_is_4lvl(old));

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	rcu_assign_pointer(ctx->vm, i915_vm_open(vm));
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	context_apply_all(ctx, __apply_ppgtt, vm);
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	return old;
}

static void __assign_ppgtt(struct i915_gem_context *ctx,
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			   struct i915_address_space *vm)
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{
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	if (vm == rcu_access_pointer(ctx->vm))
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		return;

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	vm = __set_ppgtt(ctx, vm);
	if (vm)
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		i915_vm_close(vm);
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}

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static void __set_timeline(struct intel_timeline **dst,
			   struct intel_timeline *src)
{
	struct intel_timeline *old = *dst;

	*dst = src ? intel_timeline_get(src) : NULL;

	if (old)
		intel_timeline_put(old);
}

static void __apply_timeline(struct intel_context *ce, void *timeline)
{
	__set_timeline(&ce->timeline, timeline);
}

static void __assign_timeline(struct i915_gem_context *ctx,
			      struct intel_timeline *timeline)
{
	__set_timeline(&ctx->timeline, timeline);
	context_apply_all(ctx, __apply_timeline, timeline);
}

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static struct i915_gem_context *
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i915_gem_create_context(struct drm_i915_private *i915, unsigned int flags)
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{
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	struct i915_gem_context *ctx;
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	if (flags & I915_CONTEXT_CREATE_FLAGS_SINGLE_TIMELINE &&
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	    !HAS_EXECLISTS(i915))
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		return ERR_PTR(-EINVAL);

675 676
	/* Reap the stale contexts */
	contexts_flush_free(&i915->gem.contexts);
677

678
	ctx = __create_context(i915);
679
	if (IS_ERR(ctx))
680
		return ctx;
681

682
	if (HAS_FULL_PPGTT(i915)) {
683
		struct i915_ppgtt *ppgtt;
684

685
		ppgtt = i915_ppgtt_create(i915);
686
		if (IS_ERR(ppgtt)) {
687 688
			DRM_DEBUG_DRIVER("PPGTT setup failed (%ld)\n",
					 PTR_ERR(ppgtt));
689
			context_close(ctx);
690
			return ERR_CAST(ppgtt);
691 692
		}

693
		mutex_lock(&ctx->mutex);
694
		__assign_ppgtt(ctx, &ppgtt->vm);
695 696
		mutex_unlock(&ctx->mutex);

697
		i915_vm_put(&ppgtt->vm);
698
	}
699

700
	if (flags & I915_CONTEXT_CREATE_FLAGS_SINGLE_TIMELINE) {
701
		struct intel_timeline *timeline;
702

703
		timeline = intel_timeline_create(&i915->gt, NULL);
704 705 706 707 708
		if (IS_ERR(timeline)) {
			context_close(ctx);
			return ERR_CAST(timeline);
		}

709 710
		__assign_timeline(ctx, timeline);
		intel_timeline_put(timeline);
711 712
	}

713 714
	trace_i915_context_create(ctx);

715
	return ctx;
716 717
}

718 719 720 721 722 723 724 725 726 727 728 729 730
static void
destroy_kernel_context(struct i915_gem_context **ctxp)
{
	struct i915_gem_context *ctx;

	/* Keep the context ref so that we can free it immediately ourselves */
	ctx = i915_gem_context_get(fetch_and_zero(ctxp));
	GEM_BUG_ON(!i915_gem_context_is_kernel(ctx));

	context_close(ctx);
	i915_gem_context_free(ctx);
}

731 732
struct i915_gem_context *
i915_gem_context_create_kernel(struct drm_i915_private *i915, int prio)
733 734 735
{
	struct i915_gem_context *ctx;

736
	ctx = i915_gem_create_context(i915, 0);
737 738 739 740
	if (IS_ERR(ctx))
		return ctx;

	i915_gem_context_clear_bannable(ctx);
741
	i915_gem_context_set_persistence(ctx);
742
	ctx->sched.priority = I915_USER_PRIORITY(prio);
743 744 745 746 747 748

	GEM_BUG_ON(!i915_gem_context_is_kernel(ctx));

	return ctx;
}

749
static void init_contexts(struct i915_gem_contexts *gc)
750
{
751 752
	spin_lock_init(&gc->lock);
	INIT_LIST_HEAD(&gc->list);
753

754 755
	INIT_WORK(&gc->free_work, contexts_free_worker);
	init_llist_head(&gc->free_list);
756 757
}

758
int i915_gem_init_contexts(struct drm_i915_private *i915)
759
{
760
	struct i915_gem_context *ctx;
761

762
	/* Reassure ourselves we are only called once */
763
	GEM_BUG_ON(i915->kernel_context);
764

765
	init_contexts(&i915->gem.contexts);
766

767
	/* lowest priority; idle task */
768
	ctx = i915_gem_context_create_kernel(i915, I915_PRIORITY_MIN);
769
	if (IS_ERR(ctx)) {
770
		DRM_ERROR("Failed to create default global context\n");
771
		return PTR_ERR(ctx);
772
	}
773
	i915->kernel_context = ctx;
774

775
	DRM_DEBUG_DRIVER("%s context support initialized\n",
776
			 DRIVER_CAPS(i915)->has_logical_contexts ?
777
			 "logical" : "fake");
778
	return 0;
779 780
}

781
void i915_gem_driver_release__contexts(struct drm_i915_private *i915)
782
{
783
	destroy_kernel_context(&i915->kernel_context);
784
	flush_work(&i915->gem.contexts.free_work);
785 786
}

787 788
static int context_idr_cleanup(int id, void *p, void *data)
{
789
	context_close(p);
790
	return 0;
791 792
}

793 794
static int vm_idr_cleanup(int id, void *p, void *data)
{
795
	i915_vm_put(p);
796 797 798
	return 0;
}

799 800 801
static int gem_context_register(struct i915_gem_context *ctx,
				struct drm_i915_file_private *fpriv)
{
802
	struct i915_address_space *vm;
803 804 805
	int ret;

	ctx->file_priv = fpriv;
806 807 808 809 810 811

	mutex_lock(&ctx->mutex);
	vm = i915_gem_context_vm(ctx);
	if (vm)
		WRITE_ONCE(vm->file, fpriv); /* XXX */
	mutex_unlock(&ctx->mutex);
812 813

	ctx->pid = get_task_pid(current, PIDTYPE_PID);
814 815
	snprintf(ctx->name, sizeof(ctx->name), "%s[%d]",
		 current->comm, pid_nr(ctx->pid));
816 817

	/* And finally expose ourselves to userspace via the idr */
818
	mutex_lock(&fpriv->context_idr_lock);
819
	ret = idr_alloc(&fpriv->context_idr, ctx, 0, 0, GFP_KERNEL);
820
	mutex_unlock(&fpriv->context_idr_lock);
821 822
	if (ret >= 0)
		goto out;
823 824

	put_pid(fetch_and_zero(&ctx->pid));
825
out:
826 827 828
	return ret;
}

829 830
int i915_gem_context_open(struct drm_i915_private *i915,
			  struct drm_file *file)
831 832
{
	struct drm_i915_file_private *file_priv = file->driver_priv;
833
	struct i915_gem_context *ctx;
834
	int err;
835

836
	mutex_init(&file_priv->context_idr_lock);
837 838 839 840
	mutex_init(&file_priv->vm_idr_lock);

	idr_init(&file_priv->context_idr);
	idr_init_base(&file_priv->vm_idr, 1);
841

842
	ctx = i915_gem_create_context(i915, 0);
843
	if (IS_ERR(ctx)) {
844 845
		err = PTR_ERR(ctx);
		goto err;
846 847
	}

848
	err = gem_context_register(ctx, file_priv);
849
	if (err < 0)
850 851
		goto err_ctx;

852
	GEM_BUG_ON(i915_gem_context_is_kernel(ctx));
853
	GEM_BUG_ON(err > 0);
854

855
	return 0;
856 857 858

err_ctx:
	context_close(ctx);
859
err:
860
	idr_destroy(&file_priv->vm_idr);
861
	idr_destroy(&file_priv->context_idr);
862 863
	mutex_destroy(&file_priv->vm_idr_lock);
	mutex_destroy(&file_priv->context_idr_lock);
864
	return err;
865 866
}

867
void i915_gem_context_close(struct drm_file *file)
868
{
869
	struct drm_i915_file_private *file_priv = file->driver_priv;
870
	struct drm_i915_private *i915 = file_priv->dev_priv;
871

872
	idr_for_each(&file_priv->context_idr, context_idr_cleanup, NULL);
873
	idr_destroy(&file_priv->context_idr);
874
	mutex_destroy(&file_priv->context_idr_lock);
875 876 877 878

	idr_for_each(&file_priv->vm_idr, vm_idr_cleanup, NULL);
	idr_destroy(&file_priv->vm_idr);
	mutex_destroy(&file_priv->vm_idr_lock);
879 880

	contexts_flush_free(&i915->gem.contexts);
881 882 883 884 885 886 887 888
}

int i915_gem_vm_create_ioctl(struct drm_device *dev, void *data,
			     struct drm_file *file)
{
	struct drm_i915_private *i915 = to_i915(dev);
	struct drm_i915_gem_vm_control *args = data;
	struct drm_i915_file_private *file_priv = file->driver_priv;
889
	struct i915_ppgtt *ppgtt;
890 891 892 893 894 895 896 897 898 899 900 901 902 903 904 905 906 907 908 909 910 911 912 913 914 915
	int err;

	if (!HAS_FULL_PPGTT(i915))
		return -ENODEV;

	if (args->flags)
		return -EINVAL;

	ppgtt = i915_ppgtt_create(i915);
	if (IS_ERR(ppgtt))
		return PTR_ERR(ppgtt);

	ppgtt->vm.file = file_priv;

	if (args->extensions) {
		err = i915_user_extensions(u64_to_user_ptr(args->extensions),
					   NULL, 0,
					   ppgtt);
		if (err)
			goto err_put;
	}

	err = mutex_lock_interruptible(&file_priv->vm_idr_lock);
	if (err)
		goto err_put;

916
	err = idr_alloc(&file_priv->vm_idr, &ppgtt->vm, 0, 0, GFP_KERNEL);
917 918 919
	if (err < 0)
		goto err_unlock;

920
	GEM_BUG_ON(err == 0); /* reserved for invalid/unassigned ppgtt */
921 922 923 924 925 926 927 928 929

	mutex_unlock(&file_priv->vm_idr_lock);

	args->vm_id = err;
	return 0;

err_unlock:
	mutex_unlock(&file_priv->vm_idr_lock);
err_put:
930
	i915_vm_put(&ppgtt->vm);
931 932 933 934 935 936 937 938
	return err;
}

int i915_gem_vm_destroy_ioctl(struct drm_device *dev, void *data,
			      struct drm_file *file)
{
	struct drm_i915_file_private *file_priv = file->driver_priv;
	struct drm_i915_gem_vm_control *args = data;
939
	struct i915_address_space *vm;
940 941 942 943 944 945 946 947 948 949 950 951 952 953 954 955 956
	int err;
	u32 id;

	if (args->flags)
		return -EINVAL;

	if (args->extensions)
		return -EINVAL;

	id = args->vm_id;
	if (!id)
		return -ENOENT;

	err = mutex_lock_interruptible(&file_priv->vm_idr_lock);
	if (err)
		return err;

957
	vm = idr_remove(&file_priv->vm_idr, id);
958 959

	mutex_unlock(&file_priv->vm_idr_lock);
960
	if (!vm)
961 962
		return -ENOENT;

963
	i915_vm_put(vm);
964
	return 0;
965 966
}

967 968 969 970 971 972
struct context_barrier_task {
	struct i915_active base;
	void (*task)(void *data);
	void *data;
};

973
__i915_active_call
974 975 976 977 978 979 980 981 982 983 984
static void cb_retire(struct i915_active *base)
{
	struct context_barrier_task *cb = container_of(base, typeof(*cb), base);

	if (cb->task)
		cb->task(cb->data);

	i915_active_fini(&cb->base);
	kfree(cb);
}

985
I915_SELFTEST_DECLARE(static intel_engine_mask_t context_barrier_inject_fault);
986
static int context_barrier_task(struct i915_gem_context *ctx,
987
				intel_engine_mask_t engines,
988
				bool (*skip)(struct intel_context *ce, void *data),
989
				int (*emit)(struct i915_request *rq, void *data),
990 991 992 993
				void (*task)(void *data),
				void *data)
{
	struct context_barrier_task *cb;
994 995
	struct i915_gem_engines_iter it;
	struct intel_context *ce;
996 997 998 999 1000 1001 1002 1003
	int err = 0;

	GEM_BUG_ON(!task);

	cb = kmalloc(sizeof(*cb), GFP_KERNEL);
	if (!cb)
		return -ENOMEM;

1004
	i915_active_init(&cb->base, NULL, cb_retire);
1005 1006 1007 1008 1009
	err = i915_active_acquire(&cb->base);
	if (err) {
		kfree(cb);
		return err;
	}
1010

1011
	for_each_gem_engine(ce, i915_gem_context_lock_engines(ctx), it) {
1012 1013 1014
		struct i915_request *rq;

		if (I915_SELFTEST_ONLY(context_barrier_inject_fault &
1015
				       ce->engine->mask)) {
1016 1017 1018 1019
			err = -ENXIO;
			break;
		}

1020 1021 1022 1023
		if (!(ce->engine->mask & engines))
			continue;

		if (skip && skip(ce, data))
1024 1025
			continue;

1026
		rq = intel_context_create_request(ce);
1027 1028 1029 1030 1031
		if (IS_ERR(rq)) {
			err = PTR_ERR(rq);
			break;
		}

1032 1033 1034 1035
		err = 0;
		if (emit)
			err = emit(rq, data);
		if (err == 0)
1036
			err = i915_active_add_request(&cb->base, rq);
1037

1038 1039 1040 1041
		i915_request_add(rq);
		if (err)
			break;
	}
1042
	i915_gem_context_unlock_engines(ctx);
1043 1044 1045 1046 1047 1048 1049 1050 1051

	cb->task = err ? NULL : task; /* caller needs to unwind instead */
	cb->data = data;

	i915_active_release(&cb->base);

	return err;
}

1052 1053
static int get_ppgtt(struct drm_i915_file_private *file_priv,
		     struct i915_gem_context *ctx,
1054 1055
		     struct drm_i915_gem_context_param *args)
{
1056
	struct i915_address_space *vm;
1057 1058
	int ret;

1059
	if (!rcu_access_pointer(ctx->vm))
1060 1061
		return -ENODEV;

1062
	rcu_read_lock();
1063
	vm = context_get_vm_rcu(ctx);
1064
	rcu_read_unlock();
1065 1066 1067 1068 1069

	ret = mutex_lock_interruptible(&file_priv->vm_idr_lock);
	if (ret)
		goto err_put;

1070
	ret = idr_alloc(&file_priv->vm_idr, vm, 0, 0, GFP_KERNEL);
1071 1072 1073
	GEM_BUG_ON(!ret);
	if (ret < 0)
		goto err_unlock;
1074

1075
	i915_vm_open(vm);
1076 1077

	args->size = 0;
1078
	args->value = ret;
1079 1080 1081 1082 1083

	ret = 0;
err_unlock:
	mutex_unlock(&file_priv->vm_idr_lock);
err_put:
1084
	i915_vm_put(vm);
1085 1086 1087 1088 1089
	return ret;
}

static void set_ppgtt_barrier(void *data)
{
1090
	struct i915_address_space *old = data;
1091

1092 1093
	if (INTEL_GEN(old->i915) < 8)
		gen6_ppgtt_unpin_all(i915_vm_to_ppgtt(old));
1094

1095
	i915_vm_close(old);
1096 1097 1098 1099
}

static int emit_ppgtt_update(struct i915_request *rq, void *data)
{
1100
	struct i915_address_space *vm = rq->hw_context->vm;
1101
	struct intel_engine_cs *engine = rq->engine;
1102
	u32 base = engine->mmio_base;
1103 1104 1105
	u32 *cs;
	int i;

1106
	if (i915_vm_is_4lvl(vm)) {
1107
		struct i915_ppgtt *ppgtt = i915_vm_to_ppgtt(vm);
1108
		const dma_addr_t pd_daddr = px_dma(ppgtt->pd);
1109 1110 1111 1112 1113 1114 1115

		cs = intel_ring_begin(rq, 6);
		if (IS_ERR(cs))
			return PTR_ERR(cs);

		*cs++ = MI_LOAD_REGISTER_IMM(2);

1116
		*cs++ = i915_mmio_reg_offset(GEN8_RING_PDP_UDW(base, 0));
1117
		*cs++ = upper_32_bits(pd_daddr);
1118
		*cs++ = i915_mmio_reg_offset(GEN8_RING_PDP_LDW(base, 0));
1119 1120 1121 1122 1123
		*cs++ = lower_32_bits(pd_daddr);

		*cs++ = MI_NOOP;
		intel_ring_advance(rq, cs);
	} else if (HAS_LOGICAL_RING_CONTEXTS(engine->i915)) {
1124
		struct i915_ppgtt *ppgtt = i915_vm_to_ppgtt(vm);
1125 1126 1127 1128 1129 1130
		int err;

		/* Magic required to prevent forcewake errors! */
		err = engine->emit_flush(rq, EMIT_INVALIDATE);
		if (err)
			return err;
1131

1132 1133 1134 1135
		cs = intel_ring_begin(rq, 4 * GEN8_3LVL_PDPES + 2);
		if (IS_ERR(cs))
			return PTR_ERR(cs);

1136
		*cs++ = MI_LOAD_REGISTER_IMM(2 * GEN8_3LVL_PDPES) | MI_LRI_FORCE_POSTED;
1137 1138 1139
		for (i = GEN8_3LVL_PDPES; i--; ) {
			const dma_addr_t pd_daddr = i915_page_dir_dma_addr(ppgtt, i);

1140
			*cs++ = i915_mmio_reg_offset(GEN8_RING_PDP_UDW(base, i));
1141
			*cs++ = upper_32_bits(pd_daddr);
1142
			*cs++ = i915_mmio_reg_offset(GEN8_RING_PDP_LDW(base, i));
1143 1144 1145 1146 1147 1148
			*cs++ = lower_32_bits(pd_daddr);
		}
		*cs++ = MI_NOOP;
		intel_ring_advance(rq, cs);
	} else {
		/* ppGTT is not part of the legacy context image */
1149
		gen6_ppgtt_pin(i915_vm_to_ppgtt(vm));
1150 1151 1152 1153 1154
	}

	return 0;
}

1155 1156 1157 1158 1159 1160 1161 1162
static bool skip_ppgtt_update(struct intel_context *ce, void *data)
{
	if (HAS_LOGICAL_RING_CONTEXTS(ce->engine->i915))
		return !ce->state;
	else
		return !atomic_read(&ce->pin_count);
}

1163 1164
static int set_ppgtt(struct drm_i915_file_private *file_priv,
		     struct i915_gem_context *ctx,
1165 1166
		     struct drm_i915_gem_context_param *args)
{
1167
	struct i915_address_space *vm, *old;
1168 1169 1170 1171 1172
	int err;

	if (args->size)
		return -EINVAL;

1173
	if (!rcu_access_pointer(ctx->vm))
1174 1175 1176 1177 1178
		return -ENODEV;

	if (upper_32_bits(args->value))
		return -ENOENT;

1179
	rcu_read_lock();
1180
	vm = idr_find(&file_priv->vm_idr, args->value);
1181 1182 1183
	if (vm && !kref_get_unless_zero(&vm->ref))
		vm = NULL;
	rcu_read_unlock();
1184
	if (!vm)
1185 1186
		return -ENOENT;

1187
	err = mutex_lock_interruptible(&ctx->mutex);
1188 1189 1190
	if (err)
		goto out;

1191 1192
	if (i915_gem_context_is_closed(ctx)) {
		err = -ENOENT;
1193
		goto unlock;
1194 1195 1196
	}

	if (vm == rcu_access_pointer(ctx->vm))
1197 1198 1199 1200 1201
		goto unlock;

	/* Teardown the existing obj:vma cache, it will have to be rebuilt. */
	lut_close(ctx);

1202
	old = __set_ppgtt(ctx, vm);
1203 1204 1205 1206 1207 1208 1209

	/*
	 * We need to flush any requests using the current ppgtt before
	 * we release it as the requests do not hold a reference themselves,
	 * only indirectly through the context.
	 */
	err = context_barrier_task(ctx, ALL_ENGINES,
1210
				   skip_ppgtt_update,
1211 1212 1213 1214
				   emit_ppgtt_update,
				   set_ppgtt_barrier,
				   old);
	if (err) {
1215 1216
		i915_vm_close(__set_ppgtt(ctx, old));
		i915_vm_close(old);
1217 1218 1219
	}

unlock:
1220
	mutex_unlock(&ctx->mutex);
1221
out:
1222
	i915_vm_put(vm);
1223 1224 1225
	return err;
}

1226 1227 1228 1229 1230 1231 1232 1233 1234 1235 1236 1237 1238
static int gen8_emit_rpcs_config(struct i915_request *rq,
				 struct intel_context *ce,
				 struct intel_sseu sseu)
{
	u64 offset;
	u32 *cs;

	cs = intel_ring_begin(rq, 4);
	if (IS_ERR(cs))
		return PTR_ERR(cs);

	offset = i915_ggtt_offset(ce->state) +
		 LRC_STATE_PN * PAGE_SIZE +
1239
		 CTX_R_PWR_CLK_STATE * 4;
1240 1241 1242 1243

	*cs++ = MI_STORE_DWORD_IMM_GEN4 | MI_USE_GGTT;
	*cs++ = lower_32_bits(offset);
	*cs++ = upper_32_bits(offset);
1244
	*cs++ = intel_sseu_make_rpcs(rq->i915, &sseu);
1245 1246 1247 1248 1249 1250 1251

	intel_ring_advance(rq, cs);

	return 0;
}

static int
1252
gen8_modify_rpcs(struct intel_context *ce, struct intel_sseu sseu)
1253
{
1254
	struct i915_request *rq;
1255 1256
	int ret;

1257
	lockdep_assert_held(&ce->pin_mutex);
1258

1259 1260 1261 1262 1263 1264 1265 1266
	/*
	 * If the context is not idle, we have to submit an ordered request to
	 * modify its context image via the kernel context (writing to our own
	 * image, or into the registers directory, does not stick). Pristine
	 * and idle contexts will be configured on pinning.
	 */
	if (!intel_context_is_pinned(ce))
		return 0;
1267

1268
	rq = i915_request_create(ce->engine->kernel_context);
1269 1270
	if (IS_ERR(rq))
		return PTR_ERR(rq);
1271

1272 1273 1274 1275
	/* Serialise with the remote context */
	ret = intel_context_prepare_remote_request(ce, rq);
	if (ret == 0)
		ret = gen8_emit_rpcs_config(rq, ce, sseu);
1276 1277 1278 1279 1280 1281

	i915_request_add(rq);
	return ret;
}

static int
1282
intel_context_reconfigure_sseu(struct intel_context *ce, struct intel_sseu sseu)
1283
{
1284
	int ret;
1285

1286
	GEM_BUG_ON(INTEL_GEN(ce->engine->i915) < 8);
1287

1288 1289 1290
	ret = intel_context_lock_pinned(ce);
	if (ret)
		return ret;
1291

1292 1293
	/* Nothing to do if unmodified. */
	if (!memcmp(&ce->sseu, &sseu, sizeof(sseu)))
1294
		goto unlock;
1295

1296
	ret = gen8_modify_rpcs(ce, sseu);
1297 1298 1299
	if (!ret)
		ce->sseu = sseu;

1300
unlock:
1301
	intel_context_unlock_pinned(ce);
1302 1303 1304
	return ret;
}

1305 1306 1307 1308 1309 1310 1311 1312 1313 1314 1315 1316 1317 1318 1319 1320 1321 1322 1323 1324 1325 1326 1327 1328 1329 1330 1331 1332 1333 1334 1335 1336 1337 1338 1339 1340 1341 1342 1343 1344 1345 1346 1347 1348 1349 1350 1351 1352 1353 1354 1355 1356 1357 1358 1359 1360 1361 1362 1363 1364 1365 1366 1367 1368 1369 1370 1371 1372 1373 1374 1375 1376 1377 1378 1379 1380 1381 1382 1383 1384 1385 1386 1387 1388 1389 1390 1391 1392 1393 1394 1395 1396 1397 1398 1399 1400 1401 1402 1403 1404 1405 1406 1407
static int
user_to_context_sseu(struct drm_i915_private *i915,
		     const struct drm_i915_gem_context_param_sseu *user,
		     struct intel_sseu *context)
{
	const struct sseu_dev_info *device = &RUNTIME_INFO(i915)->sseu;

	/* No zeros in any field. */
	if (!user->slice_mask || !user->subslice_mask ||
	    !user->min_eus_per_subslice || !user->max_eus_per_subslice)
		return -EINVAL;

	/* Max > min. */
	if (user->max_eus_per_subslice < user->min_eus_per_subslice)
		return -EINVAL;

	/*
	 * Some future proofing on the types since the uAPI is wider than the
	 * current internal implementation.
	 */
	if (overflows_type(user->slice_mask, context->slice_mask) ||
	    overflows_type(user->subslice_mask, context->subslice_mask) ||
	    overflows_type(user->min_eus_per_subslice,
			   context->min_eus_per_subslice) ||
	    overflows_type(user->max_eus_per_subslice,
			   context->max_eus_per_subslice))
		return -EINVAL;

	/* Check validity against hardware. */
	if (user->slice_mask & ~device->slice_mask)
		return -EINVAL;

	if (user->subslice_mask & ~device->subslice_mask[0])
		return -EINVAL;

	if (user->max_eus_per_subslice > device->max_eus_per_subslice)
		return -EINVAL;

	context->slice_mask = user->slice_mask;
	context->subslice_mask = user->subslice_mask;
	context->min_eus_per_subslice = user->min_eus_per_subslice;
	context->max_eus_per_subslice = user->max_eus_per_subslice;

	/* Part specific restrictions. */
	if (IS_GEN(i915, 11)) {
		unsigned int hw_s = hweight8(device->slice_mask);
		unsigned int hw_ss_per_s = hweight8(device->subslice_mask[0]);
		unsigned int req_s = hweight8(context->slice_mask);
		unsigned int req_ss = hweight8(context->subslice_mask);

		/*
		 * Only full subslice enablement is possible if more than one
		 * slice is turned on.
		 */
		if (req_s > 1 && req_ss != hw_ss_per_s)
			return -EINVAL;

		/*
		 * If more than four (SScount bitfield limit) subslices are
		 * requested then the number has to be even.
		 */
		if (req_ss > 4 && (req_ss & 1))
			return -EINVAL;

		/*
		 * If only one slice is enabled and subslice count is below the
		 * device full enablement, it must be at most half of the all
		 * available subslices.
		 */
		if (req_s == 1 && req_ss < hw_ss_per_s &&
		    req_ss > (hw_ss_per_s / 2))
			return -EINVAL;

		/* ABI restriction - VME use case only. */

		/* All slices or one slice only. */
		if (req_s != 1 && req_s != hw_s)
			return -EINVAL;

		/*
		 * Half subslices or full enablement only when one slice is
		 * enabled.
		 */
		if (req_s == 1 &&
		    (req_ss != hw_ss_per_s && req_ss != (hw_ss_per_s / 2)))
			return -EINVAL;

		/* No EU configuration changes. */
		if ((user->min_eus_per_subslice !=
		     device->max_eus_per_subslice) ||
		    (user->max_eus_per_subslice !=
		     device->max_eus_per_subslice))
			return -EINVAL;
	}

	return 0;
}

static int set_sseu(struct i915_gem_context *ctx,
		    struct drm_i915_gem_context_param *args)
{
	struct drm_i915_private *i915 = ctx->i915;
	struct drm_i915_gem_context_param_sseu user_sseu;
1408
	struct intel_context *ce;
1409
	struct intel_sseu sseu;
1410
	unsigned long lookup;
1411 1412 1413 1414 1415 1416 1417 1418 1419 1420 1421 1422
	int ret;

	if (args->size < sizeof(user_sseu))
		return -EINVAL;

	if (!IS_GEN(i915, 11))
		return -ENODEV;

	if (copy_from_user(&user_sseu, u64_to_user_ptr(args->value),
			   sizeof(user_sseu)))
		return -EFAULT;

1423
	if (user_sseu.rsvd)
1424 1425
		return -EINVAL;

1426 1427 1428 1429 1430 1431 1432 1433
	if (user_sseu.flags & ~(I915_CONTEXT_SSEU_FLAG_ENGINE_INDEX))
		return -EINVAL;

	lookup = 0;
	if (user_sseu.flags & I915_CONTEXT_SSEU_FLAG_ENGINE_INDEX)
		lookup |= LOOKUP_USER_INDEX;

	ce = lookup_user_engine(ctx, lookup, &user_sseu.engine);
1434 1435
	if (IS_ERR(ce))
		return PTR_ERR(ce);
1436 1437

	/* Only render engine supports RPCS configuration. */
1438 1439 1440 1441
	if (ce->engine->class != RENDER_CLASS) {
		ret = -ENODEV;
		goto out_ce;
	}
1442 1443 1444

	ret = user_to_context_sseu(i915, &user_sseu, &sseu);
	if (ret)
1445
		goto out_ce;
1446

1447
	ret = intel_context_reconfigure_sseu(ce, sseu);
1448
	if (ret)
1449
		goto out_ce;
1450 1451 1452

	args->size = sizeof(user_sseu);

1453 1454 1455
out_ce:
	intel_context_put(ce);
	return ret;
1456 1457
}

1458 1459 1460 1461 1462
struct set_engines {
	struct i915_gem_context *ctx;
	struct i915_gem_engines *engines;
};

1463 1464 1465 1466 1467 1468 1469 1470 1471 1472 1473 1474 1475 1476 1477 1478 1479 1480 1481 1482 1483 1484 1485 1486 1487 1488 1489 1490 1491 1492 1493 1494 1495 1496 1497 1498 1499 1500 1501 1502 1503 1504 1505 1506 1507 1508 1509 1510 1511 1512 1513 1514 1515 1516 1517 1518 1519 1520 1521 1522 1523 1524 1525 1526 1527 1528 1529 1530 1531 1532 1533 1534 1535 1536 1537 1538 1539 1540 1541 1542 1543 1544 1545 1546 1547 1548 1549 1550 1551 1552 1553 1554
static int
set_engines__load_balance(struct i915_user_extension __user *base, void *data)
{
	struct i915_context_engines_load_balance __user *ext =
		container_of_user(base, typeof(*ext), base);
	const struct set_engines *set = data;
	struct intel_engine_cs *stack[16];
	struct intel_engine_cs **siblings;
	struct intel_context *ce;
	u16 num_siblings, idx;
	unsigned int n;
	int err;

	if (!HAS_EXECLISTS(set->ctx->i915))
		return -ENODEV;

	if (USES_GUC_SUBMISSION(set->ctx->i915))
		return -ENODEV; /* not implement yet */

	if (get_user(idx, &ext->engine_index))
		return -EFAULT;

	if (idx >= set->engines->num_engines) {
		DRM_DEBUG("Invalid placement value, %d >= %d\n",
			  idx, set->engines->num_engines);
		return -EINVAL;
	}

	idx = array_index_nospec(idx, set->engines->num_engines);
	if (set->engines->engines[idx]) {
		DRM_DEBUG("Invalid placement[%d], already occupied\n", idx);
		return -EEXIST;
	}

	if (get_user(num_siblings, &ext->num_siblings))
		return -EFAULT;

	err = check_user_mbz(&ext->flags);
	if (err)
		return err;

	err = check_user_mbz(&ext->mbz64);
	if (err)
		return err;

	siblings = stack;
	if (num_siblings > ARRAY_SIZE(stack)) {
		siblings = kmalloc_array(num_siblings,
					 sizeof(*siblings),
					 GFP_KERNEL);
		if (!siblings)
			return -ENOMEM;
	}

	for (n = 0; n < num_siblings; n++) {
		struct i915_engine_class_instance ci;

		if (copy_from_user(&ci, &ext->engines[n], sizeof(ci))) {
			err = -EFAULT;
			goto out_siblings;
		}

		siblings[n] = intel_engine_lookup_user(set->ctx->i915,
						       ci.engine_class,
						       ci.engine_instance);
		if (!siblings[n]) {
			DRM_DEBUG("Invalid sibling[%d]: { class:%d, inst:%d }\n",
				  n, ci.engine_class, ci.engine_instance);
			err = -EINVAL;
			goto out_siblings;
		}
	}

	ce = intel_execlists_create_virtual(set->ctx, siblings, n);
	if (IS_ERR(ce)) {
		err = PTR_ERR(ce);
		goto out_siblings;
	}

	if (cmpxchg(&set->engines->engines[idx], NULL, ce)) {
		intel_context_put(ce);
		err = -EEXIST;
		goto out_siblings;
	}

out_siblings:
	if (siblings != stack)
		kfree(siblings);

	return err;
}

1555 1556 1557 1558 1559 1560 1561 1562 1563 1564 1565 1566 1567 1568 1569 1570 1571 1572 1573 1574 1575 1576 1577 1578 1579 1580 1581 1582 1583 1584 1585 1586 1587 1588 1589 1590 1591 1592 1593 1594 1595 1596 1597 1598 1599 1600 1601 1602 1603 1604 1605 1606 1607 1608 1609 1610 1611 1612 1613 1614 1615 1616 1617 1618 1619 1620 1621 1622 1623 1624 1625 1626 1627 1628 1629 1630 1631 1632 1633 1634 1635 1636 1637
static int
set_engines__bond(struct i915_user_extension __user *base, void *data)
{
	struct i915_context_engines_bond __user *ext =
		container_of_user(base, typeof(*ext), base);
	const struct set_engines *set = data;
	struct i915_engine_class_instance ci;
	struct intel_engine_cs *virtual;
	struct intel_engine_cs *master;
	u16 idx, num_bonds;
	int err, n;

	if (get_user(idx, &ext->virtual_index))
		return -EFAULT;

	if (idx >= set->engines->num_engines) {
		DRM_DEBUG("Invalid index for virtual engine: %d >= %d\n",
			  idx, set->engines->num_engines);
		return -EINVAL;
	}

	idx = array_index_nospec(idx, set->engines->num_engines);
	if (!set->engines->engines[idx]) {
		DRM_DEBUG("Invalid engine at %d\n", idx);
		return -EINVAL;
	}
	virtual = set->engines->engines[idx]->engine;

	err = check_user_mbz(&ext->flags);
	if (err)
		return err;

	for (n = 0; n < ARRAY_SIZE(ext->mbz64); n++) {
		err = check_user_mbz(&ext->mbz64[n]);
		if (err)
			return err;
	}

	if (copy_from_user(&ci, &ext->master, sizeof(ci)))
		return -EFAULT;

	master = intel_engine_lookup_user(set->ctx->i915,
					  ci.engine_class, ci.engine_instance);
	if (!master) {
		DRM_DEBUG("Unrecognised master engine: { class:%u, instance:%u }\n",
			  ci.engine_class, ci.engine_instance);
		return -EINVAL;
	}

	if (get_user(num_bonds, &ext->num_bonds))
		return -EFAULT;

	for (n = 0; n < num_bonds; n++) {
		struct intel_engine_cs *bond;

		if (copy_from_user(&ci, &ext->engines[n], sizeof(ci)))
			return -EFAULT;

		bond = intel_engine_lookup_user(set->ctx->i915,
						ci.engine_class,
						ci.engine_instance);
		if (!bond) {
			DRM_DEBUG("Unrecognised engine[%d] for bonding: { class:%d, instance: %d }\n",
				  n, ci.engine_class, ci.engine_instance);
			return -EINVAL;
		}

		/*
		 * A non-virtual engine has no siblings to choose between; and
		 * a submit fence will always be directed to the one engine.
		 */
		if (intel_engine_is_virtual(virtual)) {
			err = intel_virtual_engine_attach_bond(virtual,
							       master,
							       bond);
			if (err)
				return err;
		}
	}

	return 0;
}

1638
static const i915_user_extension_fn set_engines__extensions[] = {
1639
	[I915_CONTEXT_ENGINES_EXT_LOAD_BALANCE] = set_engines__load_balance,
1640
	[I915_CONTEXT_ENGINES_EXT_BOND] = set_engines__bond,
1641 1642 1643 1644 1645 1646 1647 1648 1649 1650 1651 1652 1653 1654 1655 1656 1657 1658 1659 1660 1661 1662 1663 1664 1665 1666 1667 1668 1669 1670 1671 1672 1673 1674 1675 1676 1677 1678 1679 1680 1681 1682 1683
};

static int
set_engines(struct i915_gem_context *ctx,
	    const struct drm_i915_gem_context_param *args)
{
	struct i915_context_param_engines __user *user =
		u64_to_user_ptr(args->value);
	struct set_engines set = { .ctx = ctx };
	unsigned int num_engines, n;
	u64 extensions;
	int err;

	if (!args->size) { /* switch back to legacy user_ring_map */
		if (!i915_gem_context_user_engines(ctx))
			return 0;

		set.engines = default_engines(ctx);
		if (IS_ERR(set.engines))
			return PTR_ERR(set.engines);

		goto replace;
	}

	BUILD_BUG_ON(!IS_ALIGNED(sizeof(*user), sizeof(*user->engines)));
	if (args->size < sizeof(*user) ||
	    !IS_ALIGNED(args->size, sizeof(*user->engines))) {
		DRM_DEBUG("Invalid size for engine array: %d\n",
			  args->size);
		return -EINVAL;
	}

	/*
	 * Note that I915_EXEC_RING_MASK limits execbuf to only using the
	 * first 64 engines defined here.
	 */
	num_engines = (args->size - sizeof(*user)) / sizeof(*user->engines);

	set.engines = kmalloc(struct_size(set.engines, engines, num_engines),
			      GFP_KERNEL);
	if (!set.engines)
		return -ENOMEM;

1684
	init_rcu_head(&set.engines->rcu);
1685 1686 1687
	for (n = 0; n < num_engines; n++) {
		struct i915_engine_class_instance ci;
		struct intel_engine_cs *engine;
1688
		struct intel_context *ce;
1689 1690 1691 1692 1693 1694 1695 1696 1697 1698 1699 1700 1701 1702 1703 1704 1705 1706 1707 1708 1709 1710

		if (copy_from_user(&ci, &user->engines[n], sizeof(ci))) {
			__free_engines(set.engines, n);
			return -EFAULT;
		}

		if (ci.engine_class == (u16)I915_ENGINE_CLASS_INVALID &&
		    ci.engine_instance == (u16)I915_ENGINE_CLASS_INVALID_NONE) {
			set.engines->engines[n] = NULL;
			continue;
		}

		engine = intel_engine_lookup_user(ctx->i915,
						  ci.engine_class,
						  ci.engine_instance);
		if (!engine) {
			DRM_DEBUG("Invalid engine[%d]: { class:%d, instance:%d }\n",
				  n, ci.engine_class, ci.engine_instance);
			__free_engines(set.engines, n);
			return -ENOENT;
		}

1711 1712
		ce = intel_context_create(ctx, engine);
		if (IS_ERR(ce)) {
1713
			__free_engines(set.engines, n);
1714
			return PTR_ERR(ce);
1715
		}
1716 1717

		set.engines->engines[n] = ce;
1718 1719 1720 1721 1722 1723 1724 1725 1726 1727 1728 1729 1730 1731 1732 1733 1734 1735 1736 1737 1738 1739 1740
	}
	set.engines->num_engines = num_engines;

	err = -EFAULT;
	if (!get_user(extensions, &user->extensions))
		err = i915_user_extensions(u64_to_user_ptr(extensions),
					   set_engines__extensions,
					   ARRAY_SIZE(set_engines__extensions),
					   &set);
	if (err) {
		free_engines(set.engines);
		return err;
	}

replace:
	mutex_lock(&ctx->engines_mutex);
	if (args->size)
		i915_gem_context_set_user_engines(ctx);
	else
		i915_gem_context_clear_user_engines(ctx);
	rcu_swap_protected(ctx->engines, set.engines, 1);
	mutex_unlock(&ctx->engines_mutex);

1741
	call_rcu(&set.engines->rcu, free_engines_rcu);
1742 1743 1744 1745 1746 1747 1748 1749 1750 1751 1752 1753 1754 1755

	return 0;
}

static struct i915_gem_engines *
__copy_engines(struct i915_gem_engines *e)
{
	struct i915_gem_engines *copy;
	unsigned int n;

	copy = kmalloc(struct_size(e, engines, e->num_engines), GFP_KERNEL);
	if (!copy)
		return ERR_PTR(-ENOMEM);

1756
	init_rcu_head(&copy->rcu);
1757 1758 1759 1760 1761 1762 1763 1764 1765 1766 1767 1768 1769 1770 1771 1772 1773 1774 1775 1776 1777 1778 1779 1780 1781 1782 1783 1784 1785 1786 1787 1788 1789 1790 1791 1792 1793 1794 1795 1796 1797 1798 1799 1800 1801 1802 1803 1804 1805 1806 1807 1808 1809 1810 1811 1812 1813 1814 1815 1816 1817 1818 1819 1820 1821 1822 1823 1824 1825 1826 1827 1828 1829 1830
	for (n = 0; n < e->num_engines; n++) {
		if (e->engines[n])
			copy->engines[n] = intel_context_get(e->engines[n]);
		else
			copy->engines[n] = NULL;
	}
	copy->num_engines = n;

	return copy;
}

static int
get_engines(struct i915_gem_context *ctx,
	    struct drm_i915_gem_context_param *args)
{
	struct i915_context_param_engines __user *user;
	struct i915_gem_engines *e;
	size_t n, count, size;
	int err = 0;

	err = mutex_lock_interruptible(&ctx->engines_mutex);
	if (err)
		return err;

	e = NULL;
	if (i915_gem_context_user_engines(ctx))
		e = __copy_engines(i915_gem_context_engines(ctx));
	mutex_unlock(&ctx->engines_mutex);
	if (IS_ERR_OR_NULL(e)) {
		args->size = 0;
		return PTR_ERR_OR_ZERO(e);
	}

	count = e->num_engines;

	/* Be paranoid in case we have an impedance mismatch */
	if (!check_struct_size(user, engines, count, &size)) {
		err = -EINVAL;
		goto err_free;
	}
	if (overflows_type(size, args->size)) {
		err = -EINVAL;
		goto err_free;
	}

	if (!args->size) {
		args->size = size;
		goto err_free;
	}

	if (args->size < size) {
		err = -EINVAL;
		goto err_free;
	}

	user = u64_to_user_ptr(args->value);
	if (!access_ok(user, size)) {
		err = -EFAULT;
		goto err_free;
	}

	if (put_user(0, &user->extensions)) {
		err = -EFAULT;
		goto err_free;
	}

	for (n = 0; n < count; n++) {
		struct i915_engine_class_instance ci = {
			.engine_class = I915_ENGINE_CLASS_INVALID,
			.engine_instance = I915_ENGINE_CLASS_INVALID_NONE,
		};

		if (e->engines[n]) {
			ci.engine_class = e->engines[n]->engine->uabi_class;
1831
			ci.engine_instance = e->engines[n]->engine->uabi_instance;
1832 1833 1834 1835 1836 1837 1838 1839 1840 1841 1842
		}

		if (copy_to_user(&user->engines[n], &ci, sizeof(ci))) {
			err = -EFAULT;
			goto err_free;
		}
	}

	args->size = size;

err_free:
1843
	free_engines(e);
1844 1845 1846
	return err;
}

1847 1848 1849 1850 1851 1852 1853 1854 1855 1856
static int
set_persistence(struct i915_gem_context *ctx,
		const struct drm_i915_gem_context_param *args)
{
	if (args->size)
		return -EINVAL;

	return __context_set_persistence(ctx, args->value);
}

1857 1858
static int ctx_setparam(struct drm_i915_file_private *fpriv,
			struct i915_gem_context *ctx,
1859
			struct drm_i915_gem_context_param *args)
1860
{
1861
	int ret = 0;
1862 1863

	switch (args->param) {
1864
	case I915_CONTEXT_PARAM_NO_ZEROMAP:
1865
		if (args->size)
1866
			ret = -EINVAL;
1867 1868 1869 1870
		else if (args->value)
			set_bit(UCONTEXT_NO_ZEROMAP, &ctx->user_flags);
		else
			clear_bit(UCONTEXT_NO_ZEROMAP, &ctx->user_flags);
1871
		break;
1872

1873
	case I915_CONTEXT_PARAM_NO_ERROR_CAPTURE:
1874
		if (args->size)
1875
			ret = -EINVAL;
1876 1877 1878 1879
		else if (args->value)
			i915_gem_context_set_no_error_capture(ctx);
		else
			i915_gem_context_clear_no_error_capture(ctx);
1880
		break;
1881

1882 1883 1884 1885 1886
	case I915_CONTEXT_PARAM_BANNABLE:
		if (args->size)
			ret = -EINVAL;
		else if (!capable(CAP_SYS_ADMIN) && !args->value)
			ret = -EPERM;
1887 1888
		else if (args->value)
			i915_gem_context_set_bannable(ctx);
1889
		else
1890
			i915_gem_context_clear_bannable(ctx);
1891
		break;
1892

1893 1894 1895 1896 1897 1898 1899 1900 1901
	case I915_CONTEXT_PARAM_RECOVERABLE:
		if (args->size)
			ret = -EINVAL;
		else if (args->value)
			i915_gem_context_set_recoverable(ctx);
		else
			i915_gem_context_clear_recoverable(ctx);
		break;

1902 1903
	case I915_CONTEXT_PARAM_PRIORITY:
		{
1904
			s64 priority = args->value;
1905 1906 1907

			if (args->size)
				ret = -EINVAL;
1908
			else if (!(ctx->i915->caps.scheduler & I915_SCHEDULER_CAP_PRIORITY))
1909 1910 1911 1912 1913 1914 1915 1916
				ret = -ENODEV;
			else if (priority > I915_CONTEXT_MAX_USER_PRIORITY ||
				 priority < I915_CONTEXT_MIN_USER_PRIORITY)
				ret = -EINVAL;
			else if (priority > I915_CONTEXT_DEFAULT_PRIORITY &&
				 !capable(CAP_SYS_NICE))
				ret = -EPERM;
			else
1917 1918
				ctx->sched.priority =
					I915_USER_PRIORITY(priority);
1919 1920
		}
		break;
1921

1922 1923 1924
	case I915_CONTEXT_PARAM_SSEU:
		ret = set_sseu(ctx, args);
		break;
1925 1926

	case I915_CONTEXT_PARAM_VM:
1927
		ret = set_ppgtt(fpriv, ctx, args);
1928 1929
		break;

1930 1931 1932 1933
	case I915_CONTEXT_PARAM_ENGINES:
		ret = set_engines(ctx, args);
		break;

1934 1935 1936 1937
	case I915_CONTEXT_PARAM_PERSISTENCE:
		ret = set_persistence(ctx, args);
		break;

1938
	case I915_CONTEXT_PARAM_BAN_PERIOD:
1939 1940 1941 1942 1943
	default:
		ret = -EINVAL;
		break;
	}

1944 1945 1946 1947 1948 1949 1950 1951 1952 1953 1954 1955 1956 1957 1958 1959 1960 1961 1962
	return ret;
}

struct create_ext {
	struct i915_gem_context *ctx;
	struct drm_i915_file_private *fpriv;
};

static int create_setparam(struct i915_user_extension __user *ext, void *data)
{
	struct drm_i915_gem_context_create_ext_setparam local;
	const struct create_ext *arg = data;

	if (copy_from_user(&local, ext, sizeof(local)))
		return -EFAULT;

	if (local.param.ctx_id)
		return -EINVAL;

1963
	return ctx_setparam(arg->fpriv, arg->ctx, &local.param);
1964 1965
}

1966 1967 1968 1969 1970 1971 1972 1973 1974 1975 1976 1977
static int clone_engines(struct i915_gem_context *dst,
			 struct i915_gem_context *src)
{
	struct i915_gem_engines *e = i915_gem_context_lock_engines(src);
	struct i915_gem_engines *clone;
	bool user_engines;
	unsigned long n;

	clone = kmalloc(struct_size(e, engines, e->num_engines), GFP_KERNEL);
	if (!clone)
		goto err_unlock;

1978
	init_rcu_head(&clone->rcu);
1979
	for (n = 0; n < e->num_engines; n++) {
1980 1981
		struct intel_engine_cs *engine;

1982 1983 1984 1985
		if (!e->engines[n]) {
			clone->engines[n] = NULL;
			continue;
		}
1986
		engine = e->engines[n]->engine;
1987

1988 1989 1990 1991 1992 1993 1994 1995 1996 1997 1998 1999 2000 2001 2002
		/*
		 * Virtual engines are singletons; they can only exist
		 * inside a single context, because they embed their
		 * HW context... As each virtual context implies a single
		 * timeline (each engine can only dequeue a single request
		 * at any time), it would be surprising for two contexts
		 * to use the same engine. So let's create a copy of
		 * the virtual engine instead.
		 */
		if (intel_engine_is_virtual(engine))
			clone->engines[n] =
				intel_execlists_clone_virtual(dst, engine);
		else
			clone->engines[n] = intel_context_create(dst, engine);
		if (IS_ERR_OR_NULL(clone->engines[n])) {
2003 2004 2005 2006 2007 2008 2009 2010 2011
			__free_engines(clone, n);
			goto err_unlock;
		}
	}
	clone->num_engines = n;

	user_engines = i915_gem_context_user_engines(src);
	i915_gem_context_unlock_engines(src);

2012 2013
	/* Serialised by constructor */
	free_engines(__context_engines_static(dst));
2014 2015 2016 2017 2018 2019 2020 2021 2022 2023 2024 2025 2026 2027 2028 2029 2030 2031 2032 2033 2034 2035 2036 2037 2038 2039 2040 2041 2042 2043 2044 2045 2046 2047
	RCU_INIT_POINTER(dst->engines, clone);
	if (user_engines)
		i915_gem_context_set_user_engines(dst);
	else
		i915_gem_context_clear_user_engines(dst);
	return 0;

err_unlock:
	i915_gem_context_unlock_engines(src);
	return -ENOMEM;
}

static int clone_flags(struct i915_gem_context *dst,
		       struct i915_gem_context *src)
{
	dst->user_flags = src->user_flags;
	return 0;
}

static int clone_schedattr(struct i915_gem_context *dst,
			   struct i915_gem_context *src)
{
	dst->sched = src->sched;
	return 0;
}

static int clone_sseu(struct i915_gem_context *dst,
		      struct i915_gem_context *src)
{
	struct i915_gem_engines *e = i915_gem_context_lock_engines(src);
	struct i915_gem_engines *clone;
	unsigned long n;
	int err;

2048 2049
	/* no locking required; sole access under constructor*/
	clone = __context_engines_static(dst);
2050 2051 2052 2053 2054 2055 2056 2057 2058 2059 2060 2061 2062 2063 2064 2065 2066 2067 2068 2069 2070 2071 2072 2073 2074 2075 2076 2077 2078 2079 2080 2081
	if (e->num_engines != clone->num_engines) {
		err = -EINVAL;
		goto unlock;
	}

	for (n = 0; n < e->num_engines; n++) {
		struct intel_context *ce = e->engines[n];

		if (clone->engines[n]->engine->class != ce->engine->class) {
			/* Must have compatible engine maps! */
			err = -EINVAL;
			goto unlock;
		}

		/* serialises with set_sseu */
		err = intel_context_lock_pinned(ce);
		if (err)
			goto unlock;

		clone->engines[n]->sseu = ce->sseu;
		intel_context_unlock_pinned(ce);
	}

	err = 0;
unlock:
	i915_gem_context_unlock_engines(src);
	return err;
}

static int clone_timeline(struct i915_gem_context *dst,
			  struct i915_gem_context *src)
{
2082 2083
	if (src->timeline)
		__assign_timeline(dst, src->timeline);
2084 2085 2086 2087 2088 2089 2090

	return 0;
}

static int clone_vm(struct i915_gem_context *dst,
		    struct i915_gem_context *src)
{
2091
	struct i915_address_space *vm;
2092
	int err = 0;
2093

2094 2095
	if (!rcu_access_pointer(src->vm))
		return 0;
2096

2097 2098
	rcu_read_lock();
	vm = context_get_vm_rcu(src);
2099 2100
	rcu_read_unlock();

2101 2102 2103 2104 2105
	if (!mutex_lock_interruptible(&dst->mutex)) {
		__assign_ppgtt(dst, vm);
		mutex_unlock(&dst->mutex);
	} else {
		err = -EINTR;
2106 2107
	}

2108
	i915_vm_put(vm);
2109
	return err;
2110 2111 2112 2113 2114 2115 2116 2117 2118 2119 2120 2121 2122 2123 2124 2125 2126 2127 2128 2129 2130 2131 2132 2133 2134 2135 2136 2137 2138 2139 2140 2141 2142 2143 2144 2145 2146 2147 2148 2149 2150 2151 2152 2153 2154 2155 2156 2157 2158 2159 2160 2161 2162
}

static int create_clone(struct i915_user_extension __user *ext, void *data)
{
	static int (* const fn[])(struct i915_gem_context *dst,
				  struct i915_gem_context *src) = {
#define MAP(x, y) [ilog2(I915_CONTEXT_CLONE_##x)] = y
		MAP(ENGINES, clone_engines),
		MAP(FLAGS, clone_flags),
		MAP(SCHEDATTR, clone_schedattr),
		MAP(SSEU, clone_sseu),
		MAP(TIMELINE, clone_timeline),
		MAP(VM, clone_vm),
#undef MAP
	};
	struct drm_i915_gem_context_create_ext_clone local;
	const struct create_ext *arg = data;
	struct i915_gem_context *dst = arg->ctx;
	struct i915_gem_context *src;
	int err, bit;

	if (copy_from_user(&local, ext, sizeof(local)))
		return -EFAULT;

	BUILD_BUG_ON(GENMASK(BITS_PER_TYPE(local.flags) - 1, ARRAY_SIZE(fn)) !=
		     I915_CONTEXT_CLONE_UNKNOWN);

	if (local.flags & I915_CONTEXT_CLONE_UNKNOWN)
		return -EINVAL;

	if (local.rsvd)
		return -EINVAL;

	rcu_read_lock();
	src = __i915_gem_context_lookup_rcu(arg->fpriv, local.clone_id);
	rcu_read_unlock();
	if (!src)
		return -ENOENT;

	GEM_BUG_ON(src == dst);

	for (bit = 0; bit < ARRAY_SIZE(fn); bit++) {
		if (!(local.flags & BIT(bit)))
			continue;

		err = fn[bit](dst, src);
		if (err)
			return err;
	}

	return 0;
}

2163 2164
static const i915_user_extension_fn create_extensions[] = {
	[I915_CONTEXT_CREATE_EXT_SETPARAM] = create_setparam,
2165
	[I915_CONTEXT_CREATE_EXT_CLONE] = create_clone,
2166 2167 2168 2169 2170 2171 2172 2173 2174 2175 2176 2177 2178 2179 2180 2181 2182 2183 2184 2185 2186
};

static bool client_is_banned(struct drm_i915_file_private *file_priv)
{
	return atomic_read(&file_priv->ban_score) >= I915_CLIENT_SCORE_BANNED;
}

int i915_gem_context_create_ioctl(struct drm_device *dev, void *data,
				  struct drm_file *file)
{
	struct drm_i915_private *i915 = to_i915(dev);
	struct drm_i915_gem_context_create_ext *args = data;
	struct create_ext ext_data;
	int ret;

	if (!DRIVER_CAPS(i915)->has_logical_contexts)
		return -ENODEV;

	if (args->flags & I915_CONTEXT_CREATE_FLAGS_UNKNOWN)
		return -EINVAL;

2187
	ret = intel_gt_terminally_wedged(&i915->gt);
2188 2189 2190 2191 2192 2193 2194 2195 2196 2197 2198
	if (ret)
		return ret;

	ext_data.fpriv = file->driver_priv;
	if (client_is_banned(ext_data.fpriv)) {
		DRM_DEBUG("client %s[%d] banned from creating ctx\n",
			  current->comm,
			  pid_nr(get_task_pid(current, PIDTYPE_PID)));
		return -EIO;
	}

2199
	ext_data.ctx = i915_gem_create_context(i915, args->flags);
2200 2201 2202 2203 2204 2205 2206 2207 2208 2209 2210 2211 2212 2213 2214 2215 2216 2217 2218 2219 2220 2221 2222 2223 2224 2225 2226 2227 2228 2229 2230 2231 2232 2233 2234 2235 2236 2237 2238 2239 2240 2241 2242 2243 2244 2245 2246 2247 2248 2249 2250 2251 2252 2253 2254 2255
	if (IS_ERR(ext_data.ctx))
		return PTR_ERR(ext_data.ctx);

	if (args->flags & I915_CONTEXT_CREATE_FLAGS_USE_EXTENSIONS) {
		ret = i915_user_extensions(u64_to_user_ptr(args->extensions),
					   create_extensions,
					   ARRAY_SIZE(create_extensions),
					   &ext_data);
		if (ret)
			goto err_ctx;
	}

	ret = gem_context_register(ext_data.ctx, ext_data.fpriv);
	if (ret < 0)
		goto err_ctx;

	args->ctx_id = ret;
	DRM_DEBUG("HW context %d created\n", args->ctx_id);

	return 0;

err_ctx:
	context_close(ext_data.ctx);
	return ret;
}

int i915_gem_context_destroy_ioctl(struct drm_device *dev, void *data,
				   struct drm_file *file)
{
	struct drm_i915_gem_context_destroy *args = data;
	struct drm_i915_file_private *file_priv = file->driver_priv;
	struct i915_gem_context *ctx;

	if (args->pad != 0)
		return -EINVAL;

	if (!args->ctx_id)
		return -ENOENT;

	if (mutex_lock_interruptible(&file_priv->context_idr_lock))
		return -EINTR;

	ctx = idr_remove(&file_priv->context_idr, args->ctx_id);
	mutex_unlock(&file_priv->context_idr_lock);
	if (!ctx)
		return -ENOENT;

	context_close(ctx);
	return 0;
}

static int get_sseu(struct i915_gem_context *ctx,
		    struct drm_i915_gem_context_param *args)
{
	struct drm_i915_gem_context_param_sseu user_sseu;
	struct intel_context *ce;
2256
	unsigned long lookup;
2257
	int err;
2258 2259 2260 2261 2262 2263 2264 2265 2266 2267

	if (args->size == 0)
		goto out;
	else if (args->size < sizeof(user_sseu))
		return -EINVAL;

	if (copy_from_user(&user_sseu, u64_to_user_ptr(args->value),
			   sizeof(user_sseu)))
		return -EFAULT;

2268
	if (user_sseu.rsvd)
2269 2270
		return -EINVAL;

2271 2272 2273 2274 2275 2276 2277 2278
	if (user_sseu.flags & ~(I915_CONTEXT_SSEU_FLAG_ENGINE_INDEX))
		return -EINVAL;

	lookup = 0;
	if (user_sseu.flags & I915_CONTEXT_SSEU_FLAG_ENGINE_INDEX)
		lookup |= LOOKUP_USER_INDEX;

	ce = lookup_user_engine(ctx, lookup, &user_sseu.engine);
2279 2280 2281
	if (IS_ERR(ce))
		return PTR_ERR(ce);

2282 2283 2284 2285 2286 2287
	err = intel_context_lock_pinned(ce); /* serialises with set_sseu */
	if (err) {
		intel_context_put(ce);
		return err;
	}

2288 2289 2290 2291 2292
	user_sseu.slice_mask = ce->sseu.slice_mask;
	user_sseu.subslice_mask = ce->sseu.subslice_mask;
	user_sseu.min_eus_per_subslice = ce->sseu.min_eus_per_subslice;
	user_sseu.max_eus_per_subslice = ce->sseu.max_eus_per_subslice;

2293 2294
	intel_context_unlock_pinned(ce);
	intel_context_put(ce);
2295 2296 2297 2298 2299 2300 2301 2302 2303 2304 2305 2306 2307 2308 2309 2310 2311 2312 2313 2314 2315 2316 2317 2318 2319 2320 2321 2322 2323 2324 2325

	if (copy_to_user(u64_to_user_ptr(args->value), &user_sseu,
			 sizeof(user_sseu)))
		return -EFAULT;

out:
	args->size = sizeof(user_sseu);

	return 0;
}

int i915_gem_context_getparam_ioctl(struct drm_device *dev, void *data,
				    struct drm_file *file)
{
	struct drm_i915_file_private *file_priv = file->driver_priv;
	struct drm_i915_gem_context_param *args = data;
	struct i915_gem_context *ctx;
	int ret = 0;

	ctx = i915_gem_context_lookup(file_priv, args->ctx_id);
	if (!ctx)
		return -ENOENT;

	switch (args->param) {
	case I915_CONTEXT_PARAM_NO_ZEROMAP:
		args->size = 0;
		args->value = test_bit(UCONTEXT_NO_ZEROMAP, &ctx->user_flags);
		break;

	case I915_CONTEXT_PARAM_GTT_SIZE:
		args->size = 0;
2326 2327 2328
		rcu_read_lock();
		if (rcu_access_pointer(ctx->vm))
			args->value = rcu_dereference(ctx->vm)->total;
2329 2330
		else
			args->value = to_i915(dev)->ggtt.vm.total;
2331
		rcu_read_unlock();
2332 2333 2334 2335 2336 2337 2338 2339 2340 2341 2342 2343 2344 2345 2346 2347 2348 2349 2350 2351 2352 2353 2354 2355 2356 2357 2358
		break;

	case I915_CONTEXT_PARAM_NO_ERROR_CAPTURE:
		args->size = 0;
		args->value = i915_gem_context_no_error_capture(ctx);
		break;

	case I915_CONTEXT_PARAM_BANNABLE:
		args->size = 0;
		args->value = i915_gem_context_is_bannable(ctx);
		break;

	case I915_CONTEXT_PARAM_RECOVERABLE:
		args->size = 0;
		args->value = i915_gem_context_is_recoverable(ctx);
		break;

	case I915_CONTEXT_PARAM_PRIORITY:
		args->size = 0;
		args->value = ctx->sched.priority >> I915_USER_PRIORITY_SHIFT;
		break;

	case I915_CONTEXT_PARAM_SSEU:
		ret = get_sseu(ctx, args);
		break;

	case I915_CONTEXT_PARAM_VM:
2359
		ret = get_ppgtt(file_priv, ctx, args);
2360 2361
		break;

2362 2363 2364 2365
	case I915_CONTEXT_PARAM_ENGINES:
		ret = get_engines(ctx, args);
		break;

2366 2367 2368 2369 2370
	case I915_CONTEXT_PARAM_PERSISTENCE:
		args->size = 0;
		args->value = i915_gem_context_is_persistent(ctx);
		break;

2371 2372 2373 2374 2375 2376 2377 2378 2379 2380 2381 2382 2383 2384 2385 2386 2387 2388 2389 2390 2391 2392
	case I915_CONTEXT_PARAM_BAN_PERIOD:
	default:
		ret = -EINVAL;
		break;
	}

	i915_gem_context_put(ctx);
	return ret;
}

int i915_gem_context_setparam_ioctl(struct drm_device *dev, void *data,
				    struct drm_file *file)
{
	struct drm_i915_file_private *file_priv = file->driver_priv;
	struct drm_i915_gem_context_param *args = data;
	struct i915_gem_context *ctx;
	int ret;

	ctx = i915_gem_context_lookup(file_priv, args->ctx_id);
	if (!ctx)
		return -ENOENT;

2393
	ret = ctx_setparam(file_priv, ctx, args);
2394

2395
	i915_gem_context_put(ctx);
2396 2397
	return ret;
}
2398 2399 2400 2401

int i915_gem_context_reset_stats_ioctl(struct drm_device *dev,
				       void *data, struct drm_file *file)
{
2402
	struct drm_i915_private *i915 = to_i915(dev);
2403
	struct drm_i915_reset_stats *args = data;
2404
	struct i915_gem_context *ctx;
2405 2406 2407 2408 2409
	int ret;

	if (args->flags || args->pad)
		return -EINVAL;

2410 2411 2412 2413 2414
	ret = -ENOENT;
	rcu_read_lock();
	ctx = __i915_gem_context_lookup_rcu(file->driver_priv, args->ctx_id);
	if (!ctx)
		goto out;
2415

2416 2417 2418 2419 2420 2421
	/*
	 * We opt for unserialised reads here. This may result in tearing
	 * in the extremely unlikely event of a GPU hang on this context
	 * as we are querying them. If we need that extra layer of protection,
	 * we should wrap the hangstats with a seqlock.
	 */
2422 2423

	if (capable(CAP_SYS_ADMIN))
2424
		args->reset_count = i915_reset_count(&i915->gpu_error);
2425 2426 2427
	else
		args->reset_count = 0;

2428 2429
	args->batch_active = atomic_read(&ctx->guilty_count);
	args->batch_pending = atomic_read(&ctx->active_count);
2430

2431 2432 2433 2434
	ret = 0;
out:
	rcu_read_unlock();
	return ret;
2435
}
2436

2437 2438 2439 2440 2441 2442 2443 2444 2445 2446 2447 2448 2449 2450 2451 2452 2453
/* GEM context-engines iterator: for_each_gem_engine() */
struct intel_context *
i915_gem_engines_iter_next(struct i915_gem_engines_iter *it)
{
	const struct i915_gem_engines *e = it->engines;
	struct intel_context *ctx;

	do {
		if (it->idx >= e->num_engines)
			return NULL;

		ctx = e->engines[it->idx++];
	} while (!ctx);

	return ctx;
}

2454 2455
#if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
#include "selftests/mock_context.c"
2456
#include "selftests/i915_gem_context.c"
2457
#endif
2458

2459
static void i915_global_gem_context_shrink(void)
2460
{
2461
	kmem_cache_shrink(global.slab_luts);
2462 2463
}

2464
static void i915_global_gem_context_exit(void)
2465
{
2466
	kmem_cache_destroy(global.slab_luts);
2467 2468
}

2469 2470 2471
static struct i915_global_gem_context global = { {
	.shrink = i915_global_gem_context_shrink,
	.exit = i915_global_gem_context_exit,
2472 2473
} };

2474
int __init i915_global_gem_context_init(void)
2475
{
2476 2477 2478 2479 2480 2481
	global.slab_luts = KMEM_CACHE(i915_lut_handle, 0);
	if (!global.slab_luts)
		return -ENOMEM;

	i915_global_register(&global.base);
	return 0;
2482
}