r8a7795.dtsi 48.7 KB
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/*
 * Device Tree Source for the r8a7795 SoC
 *
 * Copyright (C) 2015 Renesas Electronics Corp.
 *
 * This file is licensed under the terms of the GNU General Public License
 * version 2.  This program is licensed "as is" without any warranty of any
 * kind, whether express or implied.
 */

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#include <dt-bindings/clock/r8a7795-cpg-mssr.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/power/r8a7795-sysc.h>
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/ {
	compatible = "renesas,r8a7795";
	#address-cells = <2>;
	#size-cells = <2>;

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	aliases {
		i2c0 = &i2c0;
		i2c1 = &i2c1;
		i2c2 = &i2c2;
		i2c3 = &i2c3;
		i2c4 = &i2c4;
		i2c5 = &i2c5;
		i2c6 = &i2c6;
	};

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	psci {
		compatible = "arm,psci-0.2";
		method = "smc";
	};

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	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		a57_0: cpu@0 {
			compatible = "arm,cortex-a57", "arm,armv8";
			reg = <0x0>;
			device_type = "cpu";
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			power-domains = <&sysc R8A7795_PD_CA57_CPU0>;
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			next-level-cache = <&L2_CA57>;
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			enable-method = "psci";
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		};
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		a57_1: cpu@1 {
			compatible = "arm,cortex-a57","arm,armv8";
			reg = <0x1>;
			device_type = "cpu";
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			power-domains = <&sysc R8A7795_PD_CA57_CPU1>;
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			next-level-cache = <&L2_CA57>;
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			enable-method = "psci";
		};
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		a57_2: cpu@2 {
			compatible = "arm,cortex-a57","arm,armv8";
			reg = <0x2>;
			device_type = "cpu";
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			power-domains = <&sysc R8A7795_PD_CA57_CPU2>;
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			next-level-cache = <&L2_CA57>;
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			enable-method = "psci";
		};
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		a57_3: cpu@3 {
			compatible = "arm,cortex-a57","arm,armv8";
			reg = <0x3>;
			device_type = "cpu";
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			power-domains = <&sysc R8A7795_PD_CA57_CPU3>;
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			next-level-cache = <&L2_CA57>;
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			enable-method = "psci";
		};
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		L2_CA57: cache-controller@0 {
			compatible = "cache";
			reg = <0>;
			power-domains = <&sysc R8A7795_PD_CA57_SCU>;
			cache-unified;
			cache-level = <2>;
		};
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		L2_CA53: cache-controller@100 {
			compatible = "cache";
			reg = <0x100>;
			power-domains = <&sysc R8A7795_PD_CA53_SCU>;
			cache-unified;
			cache-level = <2>;
		};
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	};

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	extal_clk: extal {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		/* This value must be overridden by the board */
		clock-frequency = <0>;
	};

	extalr_clk: extalr {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		/* This value must be overridden by the board */
		clock-frequency = <0>;
	};

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	/*
	 * The external audio clocks are configured as 0 Hz fixed frequency
	 * clocks by default.
	 * Boards that provide audio clocks should override them.
	 */
	audio_clk_a: audio_clk_a {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <0>;
	};

	audio_clk_b: audio_clk_b {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <0>;
	};

	audio_clk_c: audio_clk_c {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <0>;
	};

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	/* External CAN clock - to be overridden by boards that provide it */
	can_clk: can {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <0>;
	};

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	/* External SCIF clock - to be overridden by boards that provide it */
	scif_clk: scif {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <0>;
	};

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	/* External PCIe clock - can be overridden by the board */
	pcie_bus_clk: pcie_bus {
		compatible = "fixed-clock";
		#clock-cells = <0>;
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		clock-frequency = <0>;
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	};

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	soc {
		compatible = "simple-bus";
		interrupt-parent = <&gic>;
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		#address-cells = <2>;
		#size-cells = <2>;
		ranges;

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		gic: interrupt-controller@f1010000 {
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			compatible = "arm,gic-400";
			#interrupt-cells = <3>;
			#address-cells = <0>;
			interrupt-controller;
			reg = <0x0 0xf1010000 0 0x1000>,
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			      <0x0 0xf1020000 0 0x20000>,
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			      <0x0 0xf1040000 0 0x20000>,
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			      <0x0 0xf1060000 0 0x20000>;
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			interrupts = <GIC_PPI 9
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					(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
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			clocks = <&cpg CPG_MOD 408>;
			clock-names = "clk";
			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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		};

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		wdt0: watchdog@e6020000 {
			compatible = "renesas,r8a7795-wdt", "renesas,rcar-gen3-wdt";
			reg = <0 0xe6020000 0 0x0c>;
			clocks = <&cpg CPG_MOD 402>;
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			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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			status = "disabled";
		};

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		gpio0: gpio@e6050000 {
			compatible = "renesas,gpio-r8a7795",
				     "renesas,gpio-rcar";
			reg = <0 0xe6050000 0 0x50>;
			interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
			#gpio-cells = <2>;
			gpio-controller;
			gpio-ranges = <&pfc 0 0 16>;
			#interrupt-cells = <2>;
			interrupt-controller;
			clocks = <&cpg CPG_MOD 912>;
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			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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		};

		gpio1: gpio@e6051000 {
			compatible = "renesas,gpio-r8a7795",
				     "renesas,gpio-rcar";
			reg = <0 0xe6051000 0 0x50>;
			interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
			#gpio-cells = <2>;
			gpio-controller;
			gpio-ranges = <&pfc 0 32 28>;
			#interrupt-cells = <2>;
			interrupt-controller;
			clocks = <&cpg CPG_MOD 911>;
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			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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		};

		gpio2: gpio@e6052000 {
			compatible = "renesas,gpio-r8a7795",
				     "renesas,gpio-rcar";
			reg = <0 0xe6052000 0 0x50>;
			interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
			#gpio-cells = <2>;
			gpio-controller;
			gpio-ranges = <&pfc 0 64 15>;
			#interrupt-cells = <2>;
			interrupt-controller;
			clocks = <&cpg CPG_MOD 910>;
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			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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		};

		gpio3: gpio@e6053000 {
			compatible = "renesas,gpio-r8a7795",
				     "renesas,gpio-rcar";
			reg = <0 0xe6053000 0 0x50>;
			interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
			#gpio-cells = <2>;
			gpio-controller;
			gpio-ranges = <&pfc 0 96 16>;
			#interrupt-cells = <2>;
			interrupt-controller;
			clocks = <&cpg CPG_MOD 909>;
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			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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		};

		gpio4: gpio@e6054000 {
			compatible = "renesas,gpio-r8a7795",
				     "renesas,gpio-rcar";
			reg = <0 0xe6054000 0 0x50>;
			interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
			#gpio-cells = <2>;
			gpio-controller;
			gpio-ranges = <&pfc 0 128 18>;
			#interrupt-cells = <2>;
			interrupt-controller;
			clocks = <&cpg CPG_MOD 908>;
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			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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		};

		gpio5: gpio@e6055000 {
			compatible = "renesas,gpio-r8a7795",
				     "renesas,gpio-rcar";
			reg = <0 0xe6055000 0 0x50>;
			interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
			#gpio-cells = <2>;
			gpio-controller;
			gpio-ranges = <&pfc 0 160 26>;
			#interrupt-cells = <2>;
			interrupt-controller;
			clocks = <&cpg CPG_MOD 907>;
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			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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		};

		gpio6: gpio@e6055400 {
			compatible = "renesas,gpio-r8a7795",
				     "renesas,gpio-rcar";
			reg = <0 0xe6055400 0 0x50>;
			interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
			#gpio-cells = <2>;
			gpio-controller;
			gpio-ranges = <&pfc 0 192 32>;
			#interrupt-cells = <2>;
			interrupt-controller;
			clocks = <&cpg CPG_MOD 906>;
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			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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		};

		gpio7: gpio@e6055800 {
			compatible = "renesas,gpio-r8a7795",
				     "renesas,gpio-rcar";
			reg = <0 0xe6055800 0 0x50>;
			interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
			#gpio-cells = <2>;
			gpio-controller;
			gpio-ranges = <&pfc 0 224 4>;
			#interrupt-cells = <2>;
			interrupt-controller;
			clocks = <&cpg CPG_MOD 905>;
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			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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		};

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		pmu_a57 {
			compatible = "arm,cortex-a57-pmu";
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			interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-affinity = <&a57_0>,
					     <&a57_1>,
					     <&a57_2>,
					     <&a57_3>;
		};

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		timer {
			compatible = "arm,armv8-timer";
			interrupts = <GIC_PPI 13
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					(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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				     <GIC_PPI 14
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					(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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				     <GIC_PPI 11
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					(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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				     <GIC_PPI 10
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					(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
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		};

		cpg: clock-controller@e6150000 {
			compatible = "renesas,r8a7795-cpg-mssr";
			reg = <0 0xe6150000 0 0x1000>;
			clocks = <&extal_clk>, <&extalr_clk>;
			clock-names = "extal", "extalr";
			#clock-cells = <2>;
			#power-domain-cells = <0>;
		};
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		rst: reset-controller@e6160000 {
			compatible = "renesas,r8a7795-rst";
			reg = <0 0xe6160000 0 0x0200>;
		};

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		prr: chipid@fff00044 {
			compatible = "renesas,prr";
			reg = <0 0xfff00044 0 4>;
		};

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		sysc: system-controller@e6180000 {
			compatible = "renesas,r8a7795-sysc";
			reg = <0 0xe6180000 0 0x0400>;
			#power-domain-cells = <1>;
		};

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		pfc: pfc@e6060000 {
			compatible = "renesas,pfc-r8a7795";
			reg = <0 0xe6060000 0 0x50c>;
		};

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		intc_ex: interrupt-controller@e61c0000 {
			compatible = "renesas,intc-ex-r8a7795", "renesas,irqc";
			#interrupt-cells = <2>;
			interrupt-controller;
			reg = <0 0xe61c0000 0 0x200>;
			interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 407>;
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			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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		};

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		dmac0: dma-controller@e6700000 {
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			compatible = "renesas,dmac-r8a7795",
				     "renesas,rcar-dmac";
			reg = <0 0xe6700000 0 0x10000>;
			interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "error",
					"ch0", "ch1", "ch2", "ch3",
					"ch4", "ch5", "ch6", "ch7",
					"ch8", "ch9", "ch10", "ch11",
					"ch12", "ch13", "ch14", "ch15";
			clocks = <&cpg CPG_MOD 219>;
			clock-names = "fck";
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			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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			#dma-cells = <1>;
			dma-channels = <16>;
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		};

		dmac1: dma-controller@e7300000 {
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			compatible = "renesas,dmac-r8a7795",
				     "renesas,rcar-dmac";
			reg = <0 0xe7300000 0 0x10000>;
			interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "error",
					"ch0", "ch1", "ch2", "ch3",
					"ch4", "ch5", "ch6", "ch7",
					"ch8", "ch9", "ch10", "ch11",
					"ch12", "ch13", "ch14", "ch15";
			clocks = <&cpg CPG_MOD 218>;
			clock-names = "fck";
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			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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			#dma-cells = <1>;
			dma-channels = <16>;
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		};

		dmac2: dma-controller@e7310000 {
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			compatible = "renesas,dmac-r8a7795",
				     "renesas,rcar-dmac";
			reg = <0 0xe7310000 0 0x10000>;
			interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "error",
					"ch0", "ch1", "ch2", "ch3",
					"ch4", "ch5", "ch6", "ch7",
					"ch8", "ch9", "ch10", "ch11",
					"ch12", "ch13", "ch14", "ch15";
			clocks = <&cpg CPG_MOD 217>;
			clock-names = "fck";
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			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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			#dma-cells = <1>;
			dma-channels = <16>;
		};

		audma0: dma-controller@ec700000 {
			compatible = "renesas,dmac-r8a7795",
				     "renesas,rcar-dmac";
			reg = <0 0xec700000 0 0x10000>;
			interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "error",
					"ch0", "ch1", "ch2", "ch3",
					"ch4", "ch5", "ch6", "ch7",
					"ch8", "ch9", "ch10", "ch11",
					"ch12", "ch13", "ch14", "ch15";
			clocks = <&cpg CPG_MOD 502>;
			clock-names = "fck";
			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
			#dma-cells = <1>;
			dma-channels = <16>;
		};

		audma1: dma-controller@ec720000 {
			compatible = "renesas,dmac-r8a7795",
				     "renesas,rcar-dmac";
			reg = <0 0xec720000 0 0x10000>;
			interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "error",
					"ch0", "ch1", "ch2", "ch3",
					"ch4", "ch5", "ch6", "ch7",
					"ch8", "ch9", "ch10", "ch11",
					"ch12", "ch13", "ch14", "ch15";
			clocks = <&cpg CPG_MOD 501>;
			clock-names = "fck";
			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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			#dma-cells = <1>;
			dma-channels = <16>;
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		};
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		avb: ethernet@e6800000 {
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			compatible = "renesas,etheravb-r8a7795",
				     "renesas,etheravb-rcar-gen3";
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			reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
			interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "ch0", "ch1", "ch2", "ch3",
					  "ch4", "ch5", "ch6", "ch7",
					  "ch8", "ch9", "ch10", "ch11",
					  "ch12", "ch13", "ch14", "ch15",
					  "ch16", "ch17", "ch18", "ch19",
					  "ch20", "ch21", "ch22", "ch23",
					  "ch24";
			clocks = <&cpg CPG_MOD 812>;
565
			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
566 567 568
			phy-mode = "rgmii-id";
			#address-cells = <1>;
			#size-cells = <0>;
569
			status = "disabled";
570 571
		};

572 573 574 575 576 577 578 579 580 581 582
		can0: can@e6c30000 {
			compatible = "renesas,can-r8a7795",
				     "renesas,rcar-gen3-can";
			reg = <0 0xe6c30000 0 0x1000>;
			interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 916>,
			       <&cpg CPG_CORE R8A7795_CLK_CANFD>,
			       <&can_clk>;
			clock-names = "clkp1", "clkp2", "can_clk";
			assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
			assigned-clock-rates = <40000000>;
583
			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
584 585 586 587 588 589 590 591 592 593 594 595 596 597
			status = "disabled";
		};

		can1: can@e6c38000 {
			compatible = "renesas,can-r8a7795",
				     "renesas,rcar-gen3-can";
			reg = <0 0xe6c38000 0 0x1000>;
			interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 915>,
			       <&cpg CPG_CORE R8A7795_CLK_CANFD>,
			       <&can_clk>;
			clock-names = "clkp1", "clkp2", "can_clk";
			assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
			assigned-clock-rates = <40000000>;
598
			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
599 600 601
			status = "disabled";
		};

602 603 604 605 606 607 608 609 610 611 612 613 614 615 616 617 618 619 620 621 622 623 624 625
		canfd: can@e66c0000 {
			compatible = "renesas,r8a7795-canfd",
				     "renesas,rcar-gen3-canfd";
			reg = <0 0xe66c0000 0 0x8000>;
			interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
				   <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 914>,
			       <&cpg CPG_CORE R8A7795_CLK_CANFD>,
			       <&can_clk>;
			clock-names = "fck", "canfd", "can_clk";
			assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
			assigned-clock-rates = <40000000>;
			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
			status = "disabled";

			channel0 {
				status = "disabled";
			};

			channel1 {
				status = "disabled";
			};
		};

626
		hscif0: serial@e6540000 {
627 628 629
			compatible = "renesas,hscif-r8a7795",
				     "renesas,rcar-gen3-hscif",
				     "renesas,hscif";
630 631
			reg = <0 0xe6540000 0 96>;
			interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
632 633 634 635
			clocks = <&cpg CPG_MOD 520>,
				 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
				 <&scif_clk>;
			clock-names = "fck", "brg_int", "scif_clk";
636 637
			dmas = <&dmac1 0x31>, <&dmac1 0x30>;
			dma-names = "tx", "rx";
638
			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
639 640 641 642
			status = "disabled";
		};

		hscif1: serial@e6550000 {
643 644 645
			compatible = "renesas,hscif-r8a7795",
				     "renesas,rcar-gen3-hscif",
				     "renesas,hscif";
646 647
			reg = <0 0xe6550000 0 96>;
			interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
648 649 650 651
			clocks = <&cpg CPG_MOD 519>,
				 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
				 <&scif_clk>;
			clock-names = "fck", "brg_int", "scif_clk";
652 653
			dmas = <&dmac1 0x33>, <&dmac1 0x32>;
			dma-names = "tx", "rx";
654
			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
655 656 657 658
			status = "disabled";
		};

		hscif2: serial@e6560000 {
659 660 661
			compatible = "renesas,hscif-r8a7795",
				     "renesas,rcar-gen3-hscif",
				     "renesas,hscif";
662 663
			reg = <0 0xe6560000 0 96>;
			interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
664 665 666 667
			clocks = <&cpg CPG_MOD 518>,
				 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
				 <&scif_clk>;
			clock-names = "fck", "brg_int", "scif_clk";
668 669
			dmas = <&dmac1 0x35>, <&dmac1 0x34>;
			dma-names = "tx", "rx";
670
			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
671 672 673 674
			status = "disabled";
		};

		hscif3: serial@e66a0000 {
675 676 677
			compatible = "renesas,hscif-r8a7795",
				     "renesas,rcar-gen3-hscif",
				     "renesas,hscif";
678 679
			reg = <0 0xe66a0000 0 96>;
			interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
680 681 682 683
			clocks = <&cpg CPG_MOD 517>,
				 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
				 <&scif_clk>;
			clock-names = "fck", "brg_int", "scif_clk";
684 685
			dmas = <&dmac0 0x37>, <&dmac0 0x36>;
			dma-names = "tx", "rx";
686
			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
687 688 689 690
			status = "disabled";
		};

		hscif4: serial@e66b0000 {
691 692 693
			compatible = "renesas,hscif-r8a7795",
				     "renesas,rcar-gen3-hscif",
				     "renesas,hscif";
694 695
			reg = <0 0xe66b0000 0 96>;
			interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
696 697 698 699
			clocks = <&cpg CPG_MOD 516>,
				 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
				 <&scif_clk>;
			clock-names = "fck", "brg_int", "scif_clk";
700 701
			dmas = <&dmac0 0x39>, <&dmac0 0x38>;
			dma-names = "tx", "rx";
702
			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
703 704 705
			status = "disabled";
		};

706
		scif0: serial@e6e60000 {
707 708
			compatible = "renesas,scif-r8a7795",
				     "renesas,rcar-gen3-scif", "renesas,scif";
709 710
			reg = <0 0xe6e60000 0 64>;
			interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
711 712 713 714
			clocks = <&cpg CPG_MOD 207>,
				 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
				 <&scif_clk>;
			clock-names = "fck", "brg_int", "scif_clk";
715 716
			dmas = <&dmac1 0x51>, <&dmac1 0x50>;
			dma-names = "tx", "rx";
717
			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
718 719 720 721
			status = "disabled";
		};

		scif1: serial@e6e68000 {
722 723
			compatible = "renesas,scif-r8a7795",
				     "renesas,rcar-gen3-scif", "renesas,scif";
724 725
			reg = <0 0xe6e68000 0 64>;
			interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
726 727 728 729
			clocks = <&cpg CPG_MOD 206>,
				 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
				 <&scif_clk>;
			clock-names = "fck", "brg_int", "scif_clk";
730 731
			dmas = <&dmac1 0x53>, <&dmac1 0x52>;
			dma-names = "tx", "rx";
732
			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
733 734 735 736
			status = "disabled";
		};

		scif2: serial@e6e88000 {
737 738
			compatible = "renesas,scif-r8a7795",
				     "renesas,rcar-gen3-scif", "renesas,scif";
739 740
			reg = <0 0xe6e88000 0 64>;
			interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
741 742 743 744
			clocks = <&cpg CPG_MOD 310>,
				 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
				 <&scif_clk>;
			clock-names = "fck", "brg_int", "scif_clk";
745 746
			dmas = <&dmac1 0x13>, <&dmac1 0x12>;
			dma-names = "tx", "rx";
747
			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
748 749 750 751
			status = "disabled";
		};

		scif3: serial@e6c50000 {
752 753
			compatible = "renesas,scif-r8a7795",
				     "renesas,rcar-gen3-scif", "renesas,scif";
754 755
			reg = <0 0xe6c50000 0 64>;
			interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
756 757 758 759
			clocks = <&cpg CPG_MOD 204>,
				 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
				 <&scif_clk>;
			clock-names = "fck", "brg_int", "scif_clk";
760 761
			dmas = <&dmac0 0x57>, <&dmac0 0x56>;
			dma-names = "tx", "rx";
762
			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
763 764 765 766
			status = "disabled";
		};

		scif4: serial@e6c40000 {
767 768
			compatible = "renesas,scif-r8a7795",
				     "renesas,rcar-gen3-scif", "renesas,scif";
769 770
			reg = <0 0xe6c40000 0 64>;
			interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
771 772 773 774
			clocks = <&cpg CPG_MOD 203>,
				 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
				 <&scif_clk>;
			clock-names = "fck", "brg_int", "scif_clk";
775 776
			dmas = <&dmac0 0x59>, <&dmac0 0x58>;
			dma-names = "tx", "rx";
777
			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
778 779 780 781
			status = "disabled";
		};

		scif5: serial@e6f30000 {
782 783
			compatible = "renesas,scif-r8a7795",
				     "renesas,rcar-gen3-scif", "renesas,scif";
784 785
			reg = <0 0xe6f30000 0 64>;
			interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
786 787 788 789
			clocks = <&cpg CPG_MOD 202>,
				 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
				 <&scif_clk>;
			clock-names = "fck", "brg_int", "scif_clk";
790 791
			dmas = <&dmac1 0x5b>, <&dmac1 0x5a>;
			dma-names = "tx", "rx";
792
			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
793 794
			status = "disabled";
		};
795 796 797 798

		i2c0: i2c@e6500000 {
			#address-cells = <1>;
			#size-cells = <0>;
799 800
			compatible = "renesas,i2c-r8a7795",
				     "renesas,rcar-gen3-i2c";
801 802 803
			reg = <0 0xe6500000 0 0x40>;
			interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 931>;
804
			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
805 806
			dmas = <&dmac1 0x91>, <&dmac1 0x90>;
			dma-names = "tx", "rx";
807
			i2c-scl-internal-delay-ns = <110>;
808 809 810 811 812 813
			status = "disabled";
		};

		i2c1: i2c@e6508000 {
			#address-cells = <1>;
			#size-cells = <0>;
814 815
			compatible = "renesas,i2c-r8a7795",
				     "renesas,rcar-gen3-i2c";
816 817 818
			reg = <0 0xe6508000 0 0x40>;
			interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 930>;
819
			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
820 821
			dmas = <&dmac1 0x93>, <&dmac1 0x92>;
			dma-names = "tx", "rx";
822
			i2c-scl-internal-delay-ns = <6>;
823 824 825 826 827 828
			status = "disabled";
		};

		i2c2: i2c@e6510000 {
			#address-cells = <1>;
			#size-cells = <0>;
829 830
			compatible = "renesas,i2c-r8a7795",
				     "renesas,rcar-gen3-i2c";
831 832 833
			reg = <0 0xe6510000 0 0x40>;
			interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 929>;
834
			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
835 836
			dmas = <&dmac1 0x95>, <&dmac1 0x94>;
			dma-names = "tx", "rx";
837
			i2c-scl-internal-delay-ns = <6>;
838 839 840 841 842 843
			status = "disabled";
		};

		i2c3: i2c@e66d0000 {
			#address-cells = <1>;
			#size-cells = <0>;
844 845
			compatible = "renesas,i2c-r8a7795",
				     "renesas,rcar-gen3-i2c";
846 847 848
			reg = <0 0xe66d0000 0 0x40>;
			interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 928>;
849
			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
850 851
			dmas = <&dmac0 0x97>, <&dmac0 0x96>;
			dma-names = "tx", "rx";
852
			i2c-scl-internal-delay-ns = <110>;
853 854 855 856 857 858
			status = "disabled";
		};

		i2c4: i2c@e66d8000 {
			#address-cells = <1>;
			#size-cells = <0>;
859 860
			compatible = "renesas,i2c-r8a7795",
				     "renesas,rcar-gen3-i2c";
861 862 863
			reg = <0 0xe66d8000 0 0x40>;
			interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 927>;
864
			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
865 866
			dmas = <&dmac0 0x99>, <&dmac0 0x98>;
			dma-names = "tx", "rx";
867
			i2c-scl-internal-delay-ns = <110>;
868 869 870 871 872 873
			status = "disabled";
		};

		i2c5: i2c@e66e0000 {
			#address-cells = <1>;
			#size-cells = <0>;
874 875
			compatible = "renesas,i2c-r8a7795",
				     "renesas,rcar-gen3-i2c";
876 877 878
			reg = <0 0xe66e0000 0 0x40>;
			interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 919>;
879
			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
880 881
			dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
			dma-names = "tx", "rx";
882
			i2c-scl-internal-delay-ns = <110>;
883 884 885 886 887 888
			status = "disabled";
		};

		i2c6: i2c@e66e8000 {
			#address-cells = <1>;
			#size-cells = <0>;
889 890
			compatible = "renesas,i2c-r8a7795",
				     "renesas,rcar-gen3-i2c";
891 892 893
			reg = <0 0xe66e8000 0 0x40>;
			interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 918>;
894
			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
895 896
			dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
			dma-names = "tx", "rx";
897
			i2c-scl-internal-delay-ns = <6>;
898 899
			status = "disabled";
		};
900

901 902 903 904 905 906 907 908 909 910 911 912 913 914 915 916 917 918 919 920 921 922 923 924 925 926 927 928 929 930 931 932 933 934 935 936 937 938 939 940 941 942 943 944 945 946 947 948 949 950 951 952 953 954 955 956 957 958 959 960 961 962 963
		pwm0: pwm@e6e30000 {
			compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
			reg = <0 0xe6e30000 0 0x8>;
			clocks = <&cpg CPG_MOD 523>;
			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
			#pwm-cells = <2>;
			status = "disabled";
		};

		pwm1: pwm@e6e31000 {
			compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
			reg = <0 0xe6e31000 0 0x8>;
			clocks = <&cpg CPG_MOD 523>;
			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
			#pwm-cells = <2>;
			status = "disabled";
		};

		pwm2: pwm@e6e32000 {
			compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
			reg = <0 0xe6e32000 0 0x8>;
			clocks = <&cpg CPG_MOD 523>;
			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
			#pwm-cells = <2>;
			status = "disabled";
		};

		pwm3: pwm@e6e33000 {
			compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
			reg = <0 0xe6e33000 0 0x8>;
			clocks = <&cpg CPG_MOD 523>;
			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
			#pwm-cells = <2>;
			status = "disabled";
		};

		pwm4: pwm@e6e34000 {
			compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
			reg = <0 0xe6e34000 0 0x8>;
			clocks = <&cpg CPG_MOD 523>;
			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
			#pwm-cells = <2>;
			status = "disabled";
		};

		pwm5: pwm@e6e35000 {
			compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
			reg = <0 0xe6e35000 0 0x8>;
			clocks = <&cpg CPG_MOD 523>;
			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
			#pwm-cells = <2>;
			status = "disabled";
		};

		pwm6: pwm@e6e36000 {
			compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
			reg = <0 0xe6e36000 0 0x8>;
			clocks = <&cpg CPG_MOD 523>;
			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
			#pwm-cells = <2>;
			status = "disabled";
		};

964 965 966 967 968 969 970 971 972 973 974 975 976 977 978 979 980 981 982 983 984 985 986 987 988 989 990
		rcar_sound: sound@ec500000 {
			/*
			 * #sound-dai-cells is required
			 *
			 * Single DAI : #sound-dai-cells = <0>;	<&rcar_sound>;
			 * Multi  DAI : #sound-dai-cells = <1>;	<&rcar_sound N>;
			 */
			/*
			 * #clock-cells is required for audio_clkout0/1/2/3
			 *
			 * clkout	: #clock-cells = <0>;	<&rcar_sound>;
			 * clkout0/1/2/3: #clock-cells = <1>;	<&rcar_sound N>;
			 */
			compatible =  "renesas,rcar_sound-r8a7795", "renesas,rcar_sound-gen3";
			reg =	<0 0xec500000 0 0x1000>, /* SCU */
				<0 0xec5a0000 0 0x100>,  /* ADG */
				<0 0xec540000 0 0x1000>, /* SSIU */
				<0 0xec541000 0 0x280>,  /* SSI */
				<0 0xec740000 0 0x200>;  /* Audio DMAC peri peri*/
			reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";

			clocks = <&cpg CPG_MOD 1005>,
				 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
				 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
				 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
				 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
				 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
991 992 993 994 995
				 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
				 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
				 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
				 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
				 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
996
				 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
997
				 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
998
				 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
999 1000 1001 1002 1003 1004 1005
				 <&audio_clk_a>, <&audio_clk_b>,
				 <&audio_clk_c>,
				 <&cpg CPG_CORE R8A7795_CLK_S0D4>;
			clock-names = "ssi-all",
				      "ssi.9", "ssi.8", "ssi.7", "ssi.6",
				      "ssi.5", "ssi.4", "ssi.3", "ssi.2",
				      "ssi.1", "ssi.0",
1006 1007 1008
				      "src.9", "src.8", "src.7", "src.6",
				      "src.5", "src.4", "src.3", "src.2",
				      "src.1", "src.0",
1009
				      "mix.1", "mix.0",
1010
				      "ctu.1", "ctu.0",
1011
				      "dvc.0", "dvc.1",
1012
				      "clk_a", "clk_b", "clk_c", "clk_i";
1013
			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1014 1015
			status = "disabled";

1016
			rcar_sound,dvc {
1017
				dvc0: dvc-0 {
1018 1019 1020
					dmas = <&audma0 0xbc>;
					dma-names = "tx";
				};
1021
				dvc1: dvc-1 {
1022 1023 1024 1025 1026
					dmas = <&audma0 0xbe>;
					dma-names = "tx";
				};
			};

1027 1028 1029 1030 1031
			rcar_sound,mix {
				mix0: mix-0 { };
				mix1: mix-1 { };
			};

1032 1033 1034 1035 1036 1037 1038 1039 1040 1041 1042
			rcar_sound,ctu {
				ctu00: ctu-0 { };
				ctu01: ctu-1 { };
				ctu02: ctu-2 { };
				ctu03: ctu-3 { };
				ctu10: ctu-4 { };
				ctu11: ctu-5 { };
				ctu12: ctu-6 { };
				ctu13: ctu-7 { };
			};

1043
			rcar_sound,src {
1044
				src0: src-0 {
1045
					interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1046 1047 1048
					dmas = <&audma0 0x85>, <&audma1 0x9a>;
					dma-names = "rx", "tx";
				};
1049
				src1: src-1 {
1050
					interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1051 1052 1053
					dmas = <&audma0 0x87>, <&audma1 0x9c>;
					dma-names = "rx", "tx";
				};
1054
				src2: src-2 {
1055
					interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1056 1057 1058
					dmas = <&audma0 0x89>, <&audma1 0x9e>;
					dma-names = "rx", "tx";
				};
1059
				src3: src-3 {
1060
					interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1061 1062 1063
					dmas = <&audma0 0x8b>, <&audma1 0xa0>;
					dma-names = "rx", "tx";
				};
1064
				src4: src-4 {
1065
					interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1066 1067 1068
					dmas = <&audma0 0x8d>, <&audma1 0xb0>;
					dma-names = "rx", "tx";
				};
1069
				src5: src-5 {
1070
					interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1071 1072 1073
					dmas = <&audma0 0x8f>, <&audma1 0xb2>;
					dma-names = "rx", "tx";
				};
1074
				src6: src-6 {
1075
					interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1076 1077 1078
					dmas = <&audma0 0x91>, <&audma1 0xb4>;
					dma-names = "rx", "tx";
				};
1079
				src7: src-7 {
1080
					interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1081 1082 1083
					dmas = <&audma0 0x93>, <&audma1 0xb6>;
					dma-names = "rx", "tx";
				};
1084
				src8: src-8 {
1085
					interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1086 1087 1088
					dmas = <&audma0 0x95>, <&audma1 0xb8>;
					dma-names = "rx", "tx";
				};
1089
				src9: src-9 {
1090
					interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1091 1092 1093 1094 1095
					dmas = <&audma0 0x97>, <&audma1 0xba>;
					dma-names = "rx", "tx";
				};
			};

1096
			rcar_sound,ssi {
1097
				ssi0: ssi-0 {
1098
					interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1099 1100
					dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
					dma-names = "rx", "tx", "rxu", "txu";
1101
				};
1102
				ssi1: ssi-1 {
1103
					 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1104 1105
					dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
					dma-names = "rx", "tx", "rxu", "txu";
1106
				};
1107
				ssi2: ssi-2 {
1108
					interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1109 1110
					dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
					dma-names = "rx", "tx", "rxu", "txu";
1111
				};
1112
				ssi3: ssi-3 {
1113
					interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1114 1115
					dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
					dma-names = "rx", "tx", "rxu", "txu";
1116
				};
1117
				ssi4: ssi-4 {
1118
					interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1119 1120
					dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
					dma-names = "rx", "tx", "rxu", "txu";
1121
				};
1122
				ssi5: ssi-5 {
1123
					interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1124 1125
					dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
					dma-names = "rx", "tx", "rxu", "txu";
1126
				};
1127
				ssi6: ssi-6 {
1128
					interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1129 1130
					dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
					dma-names = "rx", "tx", "rxu", "txu";
1131
				};
1132
				ssi7: ssi-7 {
1133
					interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1134 1135
					dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
					dma-names = "rx", "tx", "rxu", "txu";
1136
				};
1137
				ssi8: ssi-8 {
1138
					interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1139 1140
					dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
					dma-names = "rx", "tx", "rxu", "txu";
1141
				};
1142
				ssi9: ssi-9 {
1143
					interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1144 1145
					dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
					dma-names = "rx", "tx", "rxu", "txu";
1146 1147 1148
				};
			};
		};
1149 1150 1151 1152 1153

		sata: sata@ee300000 {
			compatible = "renesas,sata-r8a7795";
			reg = <0 0xee300000 0 0x1fff>;
			interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
1154
			clocks = <&cpg CPG_MOD 815>;
1155
			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1156 1157
			status = "disabled";
		};
1158 1159

		xhci0: usb@ee000000 {
1160
			compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci";
1161 1162 1163
			reg = <0 0xee000000 0 0xc00>;
			interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 328>;
1164
			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1165 1166 1167 1168
			status = "disabled";
		};

		xhci1: usb@ee0400000 {
1169
			compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci";
1170 1171 1172
			reg = <0 0xee040000 0 0xc00>;
			interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 327>;
1173
			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1174 1175
			status = "disabled";
		};
1176 1177 1178 1179 1180 1181 1182 1183 1184

		usb_dmac0: dma-controller@e65a0000 {
			compatible = "renesas,r8a7795-usb-dmac",
				     "renesas,usb-dmac";
			reg = <0 0xe65a0000 0 0x100>;
			interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "ch0", "ch1";
			clocks = <&cpg CPG_MOD 330>;
1185
			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1186 1187 1188 1189 1190 1191 1192 1193 1194 1195 1196 1197
			#dma-cells = <1>;
			dma-channels = <2>;
		};

		usb_dmac1: dma-controller@e65b0000 {
			compatible = "renesas,r8a7795-usb-dmac",
				     "renesas,usb-dmac";
			reg = <0 0xe65b0000 0 0x100>;
			interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "ch0", "ch1";
			clocks = <&cpg CPG_MOD 331>;
1198
			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1199 1200 1201
			#dma-cells = <1>;
			dma-channels = <2>;
		};
1202 1203 1204 1205 1206 1207

		sdhi0: sd@ee100000 {
			compatible = "renesas,sdhi-r8a7795";
			reg = <0 0xee100000 0 0x2000>;
			interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 314>;
1208
			max-frequency = <200000000>;
1209
			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1210 1211 1212 1213 1214 1215 1216 1217
			status = "disabled";
		};

		sdhi1: sd@ee120000 {
			compatible = "renesas,sdhi-r8a7795";
			reg = <0 0xee120000 0 0x2000>;
			interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 313>;
1218
			max-frequency = <200000000>;
1219
			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1220 1221 1222 1223 1224 1225 1226 1227
			status = "disabled";
		};

		sdhi2: sd@ee140000 {
			compatible = "renesas,sdhi-r8a7795";
			reg = <0 0xee140000 0 0x2000>;
			interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 312>;
1228
			max-frequency = <200000000>;
1229
			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1230 1231 1232 1233 1234 1235 1236 1237
			status = "disabled";
		};

		sdhi3: sd@ee160000 {
			compatible = "renesas,sdhi-r8a7795";
			reg = <0 0xee160000 0 0x2000>;
			interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 311>;
1238
			max-frequency = <200000000>;
1239
			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1240 1241
			status = "disabled";
		};
1242 1243

		usb2_phy0: usb-phy@ee080200 {
1244 1245
			compatible = "renesas,usb2-phy-r8a7795",
				     "renesas,rcar-gen3-usb2-phy";
1246 1247 1248
			reg = <0 0xee080200 0 0x700>;
			interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 703>;
1249
			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1250 1251 1252 1253 1254
			#phy-cells = <0>;
			status = "disabled";
		};

		usb2_phy1: usb-phy@ee0a0200 {
1255 1256
			compatible = "renesas,usb2-phy-r8a7795",
				     "renesas,rcar-gen3-usb2-phy";
1257 1258
			reg = <0 0xee0a0200 0 0x700>;
			clocks = <&cpg CPG_MOD 702>;
1259
			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1260 1261 1262 1263 1264
			#phy-cells = <0>;
			status = "disabled";
		};

		usb2_phy2: usb-phy@ee0c0200 {
1265 1266
			compatible = "renesas,usb2-phy-r8a7795",
				     "renesas,rcar-gen3-usb2-phy";
1267 1268
			reg = <0 0xee0c0200 0 0x700>;
			clocks = <&cpg CPG_MOD 701>;
1269
			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1270 1271 1272
			#phy-cells = <0>;
			status = "disabled";
		};
1273 1274 1275 1276 1277 1278 1279 1280

		ehci0: usb@ee080100 {
			compatible = "generic-ehci";
			reg = <0 0xee080100 0 0x100>;
			interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 703>;
			phys = <&usb2_phy0>;
			phy-names = "usb";
1281
			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1282 1283 1284 1285 1286 1287 1288 1289 1290 1291
			status = "disabled";
		};

		ehci1: usb@ee0a0100 {
			compatible = "generic-ehci";
			reg = <0 0xee0a0100 0 0x100>;
			interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 702>;
			phys = <&usb2_phy1>;
			phy-names = "usb";
1292
			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1293 1294 1295 1296 1297 1298 1299 1300 1301 1302
			status = "disabled";
		};

		ehci2: usb@ee0c0100 {
			compatible = "generic-ehci";
			reg = <0 0xee0c0100 0 0x100>;
			interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 701>;
			phys = <&usb2_phy2>;
			phy-names = "usb";
1303
			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1304 1305 1306 1307 1308 1309 1310 1311 1312 1313
			status = "disabled";
		};

		ohci0: usb@ee080000 {
			compatible = "generic-ohci";
			reg = <0 0xee080000 0 0x100>;
			interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 703>;
			phys = <&usb2_phy0>;
			phy-names = "usb";
1314
			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1315 1316 1317 1318 1319 1320 1321 1322 1323 1324
			status = "disabled";
		};

		ohci1: usb@ee0a0000 {
			compatible = "generic-ohci";
			reg = <0 0xee0a0000 0 0x100>;
			interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 702>;
			phys = <&usb2_phy1>;
			phy-names = "usb";
1325
			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1326 1327 1328 1329 1330 1331 1332 1333 1334 1335
			status = "disabled";
		};

		ohci2: usb@ee0c0000 {
			compatible = "generic-ohci";
			reg = <0 0xee0c0000 0 0x100>;
			interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 701>;
			phys = <&usb2_phy2>;
			phy-names = "usb";
1336
			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1337 1338
			status = "disabled";
		};
1339 1340 1341 1342 1343 1344 1345 1346 1347 1348 1349 1350 1351 1352 1353 1354 1355

		hsusb: usb@e6590000 {
			compatible = "renesas,usbhs-r8a7795",
				     "renesas,rcar-gen3-usbhs";
			reg = <0 0xe6590000 0 0x100>;
			interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 704>;
			dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
			       <&usb_dmac1 0>, <&usb_dmac1 1>;
			dma-names = "ch0", "ch1", "ch2", "ch3";
			renesas,buswait = <11>;
			phys = <&usb2_phy0>;
			phy-names = "usb";
			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
			status = "disabled";
		};

1356
		pciec0: pcie@fe000000 {
1357 1358
			compatible = "renesas,pcie-r8a7795",
				     "renesas,pcie-rcar-gen3";
1359 1360 1361 1362 1363 1364 1365 1366 1367 1368 1369 1370 1371 1372 1373 1374 1375 1376 1377
			reg = <0 0xfe000000 0 0x80000>;
			#address-cells = <3>;
			#size-cells = <2>;
			bus-range = <0x00 0xff>;
			device_type = "pci";
			ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
				0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
				0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
				0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
			/* Map all possible DDR as inbound ranges */
			dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
			interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
			#interrupt-cells = <1>;
			interrupt-map-mask = <0 0 0 0>;
			interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
			clock-names = "pcie", "pcie_bus";
1378
			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1379 1380 1381 1382
			status = "disabled";
		};

		pciec1: pcie@ee800000 {
1383 1384
			compatible = "renesas,pcie-r8a7795",
				     "renesas,pcie-rcar-gen3";
1385 1386 1387 1388 1389 1390 1391 1392 1393 1394 1395 1396 1397 1398 1399 1400 1401 1402 1403
			reg = <0 0xee800000 0 0x80000>;
			#address-cells = <3>;
			#size-cells = <2>;
			bus-range = <0x00 0xff>;
			device_type = "pci";
			ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000
				0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000
				0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000
				0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
			/* Map all possible DDR as inbound ranges */
			dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
			interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
			#interrupt-cells = <1>;
			interrupt-map-mask = <0 0 0 0>;
			interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
			clock-names = "pcie", "pcie_bus";
1404
			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1405 1406
			status = "disabled";
		};
1407

1408 1409 1410 1411 1412 1413 1414 1415 1416 1417
		vspbc: vsp@fe920000 {
			compatible = "renesas,vsp2";
			reg = <0 0xfe920000 0 0x8000>;
			interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 624>;
			power-domains = <&sysc R8A7795_PD_A3VP>;

			renesas,fcp = <&fcpvb1>;
		};

1418
		fcpvb1: fcp@fe92f000 {
1419
			compatible = "renesas,fcpv";
1420 1421 1422 1423 1424
			reg = <0 0xfe92f000 0 0x200>;
			clocks = <&cpg CPG_MOD 606>;
			power-domains = <&sysc R8A7795_PD_A3VP>;
		};

1425
		fcpf0: fcp@fe950000 {
1426
			compatible = "renesas,fcpf";
1427 1428 1429 1430 1431 1432
			reg = <0 0xfe950000 0 0x200>;
			clocks = <&cpg CPG_MOD 615>;
			power-domains = <&sysc R8A7795_PD_A3VP>;
		};

		fcpf1: fcp@fe951000 {
1433
			compatible = "renesas,fcpf";
1434 1435 1436 1437 1438 1439
			reg = <0 0xfe951000 0 0x200>;
			clocks = <&cpg CPG_MOD 614>;
			power-domains = <&sysc R8A7795_PD_A3VP>;
		};

		fcpf2: fcp@fe952000 {
1440
			compatible = "renesas,fcpf";
1441 1442 1443 1444
			reg = <0 0xfe952000 0 0x200>;
			clocks = <&cpg CPG_MOD 613>;
			power-domains = <&sysc R8A7795_PD_A3VP>;
		};
1445

1446 1447 1448 1449 1450 1451 1452 1453 1454 1455
		vspbd: vsp@fe960000 {
			compatible = "renesas,vsp2";
			reg = <0 0xfe960000 0 0x8000>;
			interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 626>;
			power-domains = <&sysc R8A7795_PD_A3VP>;

			renesas,fcp = <&fcpvb0>;
		};

1456
		fcpvb0: fcp@fe96f000 {
1457
			compatible = "renesas,fcpv";
1458 1459 1460 1461 1462
			reg = <0 0xfe96f000 0 0x200>;
			clocks = <&cpg CPG_MOD 607>;
			power-domains = <&sysc R8A7795_PD_A3VP>;
		};

1463 1464 1465 1466 1467 1468 1469 1470 1471 1472
		vspi0: vsp@fe9a0000 {
			compatible = "renesas,vsp2";
			reg = <0 0xfe9a0000 0 0x8000>;
			interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 631>;
			power-domains = <&sysc R8A7795_PD_A3VP>;

			renesas,fcp = <&fcpvi0>;
		};

1473
		fcpvi0: fcp@fe9af000 {
1474
			compatible = "renesas,fcpv";
1475 1476 1477 1478 1479
			reg = <0 0xfe9af000 0 0x200>;
			clocks = <&cpg CPG_MOD 611>;
			power-domains = <&sysc R8A7795_PD_A3VP>;
		};

1480 1481 1482 1483 1484 1485 1486 1487 1488 1489
		vspi1: vsp@fe9b0000 {
			compatible = "renesas,vsp2";
			reg = <0 0xfe9b0000 0 0x8000>;
			interrupts = <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 630>;
			power-domains = <&sysc R8A7795_PD_A3VP>;

			renesas,fcp = <&fcpvi1>;
		};

1490
		fcpvi1: fcp@fe9bf000 {
1491
			compatible = "renesas,fcpv";
1492 1493 1494 1495 1496
			reg = <0 0xfe9bf000 0 0x200>;
			clocks = <&cpg CPG_MOD 610>;
			power-domains = <&sysc R8A7795_PD_A3VP>;
		};

1497 1498 1499 1500 1501 1502 1503 1504 1505 1506
		vspi2: vsp@fe9c0000 {
			compatible = "renesas,vsp2";
			reg = <0 0xfe9c0000 0 0x8000>;
			interrupts = <GIC_SPI 446 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 629>;
			power-domains = <&sysc R8A7795_PD_A3VP>;

			renesas,fcp = <&fcpvi2>;
		};

1507
		fcpvi2: fcp@fe9cf000 {
1508
			compatible = "renesas,fcpv";
1509 1510 1511 1512 1513
			reg = <0 0xfe9cf000 0 0x200>;
			clocks = <&cpg CPG_MOD 609>;
			power-domains = <&sysc R8A7795_PD_A3VP>;
		};

1514 1515 1516 1517 1518 1519 1520 1521 1522 1523
		vspd0: vsp@fea20000 {
			compatible = "renesas,vsp2";
			reg = <0 0xfea20000 0 0x4000>;
			interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 623>;
			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;

			renesas,fcp = <&fcpvd0>;
		};

1524
		fcpvd0: fcp@fea27000 {
1525
			compatible = "renesas,fcpv";
1526 1527 1528 1529 1530
			reg = <0 0xfea27000 0 0x200>;
			clocks = <&cpg CPG_MOD 603>;
			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
		};

1531 1532 1533 1534 1535 1536 1537 1538 1539 1540
		vspd1: vsp@fea28000 {
			compatible = "renesas,vsp2";
			reg = <0 0xfea28000 0 0x4000>;
			interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 622>;
			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;

			renesas,fcp = <&fcpvd1>;
		};

1541
		fcpvd1: fcp@fea2f000 {
1542
			compatible = "renesas,fcpv";
1543 1544 1545 1546 1547
			reg = <0 0xfea2f000 0 0x200>;
			clocks = <&cpg CPG_MOD 602>;
			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
		};

1548 1549 1550 1551 1552 1553 1554 1555 1556 1557
		vspd2: vsp@fea30000 {
			compatible = "renesas,vsp2";
			reg = <0 0xfea30000 0 0x4000>;
			interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 621>;
			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;

			renesas,fcp = <&fcpvd2>;
		};

1558
		fcpvd2: fcp@fea37000 {
1559
			compatible = "renesas,fcpv";
1560 1561 1562 1563 1564
			reg = <0 0xfea37000 0 0x200>;
			clocks = <&cpg CPG_MOD 601>;
			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
		};

1565 1566 1567 1568 1569 1570 1571 1572 1573 1574
		vspd3: vsp@fea38000 {
			compatible = "renesas,vsp2";
			reg = <0 0xfea38000 0 0x4000>;
			interrupts = <GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 620>;
			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;

			renesas,fcp = <&fcpvd3>;
		};

1575
		fcpvd3: fcp@fea3f000 {
1576
			compatible = "renesas,fcpv";
1577 1578 1579 1580 1581
			reg = <0 0xfea3f000 0 0x200>;
			clocks = <&cpg CPG_MOD 600>;
			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
		};

1582 1583 1584 1585 1586 1587 1588 1589 1590 1591 1592 1593 1594 1595 1596 1597 1598 1599 1600 1601 1602 1603 1604 1605 1606 1607
		fdp1@fe940000 {
			compatible = "renesas,fdp1";
			reg = <0 0xfe940000 0 0x2400>;
			interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 119>;
			power-domains = <&sysc R8A7795_PD_A3VP>;
			renesas,fcp = <&fcpf0>;
		};

		fdp1@fe944000 {
			compatible = "renesas,fdp1";
			reg = <0 0xfe944000 0 0x2400>;
			interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 118>;
			power-domains = <&sysc R8A7795_PD_A3VP>;
			renesas,fcp = <&fcpf1>;
		};

		fdp1@fe948000 {
			compatible = "renesas,fdp1";
			reg = <0 0xfe948000 0 0x2400>;
			interrupts = <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 117>;
			power-domains = <&sysc R8A7795_PD_A3VP>;
			renesas,fcp = <&fcpf2>;
		};
1608 1609 1610 1611 1612 1613 1614 1615 1616 1617 1618 1619 1620 1621 1622 1623 1624 1625 1626 1627 1628 1629 1630 1631 1632 1633 1634 1635 1636 1637 1638 1639 1640 1641 1642 1643 1644 1645 1646 1647 1648 1649 1650 1651 1652 1653

		du: display@feb00000 {
			compatible = "renesas,du-r8a7795";
			reg = <0 0xfeb00000 0 0x80000>,
			      <0 0xfeb90000 0 0x14>;
			reg-names = "du", "lvds.0";
			interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 724>,
				 <&cpg CPG_MOD 723>,
				 <&cpg CPG_MOD 722>,
				 <&cpg CPG_MOD 721>,
				 <&cpg CPG_MOD 727>;
			clock-names = "du.0", "du.1", "du.2", "du.3", "lvds.0";
			status = "disabled";

			vsps = <&vspd0 &vspd1 &vspd2 &vspd3>;

			ports {
				#address-cells = <1>;
				#size-cells = <0>;

				port@0 {
					reg = <0>;
					du_out_rgb: endpoint {
					};
				};
				port@1 {
					reg = <1>;
					du_out_hdmi0: endpoint {
					};
				};
				port@2 {
					reg = <2>;
					du_out_hdmi1: endpoint {
					};
				};
				port@3 {
					reg = <3>;
					du_out_lvds0: endpoint {
					};
				};
			};
		};
1654 1655 1656 1657 1658 1659 1660 1661 1662 1663 1664 1665 1666 1667 1668 1669 1670 1671 1672 1673 1674 1675 1676 1677 1678 1679 1680 1681 1682 1683 1684 1685 1686 1687 1688 1689 1690 1691 1692 1693 1694 1695 1696 1697 1698 1699 1700 1701 1702 1703 1704 1705 1706 1707 1708 1709 1710 1711

		tsc: thermal@e6198000 {
			compatible = "renesas,r8a7795-thermal";
			reg = <0 0xe6198000 0 0x68>,
			      <0 0xe61a0000 0 0x5c>,
			      <0 0xe61a8000 0 0x5c>;
			interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 522>;
			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
			#thermal-sensor-cells = <1>;
			status = "okay";
		};

		thermal-zones {
			sensor_thermal1: sensor-thermal1 {
				polling-delay-passive = <250>;
				polling-delay = <1000>;
				thermal-sensors = <&tsc 0>;

				trips {
					sensor1_crit: sensor1-crit {
						temperature = <120000>;
						hysteresis = <2000>;
						type = "critical";
					};
				};
			};

			sensor_thermal2: sensor-thermal2 {
				polling-delay-passive = <250>;
				polling-delay = <1000>;
				thermal-sensors = <&tsc 1>;

				trips {
					sensor2_crit: sensor2-crit {
						temperature = <120000>;
						hysteresis = <2000>;
						type = "critical";
					};
				};
			};

			sensor_thermal3: sensor-thermal3 {
				polling-delay-passive = <250>;
				polling-delay = <1000>;
				thermal-sensors = <&tsc 2>;

				trips {
					sensor3_crit: sensor3-crit {
						temperature = <120000>;
						hysteresis = <2000>;
						type = "critical";
					};
				};
			};
		};
1712 1713
	};
};