am33xx.dtsi 9.2 KB
Newer Older
1 2 3 4 5 6 7 8 9 10
/*
 * Device Tree Source for AM33XX SoC
 *
 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
 *
 * This file is licensed under the terms of the GNU General Public License
 * version 2.  This program is licensed "as is" without any warranty of any
 * kind, whether express or implied.
 */

11
#include <dt-bindings/gpio/gpio.h>
12
#include <dt-bindings/pinctrl/am33xx.h>
13

14
#include "skeleton.dtsi"
15 16 17

/ {
	compatible = "ti,am33xx";
18
	interrupt-parent = <&intc>;
19 20

	aliases {
21 22 23 24 25 26
		serial0 = &uart0;
		serial1 = &uart1;
		serial2 = &uart2;
		serial3 = &uart3;
		serial4 = &uart4;
		serial5 = &uart5;
27 28
		d_can0 = &dcan0;
		d_can1 = &dcan1;
29 30 31 32 33
	};

	cpus {
		cpu@0 {
			compatible = "arm,cortex-a8";
34 35 36 37 38 39 40 41 42 43 44 45 46 47 48

			/*
			 * To consider voltage drop between PMIC and SoC,
			 * tolerance value is reduced to 2% from 4% and
			 * voltage value is increased as a precaution.
			 */
			operating-points = <
				/* kHz    uV */
				720000  1285000
				600000  1225000
				500000  1125000
				275000  1125000
			>;
			voltage-tolerance = <2>; /* 2 percentage */
			clock-latency = <300000>; /* From omap-cpufreq driver */
49 50 51 52 53 54 55 56 57 58 59 60 61 62 63
		};
	};

	/*
	 * The soc node represents the soc top level view. It is uses for IPs
	 * that are not memory mapped in the MPU view or for the MPU itself.
	 */
	soc {
		compatible = "ti,omap-infra";
		mpu {
			compatible = "ti,omap3-mpu";
			ti,hwmods = "mpu";
		};
	};

64 65 66 67 68 69 70 71 72
	am33xx_pinmux: pinmux@44e10800 {
		compatible = "pinctrl-single";
		reg = <0x44e10800 0x0238>;
		#address-cells = <1>;
		#size-cells = <0>;
		pinctrl-single,register-width = <32>;
		pinctrl-single,function-mask = <0x7f>;
	};

73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94
	/*
	 * XXX: Use a flat representation of the AM33XX interconnect.
	 * The real AM33XX interconnect network is quite complex.Since
	 * that will not bring real advantage to represent that in DT
	 * for the moment, just use a fake OCP bus entry to represent
	 * the whole bus hierarchy.
	 */
	ocp {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;
		ti,hwmods = "l3_main";

		intc: interrupt-controller@48200000 {
			compatible = "ti,omap2-intc";
			interrupt-controller;
			#interrupt-cells = <1>;
			ti,intc-size = <128>;
			reg = <0x48200000 0x1000>;
		};

95
		gpio0: gpio@44e07000 {
96 97 98 99 100 101
			compatible = "ti,omap4-gpio";
			ti,hwmods = "gpio1";
			gpio-controller;
			#gpio-cells = <2>;
			interrupt-controller;
			#interrupt-cells = <1>;
102 103
			reg = <0x44e07000 0x1000>;
			interrupts = <96>;
104 105
		};

106
		gpio1: gpio@4804c000 {
107 108 109 110 111 112
			compatible = "ti,omap4-gpio";
			ti,hwmods = "gpio2";
			gpio-controller;
			#gpio-cells = <2>;
			interrupt-controller;
			#interrupt-cells = <1>;
113 114
			reg = <0x4804c000 0x1000>;
			interrupts = <98>;
115 116
		};

117
		gpio2: gpio@481ac000 {
118 119 120 121 122 123
			compatible = "ti,omap4-gpio";
			ti,hwmods = "gpio3";
			gpio-controller;
			#gpio-cells = <2>;
			interrupt-controller;
			#interrupt-cells = <1>;
124 125
			reg = <0x481ac000 0x1000>;
			interrupts = <32>;
126 127
		};

128
		gpio3: gpio@481ae000 {
129 130 131 132 133 134
			compatible = "ti,omap4-gpio";
			ti,hwmods = "gpio4";
			gpio-controller;
			#gpio-cells = <2>;
			interrupt-controller;
			#interrupt-cells = <1>;
135 136
			reg = <0x481ae000 0x1000>;
			interrupts = <62>;
137 138
		};

139
		uart0: serial@44e09000 {
140 141 142
			compatible = "ti,omap3-uart";
			ti,hwmods = "uart1";
			clock-frequency = <48000000>;
143 144
			reg = <0x44e09000 0x2000>;
			interrupts = <72>;
145
			status = "disabled";
146 147
		};

148
		uart1: serial@48022000 {
149 150 151
			compatible = "ti,omap3-uart";
			ti,hwmods = "uart2";
			clock-frequency = <48000000>;
152 153
			reg = <0x48022000 0x2000>;
			interrupts = <73>;
154
			status = "disabled";
155 156
		};

157
		uart2: serial@48024000 {
158 159 160
			compatible = "ti,omap3-uart";
			ti,hwmods = "uart3";
			clock-frequency = <48000000>;
161 162
			reg = <0x48024000 0x2000>;
			interrupts = <74>;
163
			status = "disabled";
164 165
		};

166
		uart3: serial@481a6000 {
167 168 169
			compatible = "ti,omap3-uart";
			ti,hwmods = "uart4";
			clock-frequency = <48000000>;
170 171
			reg = <0x481a6000 0x2000>;
			interrupts = <44>;
172
			status = "disabled";
173 174
		};

175
		uart4: serial@481a8000 {
176 177 178
			compatible = "ti,omap3-uart";
			ti,hwmods = "uart5";
			clock-frequency = <48000000>;
179 180
			reg = <0x481a8000 0x2000>;
			interrupts = <45>;
181
			status = "disabled";
182 183
		};

184
		uart5: serial@481aa000 {
185 186 187
			compatible = "ti,omap3-uart";
			ti,hwmods = "uart6";
			clock-frequency = <48000000>;
188 189
			reg = <0x481aa000 0x2000>;
			interrupts = <46>;
190
			status = "disabled";
191 192
		};

193
		i2c0: i2c@44e0b000 {
194 195 196 197
			compatible = "ti,omap4-i2c";
			#address-cells = <1>;
			#size-cells = <0>;
			ti,hwmods = "i2c1";
198 199
			reg = <0x44e0b000 0x1000>;
			interrupts = <70>;
200
			status = "disabled";
201 202
		};

203
		i2c1: i2c@4802a000 {
204 205 206 207
			compatible = "ti,omap4-i2c";
			#address-cells = <1>;
			#size-cells = <0>;
			ti,hwmods = "i2c2";
208 209
			reg = <0x4802a000 0x1000>;
			interrupts = <71>;
210
			status = "disabled";
211 212
		};

213
		i2c2: i2c@4819c000 {
214 215 216 217
			compatible = "ti,omap4-i2c";
			#address-cells = <1>;
			#size-cells = <0>;
			ti,hwmods = "i2c3";
218 219
			reg = <0x4819c000 0x1000>;
			interrupts = <30>;
220
			status = "disabled";
221
		};
A
Afzal Mohammed 已提交
222 223 224 225

		wdt2: wdt@44e35000 {
			compatible = "ti,omap3-wdt";
			ti,hwmods = "wd_timer2";
226 227
			reg = <0x44e35000 0x1000>;
			interrupts = <91>;
A
Afzal Mohammed 已提交
228
		};
229 230 231 232

		dcan0: d_can@481cc000 {
			compatible = "bosch,d_can";
			ti,hwmods = "d_can0";
233 234
			reg = <0x481cc000 0x2000
				0x44e10644 0x4>;
235 236 237 238 239 240 241
			interrupts = <52>;
			status = "disabled";
		};

		dcan1: d_can@481d0000 {
			compatible = "bosch,d_can";
			ti,hwmods = "d_can1";
242 243
			reg = <0x481d0000 0x2000
				0x44e10644 0x4>;
244 245 246
			interrupts = <55>;
			status = "disabled";
		};
J
Jon Hunter 已提交
247 248

		timer1: timer@44e31000 {
249
			compatible = "ti,am335x-timer-1ms";
J
Jon Hunter 已提交
250 251 252 253 254 255 256
			reg = <0x44e31000 0x400>;
			interrupts = <67>;
			ti,hwmods = "timer1";
			ti,timer-alwon;
		};

		timer2: timer@48040000 {
257
			compatible = "ti,am335x-timer";
J
Jon Hunter 已提交
258 259 260 261 262 263
			reg = <0x48040000 0x400>;
			interrupts = <68>;
			ti,hwmods = "timer2";
		};

		timer3: timer@48042000 {
264
			compatible = "ti,am335x-timer";
J
Jon Hunter 已提交
265 266 267 268 269 270
			reg = <0x48042000 0x400>;
			interrupts = <69>;
			ti,hwmods = "timer3";
		};

		timer4: timer@48044000 {
271
			compatible = "ti,am335x-timer";
J
Jon Hunter 已提交
272 273 274 275 276 277 278
			reg = <0x48044000 0x400>;
			interrupts = <92>;
			ti,hwmods = "timer4";
			ti,timer-pwm;
		};

		timer5: timer@48046000 {
279
			compatible = "ti,am335x-timer";
J
Jon Hunter 已提交
280 281 282 283 284 285 286
			reg = <0x48046000 0x400>;
			interrupts = <93>;
			ti,hwmods = "timer5";
			ti,timer-pwm;
		};

		timer6: timer@48048000 {
287
			compatible = "ti,am335x-timer";
J
Jon Hunter 已提交
288 289 290 291 292 293 294
			reg = <0x48048000 0x400>;
			interrupts = <94>;
			ti,hwmods = "timer6";
			ti,timer-pwm;
		};

		timer7: timer@4804a000 {
295
			compatible = "ti,am335x-timer";
J
Jon Hunter 已提交
296 297 298 299 300
			reg = <0x4804a000 0x400>;
			interrupts = <95>;
			ti,hwmods = "timer7";
			ti,timer-pwm;
		};
A
Afzal Mohammed 已提交
301 302 303 304 305 306 307 308

		rtc@44e3e000 {
			compatible = "ti,da830-rtc";
			reg = <0x44e3e000 0x1000>;
			interrupts = <75
				      76>;
			ti,hwmods = "rtc";
		};
P
Philip, Avinash 已提交
309 310 311 312 313 314

		spi0: spi@48030000 {
			compatible = "ti,omap4-mcspi";
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x48030000 0x400>;
315
			interrupts = <65>;
P
Philip, Avinash 已提交
316 317 318 319 320 321 322 323 324 325
			ti,spi-num-cs = <2>;
			ti,hwmods = "spi0";
			status = "disabled";
		};

		spi1: spi@481a0000 {
			compatible = "ti,omap4-mcspi";
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x481a0000 0x400>;
326
			interrupts = <125>;
P
Philip, Avinash 已提交
327 328 329 330
			ti,spi-num-cs = <2>;
			ti,hwmods = "spi1";
			status = "disabled";
		};
331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347

		usb@47400000 {
			compatible = "ti,musb-am33xx";
			reg = <0x47400000 0x1000	/* usbss */
			       0x47401000 0x800		/* musb instance 0 */
			       0x47401800 0x800>;	/* musb instance 1 */
			interrupts = <17		/* usbss */
				      18		/* musb instance 0 */
				      19>;		/* musb instance 1 */
			multipoint = <1>;
			num-eps = <16>;
			ram-bits = <12>;
			port0-mode = <3>;
			port1-mode = <3>;
			power = <250>;
			ti,hwmods = "usb_otg_hs";
		};
348

349 350 351 352 353 354 355 356 357 358
		mac: ethernet@4a100000 {
			compatible = "ti,cpsw";
			ti,hwmods = "cpgmac0";
			cpdma_channels = <8>;
			ale_entries = <1024>;
			bd_ram_size = <0x2000>;
			no_bd_ram = <0>;
			rx_descs = <64>;
			mac_control = <0x20>;
			slaves = <2>;
359
			active_slave = <0>;
360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 392 393 394
			cpts_clock_mult = <0x80000000>;
			cpts_clock_shift = <29>;
			reg = <0x4a100000 0x800
			       0x4a101200 0x100>;
			#address-cells = <1>;
			#size-cells = <1>;
			interrupt-parent = <&intc>;
			/*
			 * c0_rx_thresh_pend
			 * c0_rx_pend
			 * c0_tx_pend
			 * c0_misc_pend
			 */
			interrupts = <40 41 42 43>;
			ranges;

			davinci_mdio: mdio@4a101000 {
				compatible = "ti,davinci_mdio";
				#address-cells = <1>;
				#size-cells = <0>;
				ti,hwmods = "davinci_mdio";
				bus_freq = <1000000>;
				reg = <0x4a101000 0x100>;
			};

			cpsw_emac0: slave@4a100200 {
				/* Filled in by U-Boot */
				mac-address = [ 00 00 00 00 00 00 ];
			};

			cpsw_emac1: slave@4a100300 {
				/* Filled in by U-Boot */
				mac-address = [ 00 00 00 00 00 00 ];
			};
		};
395 396 397 398 399 400 401 402 403 404 405 406 407 408

		ocmcram: ocmcram@40300000 {
			compatible = "ti,am3352-ocmcram";
			reg = <0x40300000 0x10000>;
			ti,hwmods = "ocmcram";
			ti,no_idle_on_suspend;
		};

		wkup_m3: wkup_m3@44d00000 {
			compatible = "ti,am3353-wkup-m3";
			reg = <0x44d00000 0x4000	/* M3 UMEM */
			       0x44d80000 0x2000>;	/* M3 DMEM */
			ti,hwmods = "wkup_m3";
		};
P
Philip Avinash 已提交
409

P
Philip, Avinash 已提交
410 411 412 413 414 415 416 417
		elm: elm@48080000 {
			compatible = "ti,am3352-elm";
			reg = <0x48080000 0x2000>;
			interrupts = <4>;
			ti,hwmods = "elm";
			status = "disabled";
		};

P
Philip Avinash 已提交
418 419 420 421 422
		gpmc: gpmc@50000000 {
			compatible = "ti,am3352-gpmc";
			ti,hwmods = "gpmc";
			reg = <0x50000000 0x2000>;
			interrupts = <100>;
423 424
			gpmc,num-cs = <7>;
			gpmc,num-waitpins = <2>;
P
Philip Avinash 已提交
425 426 427 428
			#address-cells = <2>;
			#size-cells = <1>;
			status = "disabled";
		};
429 430
	};
};