cafe_nand.c 24.2 KB
Newer Older
D
David Woodhouse 已提交
1
/*
2
 * Driver for One Laptop Per Child ‘CAFÉ’ controller, aka Marvell 88ALP01
3
 *
4
 * The data sheet for this device can be found at:
5
 *    http://wiki.laptop.org/go/Datasheets 
6
 *
7 8 9 10
 * Copyright © 2006 Red Hat, Inc.
 * Copyright © 2006 David Woodhouse <dwmw2@infradead.org>
 */

11
#define DEBUG
12 13 14 15

#include <linux/device.h>
#undef DEBUG
#include <linux/mtd/mtd.h>
16
#include <linux/mtd/rawnand.h>
17
#include <linux/mtd/partitions.h>
18
#include <linux/rslib.h>
19 20 21
#include <linux/pci.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
22
#include <linux/dma-mapping.h>
23
#include <linux/slab.h>
24
#include <linux/module.h>
25 26 27 28 29 30 31 32 33 34 35 36 37 38 39
#include <asm/io.h>

#define CAFE_NAND_CTRL1		0x00
#define CAFE_NAND_CTRL2		0x04
#define CAFE_NAND_CTRL3		0x08
#define CAFE_NAND_STATUS	0x0c
#define CAFE_NAND_IRQ		0x10
#define CAFE_NAND_IRQ_MASK	0x14
#define CAFE_NAND_DATA_LEN	0x18
#define CAFE_NAND_ADDR1		0x1c
#define CAFE_NAND_ADDR2		0x20
#define CAFE_NAND_TIMING1	0x24
#define CAFE_NAND_TIMING2	0x28
#define CAFE_NAND_TIMING3	0x2c
#define CAFE_NAND_NONMEM	0x30
40
#define CAFE_NAND_ECC_RESULT	0x3C
41 42 43
#define CAFE_NAND_DMA_CTRL	0x40
#define CAFE_NAND_DMA_ADDR0	0x44
#define CAFE_NAND_DMA_ADDR1	0x48
44 45 46 47
#define CAFE_NAND_ECC_SYN01	0x50
#define CAFE_NAND_ECC_SYN23	0x54
#define CAFE_NAND_ECC_SYN45	0x58
#define CAFE_NAND_ECC_SYN67	0x5c
48 49 50
#define CAFE_NAND_READ_DATA	0x1000
#define CAFE_NAND_WRITE_DATA	0x2000

51 52 53 54 55
#define CAFE_GLOBAL_CTRL	0x3004
#define CAFE_GLOBAL_IRQ		0x3008
#define CAFE_GLOBAL_IRQ_MASK	0x300c
#define CAFE_NAND_RESET		0x3034

56 57 58
/* Missing from the datasheet: bit 19 of CTRL1 sets CE0 vs. CE1 */
#define CTRL1_CHIPSELECT	(1<<19)

59 60 61 62
struct cafe_priv {
	struct nand_chip nand;
	struct pci_dev *pdev;
	void __iomem *mmio;
63
	struct rs_control *rs;
64 65 66 67 68 69
	uint32_t ctl1;
	uint32_t ctl2;
	int datalen;
	int nr_data;
	int data_pos;
	int page_addr;
70
	bool usedma;
71 72 73 74
	dma_addr_t dmaaddr;
	unsigned char *dmabuf;
};

75
static int usedma = 1;
76 77
module_param(usedma, int, 0644);

78 79 80 81 82 83
static int skipbbt = 0;
module_param(skipbbt, int, 0644);

static int debug = 0;
module_param(debug, int, 0644);

84 85 86
static int regdebug = 0;
module_param(regdebug, int, 0644);

87
static int checkecc = 1;
88 89
module_param(checkecc, int, 0644);

90
static unsigned int numtimings;
91 92
static int timing[3];
module_param_array(timing, int, &numtimings, 0644);
93

94
static const char *part_probes[] = { "cmdlinepart", "RedBoot", NULL };
95

96
/* Hrm. Why isn't this already conditional on something in the struct device? */
97 98
#define cafe_dev_dbg(dev, args...) do { if (debug) dev_dbg(dev, ##args); } while(0)

99 100 101
/* Make it easier to switch to PIO if we need to */
#define cafe_readl(cafe, addr)			readl((cafe)->mmio + CAFE_##addr)
#define cafe_writel(cafe, datum, addr)		writel(datum, (cafe)->mmio + CAFE_##addr)
102

103 104
static int cafe_device_ready(struct mtd_info *mtd)
{
105
	struct nand_chip *chip = mtd_to_nand(mtd);
106
	struct cafe_priv *cafe = nand_get_controller_data(chip);
107
	int result = !!(cafe_readl(cafe, NAND_STATUS) & 0x40000000);
108
	uint32_t irqs = cafe_readl(cafe, NAND_IRQ);
109

110
	cafe_writel(cafe, irqs, NAND_IRQ);
111

112
	cafe_dev_dbg(&cafe->pdev->dev, "NAND device is%s ready, IRQ %x (%x) (%x,%x)\n",
113 114
		result?"":" not", irqs, cafe_readl(cafe, NAND_IRQ),
		cafe_readl(cafe, GLOBAL_IRQ), cafe_readl(cafe, GLOBAL_IRQ_MASK));
115

116 117 118 119
	return result;
}


120
static void cafe_write_buf(struct nand_chip *chip, const uint8_t *buf, int len)
121
{
122
	struct cafe_priv *cafe = nand_get_controller_data(chip);
123

124
	if (cafe->usedma)
125 126 127
		memcpy(cafe->dmabuf + cafe->datalen, buf, len);
	else
		memcpy_toio(cafe->mmio + CAFE_NAND_WRITE_DATA + cafe->datalen, buf, len);
128

129 130
	cafe->datalen += len;

131
	cafe_dev_dbg(&cafe->pdev->dev, "Copy 0x%x bytes to write buffer. datalen 0x%x\n",
132 133 134
		len, cafe->datalen);
}

135
static void cafe_read_buf(struct nand_chip *chip, uint8_t *buf, int len)
136
{
137
	struct cafe_priv *cafe = nand_get_controller_data(chip);
138

139
	if (cafe->usedma)
140 141 142 143
		memcpy(buf, cafe->dmabuf + cafe->datalen, len);
	else
		memcpy_fromio(buf, cafe->mmio + CAFE_NAND_READ_DATA + cafe->datalen, len);

144
	cafe_dev_dbg(&cafe->pdev->dev, "Copy 0x%x bytes from position 0x%x in read buffer.\n",
145 146 147 148
		  len, cafe->datalen);
	cafe->datalen += len;
}

149
static uint8_t cafe_read_byte(struct nand_chip *chip)
150
{
151
	struct cafe_priv *cafe = nand_get_controller_data(chip);
152 153
	uint8_t d;

154
	cafe_read_buf(chip, &d, 1);
155
	cafe_dev_dbg(&cafe->pdev->dev, "Read %02x\n", d);
156 157 158 159 160 161 162

	return d;
}

static void cafe_nand_cmdfunc(struct mtd_info *mtd, unsigned command,
			      int column, int page_addr)
{
163
	struct nand_chip *chip = mtd_to_nand(mtd);
164
	struct cafe_priv *cafe = nand_get_controller_data(chip);
165 166 167 168
	int adrbytes = 0;
	uint32_t ctl1;
	uint32_t doneint = 0x80000000;

169
	cafe_dev_dbg(&cafe->pdev->dev, "cmdfunc %02x, 0x%x, 0x%x\n",
170 171 172 173
		command, column, page_addr);

	if (command == NAND_CMD_ERASE2 || command == NAND_CMD_PAGEPROG) {
		/* Second half of a command we already calculated */
174
		cafe_writel(cafe, cafe->ctl2 | 0x100 | command, NAND_CTRL2);
175
		ctl1 = cafe->ctl1;
176
		cafe->ctl2 &= ~(1<<30);
177
		cafe_dev_dbg(&cafe->pdev->dev, "Continue command, ctl1 %08x, #data %d\n",
178 179 180 181
			  cafe->ctl1, cafe->nr_data);
		goto do_command;
	}
	/* Reset ECC engine */
182
	cafe_writel(cafe, 0, NAND_CTRL2);
183 184 185 186 187 188 189 190 191 192 193 194

	/* Emulate NAND_CMD_READOOB on large-page chips */
	if (mtd->writesize > 512 &&
	    command == NAND_CMD_READOOB) {
		column += mtd->writesize;
		command = NAND_CMD_READ0;
	}

	/* FIXME: Do we need to send read command before sending data
	   for small-page chips, to position the buffer correctly? */

	if (column != -1) {
195
		cafe_writel(cafe, column, NAND_ADDR1);
196 197 198 199
		adrbytes = 2;
		if (page_addr != -1)
			goto write_adr2;
	} else if (page_addr != -1) {
200
		cafe_writel(cafe, page_addr & 0xffff, NAND_ADDR1);
201 202
		page_addr >>= 16;
	write_adr2:
203
		cafe_writel(cafe, page_addr, NAND_ADDR2);
204 205 206 207 208 209 210
		adrbytes += 2;
		if (mtd->size > mtd->writesize << 16)
			adrbytes++;
	}

	cafe->data_pos = cafe->datalen = 0;

211 212
	/* Set command valid bit, mask in the chip select bit  */
	ctl1 = 0x80000000 | command | (cafe->ctl1 & CTRL1_CHIPSELECT);
213 214 215 216 217

	/* Set RD or WR bits as appropriate */
	if (command == NAND_CMD_READID || command == NAND_CMD_STATUS) {
		ctl1 |= (1<<26); /* rd */
		/* Always 5 bytes, for now */
218
		cafe->datalen = 4;
219 220 221 222 223 224 225 226 227 228 229 230 231 232 233
		/* And one address cycle -- even for STATUS, since the controller doesn't work without */
		adrbytes = 1;
	} else if (command == NAND_CMD_READ0 || command == NAND_CMD_READ1 ||
		   command == NAND_CMD_READOOB || command == NAND_CMD_RNDOUT) {
		ctl1 |= 1<<26; /* rd */
		/* For now, assume just read to end of page */
		cafe->datalen = mtd->writesize + mtd->oobsize - column;
	} else if (command == NAND_CMD_SEQIN)
		ctl1 |= 1<<25; /* wr */

	/* Set number of address bytes */
	if (adrbytes)
		ctl1 |= ((adrbytes-1)|8) << 27;

	if (command == NAND_CMD_SEQIN || command == NAND_CMD_ERASE1) {
D
David Woodhouse 已提交
234
		/* Ignore the first command of a pair; the hardware
235 236
		   deals with them both at once, later */
		cafe->ctl1 = ctl1;
237
		cafe_dev_dbg(&cafe->pdev->dev, "Setup for delayed command, ctl1 %08x, dlen %x\n",
238 239 240 241 242
			  cafe->ctl1, cafe->datalen);
		return;
	}
	/* RNDOUT and READ0 commands need a following byte */
	if (command == NAND_CMD_RNDOUT)
243
		cafe_writel(cafe, cafe->ctl2 | 0x100 | NAND_CMD_RNDOUTSTART, NAND_CTRL2);
244
	else if (command == NAND_CMD_READ0 && mtd->writesize > 512)
245
		cafe_writel(cafe, cafe->ctl2 | 0x100 | NAND_CMD_READSTART, NAND_CTRL2);
246 247

 do_command:
D
David Woodhouse 已提交
248
	cafe_dev_dbg(&cafe->pdev->dev, "dlen %x, ctl1 %x, ctl2 %x\n",
249
		cafe->datalen, ctl1, cafe_readl(cafe, NAND_CTRL2));
250

251
	/* NB: The datasheet lies -- we really should be subtracting 1 here */
252 253
	cafe_writel(cafe, cafe->datalen, NAND_DATA_LEN);
	cafe_writel(cafe, 0x90000000, NAND_IRQ);
254
	if (cafe->usedma && (ctl1 & (3<<25))) {
255 256 257 258 259 260 261 262 263
		uint32_t dmactl = 0xc0000000 + cafe->datalen;
		/* If WR or RD bits set, set up DMA */
		if (ctl1 & (1<<26)) {
			/* It's a read */
			dmactl |= (1<<29);
			/* ... so it's done when the DMA is done, not just
			   the command. */
			doneint = 0x10000000;
		}
264
		cafe_writel(cafe, dmactl, NAND_DMA_CTRL);
265 266 267
	}
	cafe->datalen = 0;

268 269 270 271 272
	if (unlikely(regdebug)) {
		int i;
		printk("About to write command %08x to register 0\n", ctl1);
		for (i=4; i< 0x5c; i+=4)
			printk("Register %x: %08x\n", i, readl(cafe->mmio + i));
273
	}
274

275
	cafe_writel(cafe, ctl1, NAND_CTRL1);
276 277 278 279 280
	/* Apply this short delay always to ensure that we do wait tWB in
	 * any case on any machine. */
	ndelay(100);

	if (1) {
281
		int c;
282 283
		uint32_t irqs;

284
		for (c = 500000; c != 0; c--) {
285
			irqs = cafe_readl(cafe, NAND_IRQ);
286 287 288
			if (irqs & doneint)
				break;
			udelay(1);
289 290
			if (!(c % 100000))
				cafe_dev_dbg(&cafe->pdev->dev, "Wait for ready, IRQ %x\n", irqs);
291 292
			cpu_relax();
		}
293
		cafe_writel(cafe, doneint, NAND_IRQ);
294
		cafe_dev_dbg(&cafe->pdev->dev, "Command %x completed after %d usec, irqs %x (%x)\n",
295
			     command, 500000-c, irqs, cafe_readl(cafe, NAND_IRQ));
296 297
	}

298
	WARN_ON(cafe->ctl2 & (1<<30));
299 300 301 302 303 304 305 306 307 308 309

	switch (command) {

	case NAND_CMD_CACHEDPROG:
	case NAND_CMD_PAGEPROG:
	case NAND_CMD_ERASE1:
	case NAND_CMD_ERASE2:
	case NAND_CMD_SEQIN:
	case NAND_CMD_RNDIN:
	case NAND_CMD_STATUS:
	case NAND_CMD_RNDOUT:
310
		cafe_writel(cafe, cafe->ctl2, NAND_CTRL2);
311 312
		return;
	}
313
	nand_wait_ready(chip);
314
	cafe_writel(cafe, cafe->ctl2, NAND_CTRL2);
315 316 317 318
}

static void cafe_select_chip(struct mtd_info *mtd, int chipnr)
{
319
	struct nand_chip *chip = mtd_to_nand(mtd);
320
	struct cafe_priv *cafe = nand_get_controller_data(chip);
321 322 323 324 325 326 327 328 329

	cafe_dev_dbg(&cafe->pdev->dev, "select_chip %d\n", chipnr);

	/* Mask the appropriate bit into the stored value of ctl1
	   which will be used by cafe_nand_cmdfunc() */
	if (chipnr)
		cafe->ctl1 |= CTRL1_CHIPSELECT;
	else
		cafe->ctl1 &= ~CTRL1_CHIPSELECT;
330
}
331

A
Alan Cox 已提交
332
static irqreturn_t cafe_nand_interrupt(int irq, void *id)
333 334
{
	struct mtd_info *mtd = id;
335
	struct nand_chip *chip = mtd_to_nand(mtd);
336
	struct cafe_priv *cafe = nand_get_controller_data(chip);
337 338
	uint32_t irqs = cafe_readl(cafe, NAND_IRQ);
	cafe_writel(cafe, irqs & ~0x90000000, NAND_IRQ);
339 340 341
	if (!irqs)
		return IRQ_NONE;

342
	cafe_dev_dbg(&cafe->pdev->dev, "irq, bits %x (%x)\n", irqs, cafe_readl(cafe, NAND_IRQ));
343 344 345
	return IRQ_HANDLED;
}

346
static int cafe_nand_write_oob(struct nand_chip *chip, int page)
347
{
348 349
	struct mtd_info *mtd = nand_to_mtd(chip);

350 351
	return nand_prog_page_op(chip, page, mtd->writesize, chip->oob_poi,
				 mtd->oobsize);
352 353 354
}

/* Don't use -- use nand_read_oob_std for now */
355
static int cafe_nand_read_oob(struct nand_chip *chip, int page)
356
{
357 358
	struct mtd_info *mtd = nand_to_mtd(chip);

359
	return nand_read_oob_op(chip, page, 0, chip->oob_poi, mtd->oobsize);
360 361
}
/**
362
 * cafe_nand_read_page_syndrome - [REPLACEABLE] hardware ecc syndrome based page read
363 364 365
 * @mtd:	mtd info structure
 * @chip:	nand chip info structure
 * @buf:	buffer to store read data
366
 * @oob_required:	caller expects OOB data read to chip->oob_poi
367
 *
B
Brian Norris 已提交
368
 * The hw generator calculates the error syndrome automatically. Therefore
369 370
 * we need a special oob layout and handling.
 */
371 372
static int cafe_nand_read_page(struct nand_chip *chip, uint8_t *buf,
			       int oob_required, int page)
373
{
374
	struct mtd_info *mtd = nand_to_mtd(chip);
375
	struct cafe_priv *cafe = nand_get_controller_data(chip);
376
	unsigned int max_bitflips = 0;
377

378
	cafe_dev_dbg(&cafe->pdev->dev, "ECC result %08x SYN1,2 %08x\n",
379 380
		     cafe_readl(cafe, NAND_ECC_RESULT),
		     cafe_readl(cafe, NAND_ECC_SYN01));
381

382
	nand_read_page_op(chip, page, 0, buf, mtd->writesize);
383
	chip->read_buf(chip, chip->oob_poi, mtd->oobsize);
384

385
	if (checkecc && cafe_readl(cafe, NAND_ECC_RESULT) & (1<<18)) {
386 387 388 389
		unsigned short syn[8], pat[4];
		int pos[4];
		u8 *oob = chip->oob_poi;
		int i, n;
390 391

		for (i=0; i<8; i+=2) {
392
			uint32_t tmp = cafe_readl(cafe, NAND_ECC_SYN01 + (i*2));
T
Thomas Gleixner 已提交
393 394 395

			syn[i] = cafe->rs->codec->index_of[tmp & 0xfff];
			syn[i+1] = cafe->rs->codec->index_of[(tmp >> 16) & 0xfff];
396 397 398
		}

		n = decode_rs16(cafe->rs, NULL, NULL, 1367, syn, 0, pos, 0,
T
Thomas Gleixner 已提交
399
				pat);
400 401 402 403 404 405 406 407 408 409 410 411 412 413 414 415 416 417 418 419 420 421 422 423 424 425 426 427 428 429 430 431 432

		for (i = 0; i < n; i++) {
			int p = pos[i];

			/* The 12-bit symbols are mapped to bytes here */

			if (p > 1374) {
				/* out of range */
				n = -1374;
			} else if (p == 0) {
				/* high four bits do not correspond to data */
				if (pat[i] > 0xff)
					n = -2048;
				else
					buf[0] ^= pat[i];
			} else if (p == 1365) {
				buf[2047] ^= pat[i] >> 4;
				oob[0] ^= pat[i] << 4;
			} else if (p > 1365) {
				if ((p & 1) == 1) {
					oob[3*p/2 - 2048] ^= pat[i] >> 4;
					oob[3*p/2 - 2047] ^= pat[i] << 4;
				} else {
					oob[3*p/2 - 2049] ^= pat[i] >> 8;
					oob[3*p/2 - 2048] ^= pat[i];
				}
			} else if ((p & 1) == 1) {
				buf[3*p/2] ^= pat[i] >> 4;
				buf[3*p/2 + 1] ^= pat[i] << 4;
			} else {
				buf[3*p/2 - 1] ^= pat[i] >> 8;
				buf[3*p/2] ^= pat[i];
			}
D
David Woodhouse 已提交
433
		}
434

435
		if (n < 0) {
436 437
			dev_dbg(&cafe->pdev->dev, "Failed to correct ECC at %08x\n",
				cafe_readl(cafe, NAND_ADDR2) * 2048);
438
			for (i = 0; i < 0x5c; i += 4)
439
				printk("Register %x: %08x\n", i, readl(cafe->mmio + i));
440 441
			mtd->ecc_stats.failed++;
		} else {
442 443
			dev_dbg(&cafe->pdev->dev, "Corrected %d symbol errors\n", n);
			mtd->ecc_stats.corrected += n;
444
			max_bitflips = max_t(unsigned int, max_bitflips, n);
445 446 447
		}
	}

448
	return max_bitflips;
449 450
}

451 452 453 454 455 456 457 458 459 460 461 462 463 464 465 466 467 468 469 470 471 472 473 474 475 476 477 478 479 480 481
static int cafe_ooblayout_ecc(struct mtd_info *mtd, int section,
			      struct mtd_oob_region *oobregion)
{
	struct nand_chip *chip = mtd_to_nand(mtd);

	if (section)
		return -ERANGE;

	oobregion->offset = 0;
	oobregion->length = chip->ecc.total;

	return 0;
}

static int cafe_ooblayout_free(struct mtd_info *mtd, int section,
			       struct mtd_oob_region *oobregion)
{
	struct nand_chip *chip = mtd_to_nand(mtd);

	if (section)
		return -ERANGE;

	oobregion->offset = chip->ecc.total;
	oobregion->length = mtd->oobsize - chip->ecc.total;

	return 0;
}

static const struct mtd_ooblayout_ops cafe_ooblayout_ops = {
	.ecc = cafe_ooblayout_ecc,
	.free = cafe_ooblayout_free,
482 483
};

D
David Woodhouse 已提交
484
/* Ick. The BBT code really ought to be able to work this bit out
485 486 487 488 489 490 491
   for itself from the above, at least for the 2KiB case */
static uint8_t cafe_bbt_pattern_2048[] = { 'B', 'b', 't', '0' };
static uint8_t cafe_mirror_pattern_2048[] = { '1', 't', 'b', 'B' };

static uint8_t cafe_bbt_pattern_512[] = { 0xBB };
static uint8_t cafe_mirror_pattern_512[] = { 0xBC };

492 493 494

static struct nand_bbt_descr cafe_bbt_main_descr_2048 = {
	.options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE | NAND_BBT_WRITE
495
		| NAND_BBT_2BIT | NAND_BBT_VERSION,
496 497 498 499
	.offs =	14,
	.len = 4,
	.veroffs = 18,
	.maxblocks = 4,
500
	.pattern = cafe_bbt_pattern_2048
501 502 503 504
};

static struct nand_bbt_descr cafe_bbt_mirror_descr_2048 = {
	.options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE | NAND_BBT_WRITE
505
		| NAND_BBT_2BIT | NAND_BBT_VERSION,
506 507 508 509
	.offs =	14,
	.len = 4,
	.veroffs = 18,
	.maxblocks = 4,
510
	.pattern = cafe_mirror_pattern_2048
511 512
};

513 514
static struct nand_bbt_descr cafe_bbt_main_descr_512 = {
	.options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE | NAND_BBT_WRITE
515
		| NAND_BBT_2BIT | NAND_BBT_VERSION,
516 517 518 519 520 521 522 523 524
	.offs =	14,
	.len = 1,
	.veroffs = 15,
	.maxblocks = 4,
	.pattern = cafe_bbt_pattern_512
};

static struct nand_bbt_descr cafe_bbt_mirror_descr_512 = {
	.options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE | NAND_BBT_WRITE
525
		| NAND_BBT_2BIT | NAND_BBT_VERSION,
526 527 528 529 530 531 532 533
	.offs =	14,
	.len = 1,
	.veroffs = 15,
	.maxblocks = 4,
	.pattern = cafe_mirror_pattern_512
};


534 535 536
static int cafe_nand_write_page_lowlevel(struct nand_chip *chip,
					 const uint8_t *buf, int oob_required,
					 int page)
537
{
538
	struct mtd_info *mtd = nand_to_mtd(chip);
539
	struct cafe_priv *cafe = nand_get_controller_data(chip);
540

541
	nand_prog_page_begin_op(chip, page, 0, buf, mtd->writesize);
542
	chip->write_buf(chip, chip->oob_poi, mtd->oobsize);
543 544

	/* Set up ECC autogeneration */
545
	cafe->ctl2 |= (1<<30);
546

547
	return nand_prog_page_end_op(chip);
548 549
}

550
static int cafe_nand_block_bad(struct mtd_info *mtd, loff_t ofs)
551 552 553
{
	return 0;
}
554

555
/* F_2[X]/(X**6+X+1)  */
B
Bill Pemberton 已提交
556
static unsigned short gf64_mul(u8 a, u8 b)
557 558 559 560 561 562 563 564 565 566 567 568 569 570 571 572 573 574
{
	u8 c;
	unsigned int i;

	c = 0;
	for (i = 0; i < 6; i++) {
		if (a & 1)
			c ^= b;
		a >>= 1;
		b <<= 1;
		if ((b & 0x40) != 0)
			b ^= 0x43;
	}

	return c;
}

/* F_64[X]/(X**2+X+A**-1) with A the generator of F_64[X]  */
B
Bill Pemberton 已提交
575
static u16 gf4096_mul(u16 a, u16 b)
576 577 578 579 580 581 582 583 584 585 586 587 588 589
{
	u8 ah, al, bh, bl, ch, cl;

	ah = a >> 6;
	al = a & 0x3f;
	bh = b >> 6;
	bl = b & 0x3f;

	ch = gf64_mul(ah ^ al, bh ^ bl) ^ gf64_mul(al, bl);
	cl = gf64_mul(gf64_mul(ah, bh), 0x21) ^ gf64_mul(al, bl);

	return (ch << 6) ^ cl;
}

B
Bill Pemberton 已提交
590
static int cafe_mul(int x)
591 592 593 594 595 596
{
	if (x == 0)
		return 1;
	return gf4096_mul(x, 0xe01);
}

597 598 599 600 601 602 603 604 605 606 607 608 609 610 611 612 613 614 615 616 617 618 619 620 621 622 623 624 625 626 627 628 629 630 631 632 633 634 635 636 637 638 639 640 641 642 643 644 645 646 647 648 649 650 651 652 653 654 655 656 657 658 659 660 661 662 663 664 665 666
static int cafe_nand_attach_chip(struct nand_chip *chip)
{
	struct mtd_info *mtd = nand_to_mtd(chip);
	struct cafe_priv *cafe = nand_get_controller_data(chip);
	int err = 0;

	cafe->dmabuf = dma_alloc_coherent(&cafe->pdev->dev, 2112,
					  &cafe->dmaaddr, GFP_KERNEL);
	if (!cafe->dmabuf)
		return -ENOMEM;

	/* Set up DMA address */
	cafe_writel(cafe, lower_32_bits(cafe->dmaaddr), NAND_DMA_ADDR0);
	cafe_writel(cafe, upper_32_bits(cafe->dmaaddr), NAND_DMA_ADDR1);

	cafe_dev_dbg(&cafe->pdev->dev, "Set DMA address to %x (virt %p)\n",
		     cafe_readl(cafe, NAND_DMA_ADDR0), cafe->dmabuf);

	/* Restore the DMA flag */
	cafe->usedma = usedma;

	cafe->ctl2 = BIT(27); /* Reed-Solomon ECC */
	if (mtd->writesize == 2048)
		cafe->ctl2 |= BIT(29); /* 2KiB page size */

	/* Set up ECC according to the type of chip we found */
	mtd_set_ooblayout(mtd, &cafe_ooblayout_ops);
	if (mtd->writesize == 2048) {
		cafe->nand.bbt_td = &cafe_bbt_main_descr_2048;
		cafe->nand.bbt_md = &cafe_bbt_mirror_descr_2048;
	} else if (mtd->writesize == 512) {
		cafe->nand.bbt_td = &cafe_bbt_main_descr_512;
		cafe->nand.bbt_md = &cafe_bbt_mirror_descr_512;
	} else {
		dev_warn(&cafe->pdev->dev,
			 "Unexpected NAND flash writesize %d. Aborting\n",
			 mtd->writesize);
		err = -ENOTSUPP;
		goto out_free_dma;
	}

	cafe->nand.ecc.mode = NAND_ECC_HW_SYNDROME;
	cafe->nand.ecc.size = mtd->writesize;
	cafe->nand.ecc.bytes = 14;
	cafe->nand.ecc.strength = 4;
	cafe->nand.ecc.write_page = cafe_nand_write_page_lowlevel;
	cafe->nand.ecc.write_oob = cafe_nand_write_oob;
	cafe->nand.ecc.read_page = cafe_nand_read_page;
	cafe->nand.ecc.read_oob = cafe_nand_read_oob;

	return 0;

 out_free_dma:
	dma_free_coherent(&cafe->pdev->dev, 2112, cafe->dmabuf, cafe->dmaaddr);

	return err;
}

static void cafe_nand_detach_chip(struct nand_chip *chip)
{
	struct cafe_priv *cafe = nand_get_controller_data(chip);

	dma_free_coherent(&cafe->pdev->dev, 2112, cafe->dmabuf, cafe->dmaaddr);
}

static const struct nand_controller_ops cafe_nand_controller_ops = {
	.attach_chip = cafe_nand_attach_chip,
	.detach_chip = cafe_nand_detach_chip,
};

B
Bill Pemberton 已提交
667
static int cafe_nand_probe(struct pci_dev *pdev,
668 669 670 671 672 673 674
				     const struct pci_device_id *ent)
{
	struct mtd_info *mtd;
	struct cafe_priv *cafe;
	uint32_t ctrl;
	int err = 0;

675 676 677 678 679
	/* Very old versions shared the same PCI ident for all three
	   functions on the chip. Verify the class too... */
	if ((pdev->class >> 8) != PCI_CLASS_MEMORY_FLASH)
		return -ENODEV;

680 681 682 683 684 685
	err = pci_enable_device(pdev);
	if (err)
		return err;

	pci_set_master(pdev);

686 687
	cafe = kzalloc(sizeof(*cafe), GFP_KERNEL);
	if (!cafe)
688 689
		return  -ENOMEM;

690
	mtd = nand_to_mtd(&cafe->nand);
691
	mtd->dev.parent = &pdev->dev;
692
	nand_set_controller_data(&cafe->nand, cafe);
693 694 695 696 697 698 699 700 701

	cafe->pdev = pdev;
	cafe->mmio = pci_iomap(pdev, 0, 0);
	if (!cafe->mmio) {
		dev_warn(&pdev->dev, "failed to iomap\n");
		err = -ENOMEM;
		goto out_free_mtd;
	}

702 703 704 705 706 707
	cafe->rs = init_rs_non_canonical(12, &cafe_mul, 0, 1, 8);
	if (!cafe->rs) {
		err = -ENOMEM;
		goto out_ior;
	}

708 709 710 711 712 713
	cafe->nand.cmdfunc = cafe_nand_cmdfunc;
	cafe->nand.dev_ready = cafe_device_ready;
	cafe->nand.read_byte = cafe_read_byte;
	cafe->nand.read_buf = cafe_read_buf;
	cafe->nand.write_buf = cafe_write_buf;
	cafe->nand.select_chip = cafe_select_chip;
714 715
	cafe->nand.set_features = nand_get_set_features_notsupp;
	cafe->nand.get_features = nand_get_set_features_notsupp;
716 717 718 719

	cafe->nand.chip_delay = 0;

	/* Enable the following for a flash based bad block table */
720
	cafe->nand.bbt_options = NAND_BBT_USE_FLASH;
721 722 723 724 725

	if (skipbbt) {
		cafe->nand.options |= NAND_SKIP_BBTSCAN;
		cafe->nand.block_bad = cafe_nand_block_bad;
	}
D
David Woodhouse 已提交
726

727 728 729 730 731 732
	if (numtimings && numtimings != 3) {
		dev_warn(&cafe->pdev->dev, "%d timing register values ignored; precisely three are required\n", numtimings);
	}

	if (numtimings == 3) {
		cafe_dev_dbg(&cafe->pdev->dev, "Using provided timings (%08x %08x %08x)\n",
733
			     timing[0], timing[1], timing[2]);
734
	} else {
735 736 737
		timing[0] = cafe_readl(cafe, NAND_TIMING1);
		timing[1] = cafe_readl(cafe, NAND_TIMING2);
		timing[2] = cafe_readl(cafe, NAND_TIMING3);
738

739 740 741
		if (timing[0] | timing[1] | timing[2]) {
			cafe_dev_dbg(&cafe->pdev->dev, "Timing registers already set (%08x %08x %08x)\n",
				     timing[0], timing[1], timing[2]);
742 743
		} else {
			dev_warn(&cafe->pdev->dev, "Timing registers unset; using most conservative defaults\n");
744
			timing[0] = timing[1] = timing[2] = 0xffffffff;
745 746 747
		}
	}

748
	/* Start off by resetting the NAND controller completely */
749 750
	cafe_writel(cafe, 1, NAND_RESET);
	cafe_writel(cafe, 0, NAND_RESET);
751

752 753 754
	cafe_writel(cafe, timing[0], NAND_TIMING1);
	cafe_writel(cafe, timing[1], NAND_TIMING2);
	cafe_writel(cafe, timing[2], NAND_TIMING3);
755

756
	cafe_writel(cafe, 0xffffffff, NAND_IRQ_MASK);
757 758
	err = request_irq(pdev->irq, &cafe_nand_interrupt, IRQF_SHARED,
			  "CAFE NAND", mtd);
759 760
	if (err) {
		dev_warn(&pdev->dev, "Could not register IRQ %d\n", pdev->irq);
761
		goto out_ior;
762
	}
763

764
	/* Disable master reset, enable NAND clock */
765
	ctrl = cafe_readl(cafe, GLOBAL_CTRL);
766 767
	ctrl &= 0xffffeff0;
	ctrl |= 0x00007000;
768 769 770
	cafe_writel(cafe, ctrl | 0x05, GLOBAL_CTRL);
	cafe_writel(cafe, ctrl | 0x0a, GLOBAL_CTRL);
	cafe_writel(cafe, 0, NAND_DMA_CTRL);
771

772 773
	cafe_writel(cafe, 0x7006, GLOBAL_CTRL);
	cafe_writel(cafe, 0x700a, GLOBAL_CTRL);
774

775 776 777 778 779 780
	/* Enable NAND IRQ in global IRQ mask register */
	cafe_writel(cafe, 0x80000007, GLOBAL_IRQ_MASK);
	cafe_dev_dbg(&cafe->pdev->dev, "Control %x, IRQ mask %x\n",
		cafe_readl(cafe, GLOBAL_CTRL),
		cafe_readl(cafe, GLOBAL_IRQ_MASK));

781 782
	/* Do not use the DMA during the NAND identification */
	cafe->usedma = 0;
783 784

	/* Scan to find existence of the device */
785
	cafe->nand.dummy_controller.ops = &cafe_nand_controller_ops;
786
	err = nand_scan(&cafe->nand, 2);
787
	if (err)
788 789
		goto out_irq;

790
	pci_set_drvdata(pdev, mtd);
791

792
	mtd->name = "cafe_nand";
793 794 795
	err = mtd_device_parse_register(mtd, part_probes, NULL, NULL, 0);
	if (err)
		goto out_cleanup_nand;
796

797 798
	goto out;

799 800
 out_cleanup_nand:
	nand_cleanup(&cafe->nand);
801 802
 out_irq:
	/* Disable NAND IRQ in global IRQ mask register */
803
	cafe_writel(cafe, ~1 & cafe_readl(cafe, GLOBAL_IRQ_MASK), GLOBAL_IRQ_MASK);
804 805 806 807
	free_irq(pdev->irq, mtd);
 out_ior:
	pci_iounmap(pdev, cafe->mmio);
 out_free_mtd:
808
	kfree(cafe);
809 810 811 812
 out:
	return err;
}

B
Bill Pemberton 已提交
813
static void cafe_nand_remove(struct pci_dev *pdev)
814 815
{
	struct mtd_info *mtd = pci_get_drvdata(pdev);
816
	struct nand_chip *chip = mtd_to_nand(mtd);
817
	struct cafe_priv *cafe = nand_get_controller_data(chip);
818 819

	/* Disable NAND IRQ in global IRQ mask register */
820
	cafe_writel(cafe, ~1 & cafe_readl(cafe, GLOBAL_IRQ_MASK), GLOBAL_IRQ_MASK);
821
	free_irq(pdev->irq, mtd);
822
	nand_release(chip);
823
	free_rs(cafe->rs);
824
	pci_iounmap(pdev, cafe->mmio);
825
	dma_free_coherent(&cafe->pdev->dev, 2112, cafe->dmabuf, cafe->dmaaddr);
826
	kfree(cafe);
827 828
}

829
static const struct pci_device_id cafe_nand_tbl[] = {
830 831
	{ PCI_VENDOR_ID_MARVELL, PCI_DEVICE_ID_MARVELL_88ALP01_NAND,
	  PCI_ANY_ID, PCI_ANY_ID },
832
	{ }
833 834 835 836
};

MODULE_DEVICE_TABLE(pci, cafe_nand_tbl);

837 838 839 840
static int cafe_nand_resume(struct pci_dev *pdev)
{
	uint32_t ctrl;
	struct mtd_info *mtd = pci_get_drvdata(pdev);
841
	struct nand_chip *chip = mtd_to_nand(mtd);
842
	struct cafe_priv *cafe = nand_get_controller_data(chip);
843 844 845 846 847 848 849 850 851 852 853 854 855 856 857 858 859 860 861 862 863 864 865 866 867 868 869 870 871 872 873 874 875 876

       /* Start off by resetting the NAND controller completely */
	cafe_writel(cafe, 1, NAND_RESET);
	cafe_writel(cafe, 0, NAND_RESET);
	cafe_writel(cafe, 0xffffffff, NAND_IRQ_MASK);

	/* Restore timing configuration */
	cafe_writel(cafe, timing[0], NAND_TIMING1);
	cafe_writel(cafe, timing[1], NAND_TIMING2);
	cafe_writel(cafe, timing[2], NAND_TIMING3);

        /* Disable master reset, enable NAND clock */
	ctrl = cafe_readl(cafe, GLOBAL_CTRL);
	ctrl &= 0xffffeff0;
	ctrl |= 0x00007000;
	cafe_writel(cafe, ctrl | 0x05, GLOBAL_CTRL);
	cafe_writel(cafe, ctrl | 0x0a, GLOBAL_CTRL);
	cafe_writel(cafe, 0, NAND_DMA_CTRL);
	cafe_writel(cafe, 0x7006, GLOBAL_CTRL);
	cafe_writel(cafe, 0x700a, GLOBAL_CTRL);

	/* Set up DMA address */
	cafe_writel(cafe, cafe->dmaaddr & 0xffffffff, NAND_DMA_ADDR0);
	if (sizeof(cafe->dmaaddr) > 4)
	/* Shift in two parts to shut the compiler up */
		cafe_writel(cafe, (cafe->dmaaddr >> 16) >> 16, NAND_DMA_ADDR1);
	else
		cafe_writel(cafe, 0, NAND_DMA_ADDR1);

	/* Enable NAND IRQ in global IRQ mask register */
	cafe_writel(cafe, 0x80000007, GLOBAL_IRQ_MASK);
	return 0;
}

877 878 879 880
static struct pci_driver cafe_nand_pci_driver = {
	.name = "CAFÉ NAND",
	.id_table = cafe_nand_tbl,
	.probe = cafe_nand_probe,
B
Bill Pemberton 已提交
881
	.remove = cafe_nand_remove,
882 883 884
	.resume = cafe_nand_resume,
};

A
Axel Lin 已提交
885
module_pci_driver(cafe_nand_pci_driver);
886 887 888

MODULE_LICENSE("GPL");
MODULE_AUTHOR("David Woodhouse <dwmw2@infradead.org>");
889
MODULE_DESCRIPTION("NAND flash driver for OLPC CAFÉ chip");