mxs-lradc.c 48.3 KB
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/*
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 * Freescale MXS LRADC driver
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 *
 * Copyright (c) 2012 DENX Software Engineering, GmbH.
 * Marek Vasut <marex@denx.de>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
 * GNU General Public License for more details.
 */

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#include <linux/bitops.h>
#include <linux/clk.h>
#include <linux/completion.h>
#include <linux/device.h>
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#include <linux/err.h>
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#include <linux/input.h>
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#include <linux/interrupt.h>
#include <linux/io.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/mutex.h>
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#include <linux/of.h>
#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include <linux/stmp_device.h>
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#include <linux/sysfs.h>
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#include <linux/iio/buffer.h>
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#include <linux/iio/iio.h>
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#include <linux/iio/trigger.h>
#include <linux/iio/trigger_consumer.h>
#include <linux/iio/triggered_buffer.h>
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#include <linux/iio/sysfs.h>
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#define DRIVER_NAME		"mxs-lradc"

#define LRADC_MAX_DELAY_CHANS	4
#define LRADC_MAX_MAPPED_CHANS	8
#define LRADC_MAX_TOTAL_CHANS	16

#define LRADC_DELAY_TIMER_HZ	2000

/*
 * Make this runtime configurable if necessary. Currently, if the buffered mode
 * is enabled, the LRADC takes LRADC_DELAY_TIMER_LOOP samples of data before
 * triggering IRQ. The sampling happens every (LRADC_DELAY_TIMER_PER / 2000)
 * seconds. The result is that the samples arrive every 500mS.
 */
#define LRADC_DELAY_TIMER_PER	200
#define LRADC_DELAY_TIMER_LOOP	5

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/*
 * Once the pen touches the touchscreen, the touchscreen switches from
 * IRQ-driven mode to polling mode to prevent interrupt storm. The polling
 * is realized by worker thread, which is called every 20 or so milliseconds.
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 * This gives the touchscreen enough fluency and does not strain the system
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 * too much.
 */
#define LRADC_TS_SAMPLE_DELAY_MS	5

/*
 * The LRADC reads the following amount of samples from each touchscreen
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 * channel and the driver then computes average of these.
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 */
#define LRADC_TS_SAMPLE_AMOUNT		4

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enum mxs_lradc_id {
	IMX23_LRADC,
	IMX28_LRADC,
};

static const char * const mx23_lradc_irq_names[] = {
	"mxs-lradc-touchscreen",
	"mxs-lradc-channel0",
	"mxs-lradc-channel1",
	"mxs-lradc-channel2",
	"mxs-lradc-channel3",
	"mxs-lradc-channel4",
	"mxs-lradc-channel5",
	"mxs-lradc-channel6",
	"mxs-lradc-channel7",
};

static const char * const mx28_lradc_irq_names[] = {
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	"mxs-lradc-touchscreen",
	"mxs-lradc-thresh0",
	"mxs-lradc-thresh1",
	"mxs-lradc-channel0",
	"mxs-lradc-channel1",
	"mxs-lradc-channel2",
	"mxs-lradc-channel3",
	"mxs-lradc-channel4",
	"mxs-lradc-channel5",
	"mxs-lradc-channel6",
	"mxs-lradc-channel7",
	"mxs-lradc-button0",
	"mxs-lradc-button1",
};

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struct mxs_lradc_of_config {
	const int		irq_count;
	const char * const	*irq_name;
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	const u32		*vref_mv;
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};

#define VREF_MV_BASE 1850

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static const u32 mx23_vref_mv[LRADC_MAX_TOTAL_CHANS] = {
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	VREF_MV_BASE,		/* CH0 */
	VREF_MV_BASE,		/* CH1 */
	VREF_MV_BASE,		/* CH2 */
	VREF_MV_BASE,		/* CH3 */
	VREF_MV_BASE,		/* CH4 */
	VREF_MV_BASE,		/* CH5 */
	VREF_MV_BASE * 2,	/* CH6 VDDIO */
	VREF_MV_BASE * 4,	/* CH7 VBATT */
	VREF_MV_BASE,		/* CH8 Temp sense 0 */
	VREF_MV_BASE,		/* CH9 Temp sense 1 */
	VREF_MV_BASE,		/* CH10 */
	VREF_MV_BASE,		/* CH11 */
	VREF_MV_BASE,		/* CH12 USB_DP */
	VREF_MV_BASE,		/* CH13 USB_DN */
	VREF_MV_BASE,		/* CH14 VBG */
	VREF_MV_BASE * 4,	/* CH15 VDD5V */
};

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static const u32 mx28_vref_mv[LRADC_MAX_TOTAL_CHANS] = {
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	VREF_MV_BASE,		/* CH0 */
	VREF_MV_BASE,		/* CH1 */
	VREF_MV_BASE,		/* CH2 */
	VREF_MV_BASE,		/* CH3 */
	VREF_MV_BASE,		/* CH4 */
	VREF_MV_BASE,		/* CH5 */
	VREF_MV_BASE,		/* CH6 */
	VREF_MV_BASE * 4,	/* CH7 VBATT */
	VREF_MV_BASE,		/* CH8 Temp sense 0 */
	VREF_MV_BASE,		/* CH9 Temp sense 1 */
	VREF_MV_BASE * 2,	/* CH10 VDDIO */
	VREF_MV_BASE,		/* CH11 VTH */
	VREF_MV_BASE * 2,	/* CH12 VDDA */
	VREF_MV_BASE,		/* CH13 VDDD */
	VREF_MV_BASE,		/* CH14 VBG */
	VREF_MV_BASE * 4,	/* CH15 VDD5V */
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};

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static const struct mxs_lradc_of_config mxs_lradc_of_config[] = {
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	[IMX23_LRADC] = {
		.irq_count	= ARRAY_SIZE(mx23_lradc_irq_names),
		.irq_name	= mx23_lradc_irq_names,
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		.vref_mv	= mx23_vref_mv,
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	},
	[IMX28_LRADC] = {
		.irq_count	= ARRAY_SIZE(mx28_lradc_irq_names),
		.irq_name	= mx28_lradc_irq_names,
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		.vref_mv	= mx28_vref_mv,
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	},
};

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enum mxs_lradc_ts {
	MXS_LRADC_TOUCHSCREEN_NONE = 0,
	MXS_LRADC_TOUCHSCREEN_4WIRE,
	MXS_LRADC_TOUCHSCREEN_5WIRE,
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};

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/*
 * Touchscreen handling
 */
enum lradc_ts_plate {
	LRADC_TOUCH = 0,
	LRADC_SAMPLE_X,
	LRADC_SAMPLE_Y,
	LRADC_SAMPLE_PRESSURE,
	LRADC_SAMPLE_VALID,
};

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enum mxs_lradc_divbytwo {
	MXS_LRADC_DIV_DISABLED = 0,
	MXS_LRADC_DIV_ENABLED,
};

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struct mxs_lradc_scale {
	unsigned int		integer;
	unsigned int		nano;
};

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struct mxs_lradc {
	struct device		*dev;
	void __iomem		*base;
	int			irq[13];

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	struct clk		*clk;

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	u32			*buffer;
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	struct iio_trigger	*trig;

	struct mutex		lock;

	struct completion	completion;
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	const u32		*vref_mv;
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	struct mxs_lradc_scale	scale_avail[LRADC_MAX_TOTAL_CHANS][2];
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	unsigned long		is_divided;
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	/*
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	 * When the touchscreen is enabled, we give it two private virtual
	 * channels: #6 and #7. This means that only 6 virtual channels (instead
	 * of 8) will be available for buffered capture.
	 */
#define TOUCHSCREEN_VCHANNEL1		7
#define TOUCHSCREEN_VCHANNEL2		6
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#define BUFFER_VCHANS_LIMITED		0x3f
#define BUFFER_VCHANS_ALL		0xff
	u8			buffer_vchans;
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	/*
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	 * Furthermore, certain LRADC channels are shared between touchscreen
	 * and/or touch-buttons and generic LRADC block. Therefore when using
	 * either of these, these channels are not available for the regular
	 * sampling. The shared channels are as follows:
	 *
	 * CH0 -- Touch button #0
	 * CH1 -- Touch button #1
	 * CH2 -- Touch screen XPUL
	 * CH3 -- Touch screen YPLL
	 * CH4 -- Touch screen XNUL
	 * CH5 -- Touch screen YNLR
	 * CH6 -- Touch screen WIPER (5-wire only)
	 *
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	 * The bit fields below represents which parts of the LRADC block are
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	 * switched into special mode of operation. These channels can not
	 * be sampled as regular LRADC channels. The driver will refuse any
	 * attempt to sample these channels.
	 */
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#define CHAN_MASK_TOUCHBUTTON		(BIT(1) | BIT(0))
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#define CHAN_MASK_TOUCHSCREEN_4WIRE	(0xf << 2)
#define CHAN_MASK_TOUCHSCREEN_5WIRE	(0x1f << 2)
	enum mxs_lradc_ts	use_touchscreen;
	bool			use_touchbutton;

	struct input_dev	*ts_input;
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	enum mxs_lradc_id	soc;
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	enum lradc_ts_plate	cur_plate; /* state machine */
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	bool			ts_valid;
	unsigned		ts_x_pos;
	unsigned		ts_y_pos;
	unsigned		ts_pressure;

	/* handle touchscreen's physical behaviour */
	/* samples per coordinate */
	unsigned		over_sample_cnt;
	/* time clocks between samples */
	unsigned		over_sample_delay;
	/* time in clocks to wait after the plates where switched */
	unsigned		settling_delay;
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};

#define	LRADC_CTRL0				0x00
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# define LRADC_CTRL0_MX28_TOUCH_DETECT_ENABLE	BIT(23)
# define LRADC_CTRL0_MX28_TOUCH_SCREEN_TYPE	BIT(22)
# define LRADC_CTRL0_MX28_YNNSW	/* YM */	BIT(21)
# define LRADC_CTRL0_MX28_YPNSW	/* YP */	BIT(20)
# define LRADC_CTRL0_MX28_YPPSW	/* YP */	BIT(19)
# define LRADC_CTRL0_MX28_XNNSW	/* XM */	BIT(18)
# define LRADC_CTRL0_MX28_XNPSW	/* XM */	BIT(17)
# define LRADC_CTRL0_MX28_XPPSW	/* XP */	BIT(16)

# define LRADC_CTRL0_MX23_TOUCH_DETECT_ENABLE	BIT(20)
# define LRADC_CTRL0_MX23_YM			BIT(19)
# define LRADC_CTRL0_MX23_XM			BIT(18)
# define LRADC_CTRL0_MX23_YP			BIT(17)
# define LRADC_CTRL0_MX23_XP			BIT(16)
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# define LRADC_CTRL0_MX28_PLATE_MASK \
		(LRADC_CTRL0_MX28_TOUCH_DETECT_ENABLE | \
		LRADC_CTRL0_MX28_YNNSW | LRADC_CTRL0_MX28_YPNSW | \
		LRADC_CTRL0_MX28_YPPSW | LRADC_CTRL0_MX28_XNNSW | \
		LRADC_CTRL0_MX28_XNPSW | LRADC_CTRL0_MX28_XPPSW)
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# define LRADC_CTRL0_MX23_PLATE_MASK \
		(LRADC_CTRL0_MX23_TOUCH_DETECT_ENABLE | \
		LRADC_CTRL0_MX23_YM | LRADC_CTRL0_MX23_XM | \
		LRADC_CTRL0_MX23_YP | LRADC_CTRL0_MX23_XP)

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#define	LRADC_CTRL1				0x10
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#define	LRADC_CTRL1_TOUCH_DETECT_IRQ_EN		BIT(24)
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#define	LRADC_CTRL1_LRADC_IRQ_EN(n)		(1 << ((n) + 16))
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#define	LRADC_CTRL1_MX28_LRADC_IRQ_EN_MASK	(0x1fff << 16)
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#define	LRADC_CTRL1_MX23_LRADC_IRQ_EN_MASK	(0x01ff << 16)
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#define	LRADC_CTRL1_LRADC_IRQ_EN_OFFSET		16
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#define	LRADC_CTRL1_TOUCH_DETECT_IRQ		BIT(8)
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#define	LRADC_CTRL1_LRADC_IRQ(n)		(1 << (n))
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#define	LRADC_CTRL1_MX28_LRADC_IRQ_MASK		0x1fff
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#define	LRADC_CTRL1_MX23_LRADC_IRQ_MASK		0x01ff
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#define	LRADC_CTRL1_LRADC_IRQ_OFFSET		0
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#define	LRADC_CTRL2				0x20
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#define	LRADC_CTRL2_DIVIDE_BY_TWO_OFFSET	24
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#define	LRADC_CTRL2_TEMPSENSE_PWD		BIT(15)
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#define	LRADC_STATUS				0x40
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#define	LRADC_STATUS_TOUCH_DETECT_RAW		BIT(0)
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#define	LRADC_CH(n)				(0x50 + (0x10 * (n)))
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#define	LRADC_CH_ACCUMULATE			BIT(29)
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#define	LRADC_CH_NUM_SAMPLES_MASK		(0x1f << 24)
#define	LRADC_CH_NUM_SAMPLES_OFFSET		24
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#define	LRADC_CH_NUM_SAMPLES(x) \
				((x) << LRADC_CH_NUM_SAMPLES_OFFSET)
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#define	LRADC_CH_VALUE_MASK			0x3ffff
#define	LRADC_CH_VALUE_OFFSET			0

#define	LRADC_DELAY(n)				(0xd0 + (0x10 * (n)))
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#define	LRADC_DELAY_TRIGGER_LRADCS_MASK		(0xffUL << 24)
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#define	LRADC_DELAY_TRIGGER_LRADCS_OFFSET	24
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#define	LRADC_DELAY_TRIGGER(x) \
				(((x) << LRADC_DELAY_TRIGGER_LRADCS_OFFSET) & \
				LRADC_DELAY_TRIGGER_LRADCS_MASK)
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#define	LRADC_DELAY_KICK			BIT(20)
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#define	LRADC_DELAY_TRIGGER_DELAYS_MASK		(0xf << 16)
#define	LRADC_DELAY_TRIGGER_DELAYS_OFFSET	16
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#define	LRADC_DELAY_TRIGGER_DELAYS(x) \
				(((x) << LRADC_DELAY_TRIGGER_DELAYS_OFFSET) & \
				LRADC_DELAY_TRIGGER_DELAYS_MASK)
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#define	LRADC_DELAY_LOOP_COUNT_MASK		(0x1f << 11)
#define	LRADC_DELAY_LOOP_COUNT_OFFSET		11
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#define	LRADC_DELAY_LOOP(x) \
				(((x) << LRADC_DELAY_LOOP_COUNT_OFFSET) & \
				LRADC_DELAY_LOOP_COUNT_MASK)
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#define	LRADC_DELAY_DELAY_MASK			0x7ff
#define	LRADC_DELAY_DELAY_OFFSET		0
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#define	LRADC_DELAY_DELAY(x) \
				(((x) << LRADC_DELAY_DELAY_OFFSET) & \
				LRADC_DELAY_DELAY_MASK)
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#define	LRADC_CTRL4				0x140
#define	LRADC_CTRL4_LRADCSELECT_MASK(n)		(0xf << ((n) * 4))
#define	LRADC_CTRL4_LRADCSELECT_OFFSET(n)	((n) * 4)
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#define	LRADC_CTRL4_LRADCSELECT(n, x) \
				(((x) << LRADC_CTRL4_LRADCSELECT_OFFSET(n)) & \
				LRADC_CTRL4_LRADCSELECT_MASK(n))
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#define LRADC_RESOLUTION			12
#define LRADC_SINGLE_SAMPLE_MASK		((1 << LRADC_RESOLUTION) - 1)

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static void mxs_lradc_reg_set(struct mxs_lradc *lradc, u32 val, u32 reg)
{
	writel(val, lradc->base + reg + STMP_OFFSET_REG_SET);
}

static void mxs_lradc_reg_clear(struct mxs_lradc *lradc, u32 val, u32 reg)
{
	writel(val, lradc->base + reg + STMP_OFFSET_REG_CLR);
}

static void mxs_lradc_reg_wrt(struct mxs_lradc *lradc, u32 val, u32 reg)
{
	writel(val, lradc->base + reg);
}

static u32 mxs_lradc_plate_mask(struct mxs_lradc *lradc)
{
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	if (lradc->soc == IMX23_LRADC)
		return LRADC_CTRL0_MX23_PLATE_MASK;
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	return LRADC_CTRL0_MX28_PLATE_MASK;
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}

static u32 mxs_lradc_irq_en_mask(struct mxs_lradc *lradc)
{
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	if (lradc->soc == IMX23_LRADC)
		return LRADC_CTRL1_MX23_LRADC_IRQ_EN_MASK;
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	return LRADC_CTRL1_MX28_LRADC_IRQ_EN_MASK;
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}

static u32 mxs_lradc_irq_mask(struct mxs_lradc *lradc)
{
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	if (lradc->soc == IMX23_LRADC)
		return LRADC_CTRL1_MX23_LRADC_IRQ_MASK;
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	return LRADC_CTRL1_MX28_LRADC_IRQ_MASK;
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}

static u32 mxs_lradc_touch_detect_bit(struct mxs_lradc *lradc)
{
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	if (lradc->soc == IMX23_LRADC)
		return LRADC_CTRL0_MX23_TOUCH_DETECT_ENABLE;
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	return LRADC_CTRL0_MX28_TOUCH_DETECT_ENABLE;
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}

static u32 mxs_lradc_drive_x_plate(struct mxs_lradc *lradc)
{
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	if (lradc->soc == IMX23_LRADC)
		return LRADC_CTRL0_MX23_XP | LRADC_CTRL0_MX23_XM;
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	return LRADC_CTRL0_MX28_XPPSW | LRADC_CTRL0_MX28_XNNSW;
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}

static u32 mxs_lradc_drive_y_plate(struct mxs_lradc *lradc)
{
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	if (lradc->soc == IMX23_LRADC)
		return LRADC_CTRL0_MX23_YP | LRADC_CTRL0_MX23_YM;
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	return LRADC_CTRL0_MX28_YPPSW | LRADC_CTRL0_MX28_YNNSW;
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}

static u32 mxs_lradc_drive_pressure(struct mxs_lradc *lradc)
{
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	if (lradc->soc == IMX23_LRADC)
		return LRADC_CTRL0_MX23_YP | LRADC_CTRL0_MX23_XM;
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	return LRADC_CTRL0_MX28_YPPSW | LRADC_CTRL0_MX28_XNNSW;
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}

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static bool mxs_lradc_check_touch_event(struct mxs_lradc *lradc)
{
	return !!(readl(lradc->base + LRADC_STATUS) &
					LRADC_STATUS_TOUCH_DETECT_RAW);
}

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static void mxs_lradc_map_channel(struct mxs_lradc *lradc, unsigned vch,
				  unsigned ch)
{
	mxs_lradc_reg_clear(lradc, LRADC_CTRL4_LRADCSELECT_MASK(vch),
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			    LRADC_CTRL4);
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	mxs_lradc_reg_set(lradc, LRADC_CTRL4_LRADCSELECT(vch, ch), LRADC_CTRL4);
}

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static void mxs_lradc_setup_ts_channel(struct mxs_lradc *lradc, unsigned ch)
{
	/*
	 * prepare for oversampling conversion
	 *
	 * from the datasheet:
	 * "The ACCUMULATE bit in the appropriate channel register
	 * HW_LRADC_CHn must be set to 1 if NUM_SAMPLES is greater then 0;
	 * otherwise, the IRQs will not fire."
	 */
	mxs_lradc_reg_wrt(lradc, LRADC_CH_ACCUMULATE |
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			  LRADC_CH_NUM_SAMPLES(lradc->over_sample_cnt - 1),
			  LRADC_CH(ch));
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	/*
	 * from the datasheet:
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	 * "Software must clear this register in preparation for a
	 * multi-cycle accumulation.
	 */
	mxs_lradc_reg_clear(lradc, LRADC_CH_VALUE_MASK, LRADC_CH(ch));

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	/*
	 * prepare the delay/loop unit according to the oversampling count
	 *
	 * from the datasheet:
	 * "The DELAY fields in HW_LRADC_DELAY0, HW_LRADC_DELAY1,
	 * HW_LRADC_DELAY2, and HW_LRADC_DELAY3 must be non-zero; otherwise,
	 * the LRADC will not trigger the delay group."
	 */
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	mxs_lradc_reg_wrt(lradc, LRADC_DELAY_TRIGGER(1 << ch) |
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			  LRADC_DELAY_TRIGGER_DELAYS(0) |
			  LRADC_DELAY_LOOP(lradc->over_sample_cnt - 1) |
			  LRADC_DELAY_DELAY(lradc->over_sample_delay - 1),
			  LRADC_DELAY(3));
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	mxs_lradc_reg_clear(lradc, LRADC_CTRL1_LRADC_IRQ(ch), LRADC_CTRL1);
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	/*
	 * after changing the touchscreen plates setting
	 * the signals need some initial time to settle. Start the
	 * SoC's delay unit and start the conversion later
	 * and automatically.
	 */
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	mxs_lradc_reg_wrt(
		lradc,
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		LRADC_DELAY_TRIGGER(0) | /* don't trigger ADC */
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		LRADC_DELAY_TRIGGER_DELAYS(BIT(3)) | /* trigger DELAY unit#3 */
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		LRADC_DELAY_KICK |
		LRADC_DELAY_DELAY(lradc->settling_delay),
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		LRADC_DELAY(2));
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}

/*
 * Pressure detection is special:
 * We want to do both required measurements for the pressure detection in
 * one turn. Use the hardware features to chain both conversions and let the
 * hardware report one interrupt if both conversions are done
 */
static void mxs_lradc_setup_ts_pressure(struct mxs_lradc *lradc, unsigned ch1,
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					unsigned ch2)
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{
	u32 reg;

	/*
	 * prepare for oversampling conversion
	 *
	 * from the datasheet:
	 * "The ACCUMULATE bit in the appropriate channel register
	 * HW_LRADC_CHn must be set to 1 if NUM_SAMPLES is greater then 0;
	 * otherwise, the IRQs will not fire."
	 */
	reg = LRADC_CH_ACCUMULATE |
		LRADC_CH_NUM_SAMPLES(lradc->over_sample_cnt - 1);
	mxs_lradc_reg_wrt(lradc, reg, LRADC_CH(ch1));
	mxs_lradc_reg_wrt(lradc, reg, LRADC_CH(ch2));

508 509
	/*
	 * from the datasheet:
510 511 512 513 514 515 516
	 * "Software must clear this register in preparation for a
	 * multi-cycle accumulation.
	 */
	mxs_lradc_reg_clear(lradc, LRADC_CH_VALUE_MASK, LRADC_CH(ch1));
	mxs_lradc_reg_clear(lradc, LRADC_CH_VALUE_MASK, LRADC_CH(ch2));

	/* prepare the delay/loop unit according to the oversampling count */
517 518 519 520 521 522 523 524
	mxs_lradc_reg_wrt(
		    lradc,
		    LRADC_DELAY_TRIGGER(1 << ch1) |
		    LRADC_DELAY_TRIGGER(1 << ch2) | /* start both channels */
		    LRADC_DELAY_TRIGGER_DELAYS(0) |
		    LRADC_DELAY_LOOP(lradc->over_sample_cnt - 1) |
		    LRADC_DELAY_DELAY(lradc->over_sample_delay - 1),
		    LRADC_DELAY(3));
525

526
	mxs_lradc_reg_clear(lradc, LRADC_CTRL1_LRADC_IRQ(ch2), LRADC_CTRL1);
527 528 529 530 531 532 533

	/*
	 * after changing the touchscreen plates setting
	 * the signals need some initial time to settle. Start the
	 * SoC's delay unit and start the conversion later
	 * and automatically.
	 */
534 535
	mxs_lradc_reg_wrt(
		lradc,
536
		LRADC_DELAY_TRIGGER(0) | /* don't trigger ADC */
537
		LRADC_DELAY_TRIGGER_DELAYS(BIT(3)) | /* trigger DELAY unit#3 */
538 539 540 541 542
		LRADC_DELAY_KICK |
		LRADC_DELAY_DELAY(lradc->settling_delay), LRADC_DELAY(2));
}

static unsigned mxs_lradc_read_raw_channel(struct mxs_lradc *lradc,
543
					   unsigned channel)
544 545 546 547 548 549 550 551 552 553 554 555 556 557 558
{
	u32 reg;
	unsigned num_samples, val;

	reg = readl(lradc->base + LRADC_CH(channel));
	if (reg & LRADC_CH_ACCUMULATE)
		num_samples = lradc->over_sample_cnt;
	else
		num_samples = 1;

	val = (reg & LRADC_CH_VALUE_MASK) >> LRADC_CH_VALUE_OFFSET;
	return val / num_samples;
}

static unsigned mxs_lradc_read_ts_pressure(struct mxs_lradc *lradc,
559
					   unsigned ch1, unsigned ch2)
560 561 562 563 564 565 566 567 568 569 570 571 572 573 574 575 576 577 578 579 580 581 582 583 584 585 586 587 588 589 590 591 592 593 594 595 596 597 598 599 600 601 602 603 604 605 606 607 608 609 610 611 612 613 614 615
{
	u32 reg, mask;
	unsigned pressure, m1, m2;

	mask = LRADC_CTRL1_LRADC_IRQ(ch1) | LRADC_CTRL1_LRADC_IRQ(ch2);
	reg = readl(lradc->base + LRADC_CTRL1) & mask;

	while (reg != mask) {
		reg = readl(lradc->base + LRADC_CTRL1) & mask;
		dev_dbg(lradc->dev, "One channel is still busy: %X\n", reg);
	}

	m1 = mxs_lradc_read_raw_channel(lradc, ch1);
	m2 = mxs_lradc_read_raw_channel(lradc, ch2);

	if (m2 == 0) {
		dev_warn(lradc->dev, "Cannot calculate pressure\n");
		return 1 << (LRADC_RESOLUTION - 1);
	}

	/* simply scale the value from 0 ... max ADC resolution */
	pressure = m1;
	pressure *= (1 << LRADC_RESOLUTION);
	pressure /= m2;

	dev_dbg(lradc->dev, "Pressure = %u\n", pressure);
	return pressure;
}

#define TS_CH_XP 2
#define TS_CH_YP 3
#define TS_CH_XM 4
#define TS_CH_YM 5

/*
 * YP(open)--+-------------+
 *           |             |--+
 *           |             |  |
 *    YM(-)--+-------------+  |
 *             +--------------+
 *             |              |
 *         XP(weak+)        XM(open)
 *
 * "weak+" means 200k Ohm VDDIO
 * (-) means GND
 */
static void mxs_lradc_setup_touch_detection(struct mxs_lradc *lradc)
{
	/*
	 * In order to detect a touch event the 'touch detect enable' bit
	 * enables:
	 *  - a weak pullup to the X+ connector
	 *  - a strong ground at the Y- connector
	 */
	mxs_lradc_reg_clear(lradc, mxs_lradc_plate_mask(lradc), LRADC_CTRL0);
	mxs_lradc_reg_set(lradc, mxs_lradc_touch_detect_bit(lradc),
616
			  LRADC_CTRL0);
617 618 619 620 621 622 623 624 625 626 627 628 629 630 631 632 633 634 635 636
}

/*
 * YP(meas)--+-------------+
 *           |             |--+
 *           |             |  |
 * YM(open)--+-------------+  |
 *             +--------------+
 *             |              |
 *           XP(+)          XM(-)
 *
 * (+) means here 1.85 V
 * (-) means here GND
 */
static void mxs_lradc_prepare_x_pos(struct mxs_lradc *lradc)
{
	mxs_lradc_reg_clear(lradc, mxs_lradc_plate_mask(lradc), LRADC_CTRL0);
	mxs_lradc_reg_set(lradc, mxs_lradc_drive_x_plate(lradc), LRADC_CTRL0);

	lradc->cur_plate = LRADC_SAMPLE_X;
637 638
	mxs_lradc_map_channel(lradc, TOUCHSCREEN_VCHANNEL1, TS_CH_YP);
	mxs_lradc_setup_ts_channel(lradc, TOUCHSCREEN_VCHANNEL1);
639 640 641 642 643 644 645 646 647 648 649 650 651 652 653 654 655 656 657 658
}

/*
 *   YP(+)--+-------------+
 *          |             |--+
 *          |             |  |
 *   YM(-)--+-------------+  |
 *            +--------------+
 *            |              |
 *         XP(open)        XM(meas)
 *
 * (+) means here 1.85 V
 * (-) means here GND
 */
static void mxs_lradc_prepare_y_pos(struct mxs_lradc *lradc)
{
	mxs_lradc_reg_clear(lradc, mxs_lradc_plate_mask(lradc), LRADC_CTRL0);
	mxs_lradc_reg_set(lradc, mxs_lradc_drive_y_plate(lradc), LRADC_CTRL0);

	lradc->cur_plate = LRADC_SAMPLE_Y;
659 660
	mxs_lradc_map_channel(lradc, TOUCHSCREEN_VCHANNEL1, TS_CH_XM);
	mxs_lradc_setup_ts_channel(lradc, TOUCHSCREEN_VCHANNEL1);
661 662 663 664 665 666 667 668 669 670 671 672 673 674 675 676 677 678 679 680
}

/*
 *    YP(+)--+-------------+
 *           |             |--+
 *           |             |  |
 * YM(meas)--+-------------+  |
 *             +--------------+
 *             |              |
 *          XP(meas)        XM(-)
 *
 * (+) means here 1.85 V
 * (-) means here GND
 */
static void mxs_lradc_prepare_pressure(struct mxs_lradc *lradc)
{
	mxs_lradc_reg_clear(lradc, mxs_lradc_plate_mask(lradc), LRADC_CTRL0);
	mxs_lradc_reg_set(lradc, mxs_lradc_drive_pressure(lradc), LRADC_CTRL0);

	lradc->cur_plate = LRADC_SAMPLE_PRESSURE;
681 682 683
	mxs_lradc_map_channel(lradc, TOUCHSCREEN_VCHANNEL1, TS_CH_YM);
	mxs_lradc_map_channel(lradc, TOUCHSCREEN_VCHANNEL2, TS_CH_XP);
	mxs_lradc_setup_ts_pressure(lradc, TOUCHSCREEN_VCHANNEL2,
684
				    TOUCHSCREEN_VCHANNEL1);
685 686 687 688 689 690 691 692
}

static void mxs_lradc_enable_touch_detection(struct mxs_lradc *lradc)
{
	mxs_lradc_setup_touch_detection(lradc);

	lradc->cur_plate = LRADC_TOUCH;
	mxs_lradc_reg_clear(lradc, LRADC_CTRL1_TOUCH_DETECT_IRQ |
693
			    LRADC_CTRL1_TOUCH_DETECT_IRQ_EN, LRADC_CTRL1);
694 695 696
	mxs_lradc_reg_set(lradc, LRADC_CTRL1_TOUCH_DETECT_IRQ_EN, LRADC_CTRL1);
}

697 698
static void mxs_lradc_start_touch_event(struct mxs_lradc *lradc)
{
699 700 701
	mxs_lradc_reg_clear(lradc,
			    LRADC_CTRL1_TOUCH_DETECT_IRQ_EN,
			    LRADC_CTRL1);
702
	mxs_lradc_reg_set(lradc,
703 704
			  LRADC_CTRL1_LRADC_IRQ_EN(TOUCHSCREEN_VCHANNEL1),
			  LRADC_CTRL1);
705 706 707 708 709 710 711
	/*
	 * start with the Y-pos, because it uses nearly the same plate
	 * settings like the touch detection
	 */
	mxs_lradc_prepare_y_pos(lradc);
}

712 713 714 715 716 717 718 719 720 721 722 723 724 725 726 727 728
static void mxs_lradc_report_ts_event(struct mxs_lradc *lradc)
{
	input_report_abs(lradc->ts_input, ABS_X, lradc->ts_x_pos);
	input_report_abs(lradc->ts_input, ABS_Y, lradc->ts_y_pos);
	input_report_abs(lradc->ts_input, ABS_PRESSURE, lradc->ts_pressure);
	input_report_key(lradc->ts_input, BTN_TOUCH, 1);
	input_sync(lradc->ts_input);
}

static void mxs_lradc_complete_touch_event(struct mxs_lradc *lradc)
{
	mxs_lradc_setup_touch_detection(lradc);
	lradc->cur_plate = LRADC_SAMPLE_VALID;
	/*
	 * start a dummy conversion to burn time to settle the signals
	 * note: we are not interested in the conversion's value
	 */
729 730
	mxs_lradc_reg_wrt(lradc, 0, LRADC_CH(TOUCHSCREEN_VCHANNEL1));
	mxs_lradc_reg_clear(lradc,
731 732 733 734 735 736 737 738
			    LRADC_CTRL1_LRADC_IRQ(TOUCHSCREEN_VCHANNEL1) |
			    LRADC_CTRL1_LRADC_IRQ(TOUCHSCREEN_VCHANNEL2),
			    LRADC_CTRL1);
	mxs_lradc_reg_wrt(
		    lradc,
		    LRADC_DELAY_TRIGGER(1 << TOUCHSCREEN_VCHANNEL1) |
		    LRADC_DELAY_KICK | LRADC_DELAY_DELAY(10), /* waste 5 ms */
		    LRADC_DELAY(2));
739 740 741 742 743 744 745 746 747 748 749 750 751 752 753 754 755 756 757 758 759 760 761 762 763 764 765 766
}

/*
 * in order to avoid false measurements, report only samples where
 * the surface is still touched after the position measurement
 */
static void mxs_lradc_finish_touch_event(struct mxs_lradc *lradc, bool valid)
{
	/* if it is still touched, report the sample */
	if (valid && mxs_lradc_check_touch_event(lradc)) {
		lradc->ts_valid = true;
		mxs_lradc_report_ts_event(lradc);
	}

	/* if it is even still touched, continue with the next measurement */
	if (mxs_lradc_check_touch_event(lradc)) {
		mxs_lradc_prepare_y_pos(lradc);
		return;
	}

	if (lradc->ts_valid) {
		/* signal the release */
		lradc->ts_valid = false;
		input_report_key(lradc->ts_input, BTN_TOUCH, 0);
		input_sync(lradc->ts_input);
	}

	/* if it is released, wait for the next touch via IRQ */
767
	lradc->cur_plate = LRADC_TOUCH;
768 769
	mxs_lradc_reg_wrt(lradc, 0, LRADC_DELAY(2));
	mxs_lradc_reg_wrt(lradc, 0, LRADC_DELAY(3));
770 771 772 773 774
	mxs_lradc_reg_clear(lradc,
			    LRADC_CTRL1_TOUCH_DETECT_IRQ |
			    LRADC_CTRL1_LRADC_IRQ_EN(TOUCHSCREEN_VCHANNEL1) |
			    LRADC_CTRL1_LRADC_IRQ(TOUCHSCREEN_VCHANNEL1),
			    LRADC_CTRL1);
775 776 777 778 779 780 781 782
	mxs_lradc_reg_set(lradc, LRADC_CTRL1_TOUCH_DETECT_IRQ_EN, LRADC_CTRL1);
}

/* touchscreen's state machine */
static void mxs_lradc_handle_touch(struct mxs_lradc *lradc)
{
	switch (lradc->cur_plate) {
	case LRADC_TOUCH:
783 784
		if (mxs_lradc_check_touch_event(lradc))
			mxs_lradc_start_touch_event(lradc);
785
		mxs_lradc_reg_clear(lradc, LRADC_CTRL1_TOUCH_DETECT_IRQ,
786
				    LRADC_CTRL1);
787 788 789
		return;

	case LRADC_SAMPLE_Y:
790 791 792
		lradc->ts_y_pos =
		    mxs_lradc_read_raw_channel(lradc,
					       TOUCHSCREEN_VCHANNEL1);
793 794 795 796
		mxs_lradc_prepare_x_pos(lradc);
		return;

	case LRADC_SAMPLE_X:
797 798 799
		lradc->ts_x_pos =
		    mxs_lradc_read_raw_channel(lradc,
					       TOUCHSCREEN_VCHANNEL1);
800 801 802 803
		mxs_lradc_prepare_pressure(lradc);
		return;

	case LRADC_SAMPLE_PRESSURE:
804 805 806 807
		lradc->ts_pressure =
		    mxs_lradc_read_ts_pressure(lradc,
					       TOUCHSCREEN_VCHANNEL2,
					       TOUCHSCREEN_VCHANNEL1);
808 809 810 811 812 813 814 815 816
		mxs_lradc_complete_touch_event(lradc);
		return;

	case LRADC_SAMPLE_VALID:
		mxs_lradc_finish_touch_event(lradc, 1);
		break;
	}
}

M
Marek Vasut 已提交
817 818 819
/*
 * Raw I/O operations
 */
820
static int mxs_lradc_read_single(struct iio_dev *iio_dev, int chan, int *val)
M
Marek Vasut 已提交
821 822 823 824 825
{
	struct mxs_lradc *lradc = iio_priv(iio_dev);
	int ret;

	/*
826
	 * See if there is no buffered operation in progress. If there is, simply
M
Marek Vasut 已提交
827 828 829 830 831 832 833 834
	 * bail out. This can be improved to support both buffered and raw IO at
	 * the same time, yet the code becomes horribly complicated. Therefore I
	 * applied KISS principle here.
	 */
	ret = mutex_trylock(&lradc->lock);
	if (!ret)
		return -EBUSY;

835
	reinit_completion(&lradc->completion);
M
Marek Vasut 已提交
836 837 838 839 840 841

	/*
	 * No buffered operation in progress, map the channel and trigger it.
	 * Virtual channel 0 is always used here as the others are always not
	 * used if doing raw sampling.
	 */
842
	if (lradc->soc == IMX28_LRADC)
843
		mxs_lradc_reg_clear(lradc, LRADC_CTRL1_LRADC_IRQ_EN(0),
844
				    LRADC_CTRL1);
845
	mxs_lradc_reg_clear(lradc, 0x1, LRADC_CTRL0);
M
Marek Vasut 已提交
846

R
Robert Hodaszi 已提交
847 848
	/* Enable / disable the divider per requirement */
	if (test_bit(chan, &lradc->is_divided))
849 850 851
		mxs_lradc_reg_set(lradc,
				  1 << LRADC_CTRL2_DIVIDE_BY_TWO_OFFSET,
				  LRADC_CTRL2);
R
Robert Hodaszi 已提交
852 853
	else
		mxs_lradc_reg_clear(lradc,
854 855
				    1 << LRADC_CTRL2_DIVIDE_BY_TWO_OFFSET,
				    LRADC_CTRL2);
R
Robert Hodaszi 已提交
856

857
	/* Clean the slot's previous content, then set new one. */
858
	mxs_lradc_reg_clear(lradc, LRADC_CTRL4_LRADCSELECT_MASK(0),
859
			    LRADC_CTRL4);
860
	mxs_lradc_reg_set(lradc, chan, LRADC_CTRL4);
861

862
	mxs_lradc_reg_wrt(lradc, 0, LRADC_CH(0));
M
Marek Vasut 已提交
863 864

	/* Enable the IRQ and start sampling the channel. */
865
	mxs_lradc_reg_set(lradc, LRADC_CTRL1_LRADC_IRQ_EN(0), LRADC_CTRL1);
866
	mxs_lradc_reg_set(lradc, BIT(0), LRADC_CTRL0);
M
Marek Vasut 已提交
867 868 869 870 871 872 873 874 875 876 877 878 879

	/* Wait for completion on the channel, 1 second max. */
	ret = wait_for_completion_killable_timeout(&lradc->completion, HZ);
	if (!ret)
		ret = -ETIMEDOUT;
	if (ret < 0)
		goto err;

	/* Read the data. */
	*val = readl(lradc->base + LRADC_CH(0)) & LRADC_CH_VALUE_MASK;
	ret = IIO_VAL_INT;

err:
880
	mxs_lradc_reg_clear(lradc, LRADC_CTRL1_LRADC_IRQ_EN(0), LRADC_CTRL1);
M
Marek Vasut 已提交
881 882 883 884 885 886

	mutex_unlock(&lradc->lock);

	return ret;
}

887 888 889 890 891 892 893 894 895 896 897 898 899 900 901 902 903 904
static int mxs_lradc_read_temp(struct iio_dev *iio_dev, int *val)
{
	int ret, min, max;

	ret = mxs_lradc_read_single(iio_dev, 8, &min);
	if (ret != IIO_VAL_INT)
		return ret;

	ret = mxs_lradc_read_single(iio_dev, 9, &max);
	if (ret != IIO_VAL_INT)
		return ret;

	*val = max - min;

	return IIO_VAL_INT;
}

static int mxs_lradc_read_raw(struct iio_dev *iio_dev,
905 906
			      const struct iio_chan_spec *chan,
			      int *val, int *val2, long m)
907
{
908 909
	struct mxs_lradc *lradc = iio_priv(iio_dev);

910 911 912 913 914 915 916 917 918
	switch (m) {
	case IIO_CHAN_INFO_RAW:
		if (chan->type == IIO_TEMP)
			return mxs_lradc_read_temp(iio_dev, val);

		return mxs_lradc_read_single(iio_dev, chan->channel, val);

	case IIO_CHAN_INFO_SCALE:
		if (chan->type == IIO_TEMP) {
919 920
			/*
			 * From the datasheet, we have to multiply by 1.012 and
921 922 923 924 925 926 927
			 * divide by 4
			 */
			*val = 0;
			*val2 = 253000;
			return IIO_VAL_INT_PLUS_MICRO;
		}

928
		*val = lradc->vref_mv[chan->channel];
929
		*val2 = chan->scan_type.realbits -
930
			test_bit(chan->channel, &lradc->is_divided);
931
		return IIO_VAL_FRACTIONAL_LOG2;
932 933 934

	case IIO_CHAN_INFO_OFFSET:
		if (chan->type == IIO_TEMP) {
935 936
			/*
			 * The calculated value from the ADC is in Kelvin, we
937 938 939
			 * want Celsius for hwmon so the offset is -273.15
			 * The offset is applied before scaling so it is
			 * actually -213.15 * 4 / 1.012 = -1079.644268
940
			 */
941 942
			*val = -1079;
			*val2 = 644268;
943 944 945 946 947 948 949 950 951 952 953 954 955

			return IIO_VAL_INT_PLUS_MICRO;
		}

		return -EINVAL;

	default:
		break;
	}

	return -EINVAL;
}

956 957 958 959 960 961 962 963 964 965 966 967 968 969 970 971 972 973 974
static int mxs_lradc_write_raw(struct iio_dev *iio_dev,
			       const struct iio_chan_spec *chan,
			       int val, int val2, long m)
{
	struct mxs_lradc *lradc = iio_priv(iio_dev);
	struct mxs_lradc_scale *scale_avail =
			lradc->scale_avail[chan->channel];
	int ret;

	ret = mutex_trylock(&lradc->lock);
	if (!ret)
		return -EBUSY;

	switch (m) {
	case IIO_CHAN_INFO_SCALE:
		ret = -EINVAL;
		if (val == scale_avail[MXS_LRADC_DIV_DISABLED].integer &&
		    val2 == scale_avail[MXS_LRADC_DIV_DISABLED].nano) {
			/* divider by two disabled */
975
			clear_bit(chan->channel, &lradc->is_divided);
976 977 978 979
			ret = 0;
		} else if (val == scale_avail[MXS_LRADC_DIV_ENABLED].integer &&
			   val2 == scale_avail[MXS_LRADC_DIV_ENABLED].nano) {
			/* divider by two enabled */
980
			set_bit(chan->channel, &lradc->is_divided);
981 982 983 984 985 986 987 988 989 990 991 992 993 994 995 996 997 998 999 1000 1001
			ret = 0;
		}

		break;
	default:
		ret = -EINVAL;
		break;
	}

	mutex_unlock(&lradc->lock);

	return ret;
}

static int mxs_lradc_write_raw_get_fmt(struct iio_dev *iio_dev,
				       const struct iio_chan_spec *chan,
				       long m)
{
	return IIO_VAL_INT_PLUS_NANO;
}

1002
static ssize_t mxs_lradc_show_scale_available_ch(struct device *dev,
1003 1004 1005
						 struct device_attribute *attr,
						 char *buf,
						 int ch)
1006 1007 1008 1009 1010 1011
{
	struct iio_dev *iio = dev_to_iio_dev(dev);
	struct mxs_lradc *lradc = iio_priv(iio);
	int i, len = 0;

	for (i = 0; i < ARRAY_SIZE(lradc->scale_avail[ch]); i++)
1012
		len += sprintf(buf + len, "%u.%09u ",
1013 1014 1015 1016 1017 1018 1019 1020 1021
			       lradc->scale_avail[ch][i].integer,
			       lradc->scale_avail[ch][i].nano);

	len += sprintf(buf + len, "\n");

	return len;
}

static ssize_t mxs_lradc_show_scale_available(struct device *dev,
1022 1023
					      struct device_attribute *attr,
					      char *buf)
1024 1025 1026 1027 1028 1029 1030 1031 1032 1033 1034 1035 1036 1037 1038 1039 1040 1041 1042 1043 1044 1045 1046 1047 1048 1049 1050 1051 1052 1053 1054 1055 1056 1057 1058 1059 1060 1061 1062 1063 1064 1065 1066 1067 1068 1069 1070 1071
{
	struct iio_dev_attr *iio_attr = to_iio_dev_attr(attr);

	return mxs_lradc_show_scale_available_ch(dev, attr, buf,
						 iio_attr->address);
}

#define SHOW_SCALE_AVAILABLE_ATTR(ch)					\
static IIO_DEVICE_ATTR(in_voltage##ch##_scale_available, S_IRUGO,	\
		       mxs_lradc_show_scale_available, NULL, ch)

SHOW_SCALE_AVAILABLE_ATTR(0);
SHOW_SCALE_AVAILABLE_ATTR(1);
SHOW_SCALE_AVAILABLE_ATTR(2);
SHOW_SCALE_AVAILABLE_ATTR(3);
SHOW_SCALE_AVAILABLE_ATTR(4);
SHOW_SCALE_AVAILABLE_ATTR(5);
SHOW_SCALE_AVAILABLE_ATTR(6);
SHOW_SCALE_AVAILABLE_ATTR(7);
SHOW_SCALE_AVAILABLE_ATTR(10);
SHOW_SCALE_AVAILABLE_ATTR(11);
SHOW_SCALE_AVAILABLE_ATTR(12);
SHOW_SCALE_AVAILABLE_ATTR(13);
SHOW_SCALE_AVAILABLE_ATTR(14);
SHOW_SCALE_AVAILABLE_ATTR(15);

static struct attribute *mxs_lradc_attributes[] = {
	&iio_dev_attr_in_voltage0_scale_available.dev_attr.attr,
	&iio_dev_attr_in_voltage1_scale_available.dev_attr.attr,
	&iio_dev_attr_in_voltage2_scale_available.dev_attr.attr,
	&iio_dev_attr_in_voltage3_scale_available.dev_attr.attr,
	&iio_dev_attr_in_voltage4_scale_available.dev_attr.attr,
	&iio_dev_attr_in_voltage5_scale_available.dev_attr.attr,
	&iio_dev_attr_in_voltage6_scale_available.dev_attr.attr,
	&iio_dev_attr_in_voltage7_scale_available.dev_attr.attr,
	&iio_dev_attr_in_voltage10_scale_available.dev_attr.attr,
	&iio_dev_attr_in_voltage11_scale_available.dev_attr.attr,
	&iio_dev_attr_in_voltage12_scale_available.dev_attr.attr,
	&iio_dev_attr_in_voltage13_scale_available.dev_attr.attr,
	&iio_dev_attr_in_voltage14_scale_available.dev_attr.attr,
	&iio_dev_attr_in_voltage15_scale_available.dev_attr.attr,
	NULL
};

static const struct attribute_group mxs_lradc_attribute_group = {
	.attrs = mxs_lradc_attributes,
};

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static const struct iio_info mxs_lradc_iio_info = {
	.driver_module		= THIS_MODULE,
	.read_raw		= mxs_lradc_read_raw,
1075 1076
	.write_raw		= mxs_lradc_write_raw,
	.write_raw_get_fmt	= mxs_lradc_write_raw_get_fmt,
1077
	.attrs			= &mxs_lradc_attribute_group,
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};

1080 1081 1082 1083 1084
static int mxs_lradc_ts_open(struct input_dev *dev)
{
	struct mxs_lradc *lradc = input_get_drvdata(dev);

	/* Enable the touch-detect circuitry. */
1085
	mxs_lradc_enable_touch_detection(lradc);
1086 1087 1088 1089

	return 0;
}

1090
static void mxs_lradc_disable_ts(struct mxs_lradc *lradc)
1091
{
1092 1093
	/* stop all interrupts from firing */
	mxs_lradc_reg_clear(lradc, LRADC_CTRL1_TOUCH_DETECT_IRQ_EN |
1094 1095
		LRADC_CTRL1_LRADC_IRQ_EN(TOUCHSCREEN_VCHANNEL1) |
		LRADC_CTRL1_LRADC_IRQ_EN(TOUCHSCREEN_VCHANNEL2), LRADC_CTRL1);
1096

1097 1098 1099
	/* Power-down touchscreen touch-detect circuitry. */
	mxs_lradc_reg_clear(lradc, mxs_lradc_plate_mask(lradc), LRADC_CTRL0);
}
1100

1101 1102 1103
static void mxs_lradc_ts_close(struct input_dev *dev)
{
	struct mxs_lradc *lradc = input_get_drvdata(dev);
1104

1105
	mxs_lradc_disable_ts(lradc);
1106 1107 1108 1109 1110 1111 1112 1113 1114 1115 1116 1117
}

static int mxs_lradc_ts_register(struct mxs_lradc *lradc)
{
	struct input_dev *input;
	struct device *dev = lradc->dev;
	int ret;

	if (!lradc->use_touchscreen)
		return 0;

	input = input_allocate_device();
1118
	if (!input)
1119 1120 1121 1122 1123 1124 1125 1126 1127 1128 1129
		return -ENOMEM;

	input->name = DRIVER_NAME;
	input->id.bustype = BUS_HOST;
	input->dev.parent = dev;
	input->open = mxs_lradc_ts_open;
	input->close = mxs_lradc_ts_close;

	__set_bit(EV_ABS, input->evbit);
	__set_bit(EV_KEY, input->evbit);
	__set_bit(BTN_TOUCH, input->keybit);
1130 1131 1132 1133
	input_set_abs_params(input, ABS_X, 0, LRADC_SINGLE_SAMPLE_MASK, 0, 0);
	input_set_abs_params(input, ABS_Y, 0, LRADC_SINGLE_SAMPLE_MASK, 0, 0);
	input_set_abs_params(input, ABS_PRESSURE, 0, LRADC_SINGLE_SAMPLE_MASK,
			     0, 0);
1134 1135 1136 1137 1138 1139 1140 1141 1142 1143 1144 1145 1146 1147 1148

	lradc->ts_input = input;
	input_set_drvdata(input, lradc);
	ret = input_register_device(input);
	if (ret)
		input_free_device(lradc->ts_input);

	return ret;
}

static void mxs_lradc_ts_unregister(struct mxs_lradc *lradc)
{
	if (!lradc->use_touchscreen)
		return;

1149
	mxs_lradc_disable_ts(lradc);
1150 1151 1152
	input_unregister_device(lradc->ts_input);
}

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/*
 * IRQ Handling
 */
static irqreturn_t mxs_lradc_handle_irq(int irq, void *data)
{
	struct iio_dev *iio = data;
	struct mxs_lradc *lradc = iio_priv(iio);
	unsigned long reg = readl(lradc->base + LRADC_CTRL1);
1161 1162
	u32 clr_irq = mxs_lradc_irq_mask(lradc);
	const u32 ts_irq_mask =
1163
		LRADC_CTRL1_TOUCH_DETECT_IRQ |
1164 1165
		LRADC_CTRL1_LRADC_IRQ(TOUCHSCREEN_VCHANNEL1) |
		LRADC_CTRL1_LRADC_IRQ(TOUCHSCREEN_VCHANNEL2);
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1167
	if (!(reg & mxs_lradc_irq_mask(lradc)))
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		return IRQ_NONE;

1170
	if (lradc->use_touchscreen && (reg & ts_irq_mask)) {
1171
		mxs_lradc_handle_touch(lradc);
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1173 1174 1175 1176 1177
		/* Make sure we don't clear the next conversion's interrupt. */
		clr_irq &= ~(LRADC_CTRL1_LRADC_IRQ(TOUCHSCREEN_VCHANNEL1) |
				LRADC_CTRL1_LRADC_IRQ(TOUCHSCREEN_VCHANNEL2));
	}

1178 1179 1180 1181
	if (iio_buffer_enabled(iio)) {
		if (reg & lradc->buffer_vchans)
			iio_trigger_poll(iio->trig);
	} else if (reg & LRADC_CTRL1_LRADC_IRQ(0)) {
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		complete(&lradc->completion);
1183
	}
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1185
	mxs_lradc_reg_clear(lradc, reg & clr_irq, LRADC_CTRL1);
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	return IRQ_HANDLED;
}

/*
 * Trigger handling
 */
static irqreturn_t mxs_lradc_trigger_handler(int irq, void *p)
{
	struct iio_poll_func *pf = p;
	struct iio_dev *iio = pf->indio_dev;
	struct mxs_lradc *lradc = iio_priv(iio);
1198
	const u32 chan_value = LRADC_CH_ACCUMULATE |
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		((LRADC_DELAY_TIMER_LOOP - 1) << LRADC_CH_NUM_SAMPLES_OFFSET);
1200
	unsigned int i, j = 0;
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1202
	for_each_set_bit(i, iio->active_scan_mask, LRADC_MAX_TOTAL_CHANS) {
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		lradc->buffer[j] = readl(lradc->base + LRADC_CH(j));
1204
		mxs_lradc_reg_wrt(lradc, chan_value, LRADC_CH(j));
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		lradc->buffer[j] &= LRADC_CH_VALUE_MASK;
		lradc->buffer[j] /= LRADC_DELAY_TIMER_LOOP;
		j++;
	}

1210
	iio_push_to_buffers_with_timestamp(iio, lradc->buffer, pf->timestamp);
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	iio_trigger_notify_done(iio->trig);

	return IRQ_HANDLED;
}

static int mxs_lradc_configure_trigger(struct iio_trigger *trig, bool state)
{
1219
	struct iio_dev *iio = iio_trigger_get_drvdata(trig);
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	struct mxs_lradc *lradc = iio_priv(iio);
1221
	const u32 st = state ? STMP_OFFSET_REG_SET : STMP_OFFSET_REG_CLR;
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1223
	mxs_lradc_reg_wrt(lradc, LRADC_DELAY_KICK, LRADC_DELAY(0) + st);
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	return 0;
}

static const struct iio_trigger_ops mxs_lradc_trigger_ops = {
	.owner = THIS_MODULE,
	.set_trigger_state = &mxs_lradc_configure_trigger,
};

static int mxs_lradc_trigger_init(struct iio_dev *iio)
{
	int ret;
	struct iio_trigger *trig;
1237
	struct mxs_lradc *lradc = iio_priv(iio);
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	trig = iio_trigger_alloc("%s-dev%i", iio->name, iio->id);
1240
	if (!trig)
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		return -ENOMEM;

1243
	trig->dev.parent = lradc->dev;
1244
	iio_trigger_set_drvdata(trig, iio);
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	trig->ops = &mxs_lradc_trigger_ops;

	ret = iio_trigger_register(trig);
	if (ret) {
		iio_trigger_free(trig);
		return ret;
	}

1253
	lradc->trig = trig;
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	return 0;
}

static void mxs_lradc_trigger_remove(struct iio_dev *iio)
{
1260 1261 1262 1263
	struct mxs_lradc *lradc = iio_priv(iio);

	iio_trigger_unregister(lradc->trig);
	iio_trigger_free(lradc->trig);
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}

static int mxs_lradc_buffer_preenable(struct iio_dev *iio)
{
	struct mxs_lradc *lradc = iio_priv(iio);
1269 1270
	int ret = 0, chan, ofs = 0;
	unsigned long enable = 0;
1271 1272 1273 1274
	u32 ctrl4_set = 0;
	u32 ctrl4_clr = 0;
	u32 ctrl1_irq = 0;
	const u32 chan_value = LRADC_CH_ACCUMULATE |
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		((LRADC_DELAY_TIMER_LOOP - 1) << LRADC_CH_NUM_SAMPLES_OFFSET);
1276 1277
	const int len = bitmap_weight(iio->active_scan_mask,
			LRADC_MAX_TOTAL_CHANS);
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	if (!len)
		return -EINVAL;

	/*
	 * Lock the driver so raw access can not be done during buffered
	 * operation. This simplifies the code a lot.
	 */
	ret = mutex_trylock(&lradc->lock);
	if (!ret)
		return -EBUSY;

1290
	lradc->buffer = kmalloc_array(len, sizeof(*lradc->buffer), GFP_KERNEL);
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	if (!lradc->buffer) {
		ret = -ENOMEM;
		goto err_mem;
	}

1296
	if (lradc->soc == IMX28_LRADC)
1297 1298
		mxs_lradc_reg_clear(
			lradc,
1299 1300
			lradc->buffer_vchans << LRADC_CTRL1_LRADC_IRQ_EN_OFFSET,
			LRADC_CTRL1);
1301
	mxs_lradc_reg_clear(lradc, lradc->buffer_vchans, LRADC_CTRL0);
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1303
	for_each_set_bit(chan, iio->active_scan_mask, LRADC_MAX_TOTAL_CHANS) {
1304 1305
		ctrl4_set |= chan << LRADC_CTRL4_LRADCSELECT_OFFSET(ofs);
		ctrl4_clr |= LRADC_CTRL4_LRADCSELECT_MASK(ofs);
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		ctrl1_irq |= LRADC_CTRL1_LRADC_IRQ_EN(ofs);
1307
		mxs_lradc_reg_wrt(lradc, chan_value, LRADC_CH(ofs));
1308
		bitmap_set(&enable, ofs, 1);
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		ofs++;
1310
	}
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1312
	mxs_lradc_reg_clear(lradc, LRADC_DELAY_TRIGGER_LRADCS_MASK |
1313
			    LRADC_DELAY_KICK, LRADC_DELAY(0));
1314 1315 1316 1317
	mxs_lradc_reg_clear(lradc, ctrl4_clr, LRADC_CTRL4);
	mxs_lradc_reg_set(lradc, ctrl4_set, LRADC_CTRL4);
	mxs_lradc_reg_set(lradc, ctrl1_irq, LRADC_CTRL1);
	mxs_lradc_reg_set(lradc, enable << LRADC_DELAY_TRIGGER_LRADCS_OFFSET,
1318
			  LRADC_DELAY(0));
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	return 0;

err_mem:
	mutex_unlock(&lradc->lock);
	return ret;
}

static int mxs_lradc_buffer_postdisable(struct iio_dev *iio)
{
	struct mxs_lradc *lradc = iio_priv(iio);

1331
	mxs_lradc_reg_clear(lradc, LRADC_DELAY_TRIGGER_LRADCS_MASK |
1332
			    LRADC_DELAY_KICK, LRADC_DELAY(0));
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1334
	mxs_lradc_reg_clear(lradc, lradc->buffer_vchans, LRADC_CTRL0);
1335
	if (lradc->soc == IMX28_LRADC)
1336 1337
		mxs_lradc_reg_clear(
			lradc,
1338 1339
			lradc->buffer_vchans << LRADC_CTRL1_LRADC_IRQ_EN_OFFSET,
			LRADC_CTRL1);
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	kfree(lradc->buffer);
	mutex_unlock(&lradc->lock);

	return 0;
}

static bool mxs_lradc_validate_scan_mask(struct iio_dev *iio,
1348
					 const unsigned long *mask)
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{
1350
	struct mxs_lradc *lradc = iio_priv(iio);
1351
	const int map_chans = bitmap_weight(mask, LRADC_MAX_TOTAL_CHANS);
1352 1353 1354 1355 1356 1357 1358 1359 1360 1361 1362 1363 1364
	int rsvd_chans = 0;
	unsigned long rsvd_mask = 0;

	if (lradc->use_touchbutton)
		rsvd_mask |= CHAN_MASK_TOUCHBUTTON;
	if (lradc->use_touchscreen == MXS_LRADC_TOUCHSCREEN_4WIRE)
		rsvd_mask |= CHAN_MASK_TOUCHSCREEN_4WIRE;
	if (lradc->use_touchscreen == MXS_LRADC_TOUCHSCREEN_5WIRE)
		rsvd_mask |= CHAN_MASK_TOUCHSCREEN_5WIRE;

	if (lradc->use_touchbutton)
		rsvd_chans++;
	if (lradc->use_touchscreen)
1365
		rsvd_chans += 2;
1366 1367

	/* Test for attempts to map channels with special mode of operation. */
1368
	if (bitmap_intersects(mask, &rsvd_mask, LRADC_MAX_TOTAL_CHANS))
1369 1370 1371 1372 1373 1374 1375
		return false;

	/* Test for attempts to map more channels then available slots. */
	if (map_chans + rsvd_chans > LRADC_MAX_MAPPED_CHANS)
		return false;

	return true;
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}

static const struct iio_buffer_setup_ops mxs_lradc_buffer_ops = {
	.preenable = &mxs_lradc_buffer_preenable,
	.postenable = &iio_triggered_buffer_postenable,
	.predisable = &iio_triggered_buffer_predisable,
	.postdisable = &mxs_lradc_buffer_postdisable,
	.validate_scan_mask = &mxs_lradc_validate_scan_mask,
};

/*
 * Driver initialization
 */

1390
#define MXS_ADC_CHAN(idx, chan_type, name) {			\
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	.type = (chan_type),					\
	.indexed = 1,						\
	.scan_index = (idx),					\
1394 1395
	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |		\
			      BIT(IIO_CHAN_INFO_SCALE),		\
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	.channel = (idx),					\
1397
	.address = (idx),					\
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	.scan_type = {						\
		.sign = 'u',					\
1400
		.realbits = LRADC_RESOLUTION,			\
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		.storagebits = 32,				\
	},							\
1403
	.datasheet_name = (name),				\
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}

1406 1407 1408 1409 1410 1411 1412 1413 1414
static const struct iio_chan_spec mx23_lradc_chan_spec[] = {
	MXS_ADC_CHAN(0, IIO_VOLTAGE, "LRADC0"),
	MXS_ADC_CHAN(1, IIO_VOLTAGE, "LRADC1"),
	MXS_ADC_CHAN(2, IIO_VOLTAGE, "LRADC2"),
	MXS_ADC_CHAN(3, IIO_VOLTAGE, "LRADC3"),
	MXS_ADC_CHAN(4, IIO_VOLTAGE, "LRADC4"),
	MXS_ADC_CHAN(5, IIO_VOLTAGE, "LRADC5"),
	MXS_ADC_CHAN(6, IIO_VOLTAGE, "VDDIO"),
	MXS_ADC_CHAN(7, IIO_VOLTAGE, "VBATT"),
1415 1416 1417 1418 1419 1420 1421 1422 1423 1424
	/* Combined Temperature sensors */
	{
		.type = IIO_TEMP,
		.indexed = 1,
		.scan_index = 8,
		.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
				      BIT(IIO_CHAN_INFO_OFFSET) |
				      BIT(IIO_CHAN_INFO_SCALE),
		.channel = 8,
		.scan_type = {.sign = 'u', .realbits = 18, .storagebits = 32,},
1425
		.datasheet_name = "TEMP_DIE",
1426
	},
1427 1428 1429 1430 1431 1432 1433
	/* Hidden channel to keep indexes */
	{
		.type = IIO_TEMP,
		.indexed = 1,
		.scan_index = -1,
		.channel = 9,
	},
1434 1435 1436 1437 1438 1439 1440 1441 1442 1443 1444 1445 1446 1447 1448 1449 1450 1451 1452 1453 1454 1455 1456 1457 1458 1459 1460 1461 1462 1463 1464 1465 1466 1467 1468 1469 1470 1471 1472 1473 1474 1475
	MXS_ADC_CHAN(10, IIO_VOLTAGE, NULL),
	MXS_ADC_CHAN(11, IIO_VOLTAGE, NULL),
	MXS_ADC_CHAN(12, IIO_VOLTAGE, "USB_DP"),
	MXS_ADC_CHAN(13, IIO_VOLTAGE, "USB_DN"),
	MXS_ADC_CHAN(14, IIO_VOLTAGE, "VBG"),
	MXS_ADC_CHAN(15, IIO_VOLTAGE, "VDD5V"),
};

static const struct iio_chan_spec mx28_lradc_chan_spec[] = {
	MXS_ADC_CHAN(0, IIO_VOLTAGE, "LRADC0"),
	MXS_ADC_CHAN(1, IIO_VOLTAGE, "LRADC1"),
	MXS_ADC_CHAN(2, IIO_VOLTAGE, "LRADC2"),
	MXS_ADC_CHAN(3, IIO_VOLTAGE, "LRADC3"),
	MXS_ADC_CHAN(4, IIO_VOLTAGE, "LRADC4"),
	MXS_ADC_CHAN(5, IIO_VOLTAGE, "LRADC5"),
	MXS_ADC_CHAN(6, IIO_VOLTAGE, "LRADC6"),
	MXS_ADC_CHAN(7, IIO_VOLTAGE, "VBATT"),
	/* Combined Temperature sensors */
	{
		.type = IIO_TEMP,
		.indexed = 1,
		.scan_index = 8,
		.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
				      BIT(IIO_CHAN_INFO_OFFSET) |
				      BIT(IIO_CHAN_INFO_SCALE),
		.channel = 8,
		.scan_type = {.sign = 'u', .realbits = 18, .storagebits = 32,},
		.datasheet_name = "TEMP_DIE",
	},
	/* Hidden channel to keep indexes */
	{
		.type = IIO_TEMP,
		.indexed = 1,
		.scan_index = -1,
		.channel = 9,
	},
	MXS_ADC_CHAN(10, IIO_VOLTAGE, "VDDIO"),
	MXS_ADC_CHAN(11, IIO_VOLTAGE, "VTH"),
	MXS_ADC_CHAN(12, IIO_VOLTAGE, "VDDA"),
	MXS_ADC_CHAN(13, IIO_VOLTAGE, "VDDD"),
	MXS_ADC_CHAN(14, IIO_VOLTAGE, "VBG"),
	MXS_ADC_CHAN(15, IIO_VOLTAGE, "VDD5V"),
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};

1478
static int mxs_lradc_hw_init(struct mxs_lradc *lradc)
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{
1480
	/* The ADC always uses DELAY CHANNEL 0. */
1481
	const u32 adc_cfg =
1482
		(1 << (LRADC_DELAY_TRIGGER_DELAYS_OFFSET + 0)) |
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		(LRADC_DELAY_TIMER_PER << LRADC_DELAY_DELAY_OFFSET);

1485
	int ret = stmp_reset_block(lradc->base);
1486

1487 1488
	if (ret)
		return ret;
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1490
	/* Configure DELAY CHANNEL 0 for generic ADC sampling. */
1491
	mxs_lradc_reg_wrt(lradc, adc_cfg, LRADC_DELAY(0));
1492 1493

	/* Disable remaining DELAY CHANNELs */
1494 1495 1496
	mxs_lradc_reg_wrt(lradc, 0, LRADC_DELAY(1));
	mxs_lradc_reg_wrt(lradc, 0, LRADC_DELAY(2));
	mxs_lradc_reg_wrt(lradc, 0, LRADC_DELAY(3));
1497 1498

	/* Configure the touchscreen type */
1499 1500
	if (lradc->soc == IMX28_LRADC) {
		mxs_lradc_reg_clear(lradc, LRADC_CTRL0_MX28_TOUCH_SCREEN_TYPE,
1501
				    LRADC_CTRL0);
1502

1503 1504 1505 1506
		if (lradc->use_touchscreen == MXS_LRADC_TOUCHSCREEN_5WIRE)
			mxs_lradc_reg_set(lradc,
					  LRADC_CTRL0_MX28_TOUCH_SCREEN_TYPE,
					  LRADC_CTRL0);
1507
	}
M
Marek Vasut 已提交
1508 1509

	/* Start internal temperature sensing. */
1510
	mxs_lradc_reg_wrt(lradc, 0, LRADC_CTRL2);
1511 1512

	return 0;
M
Marek Vasut 已提交
1513 1514 1515 1516 1517 1518
}

static void mxs_lradc_hw_stop(struct mxs_lradc *lradc)
{
	int i;

1519
	mxs_lradc_reg_clear(lradc, mxs_lradc_irq_en_mask(lradc), LRADC_CTRL1);
M
Marek Vasut 已提交
1520 1521

	for (i = 0; i < LRADC_MAX_DELAY_CHANS; i++)
1522
		mxs_lradc_reg_wrt(lradc, 0, LRADC_DELAY(i));
M
Marek Vasut 已提交
1523 1524
}

1525 1526 1527 1528 1529 1530 1531
static const struct of_device_id mxs_lradc_dt_ids[] = {
	{ .compatible = "fsl,imx23-lradc", .data = (void *)IMX23_LRADC, },
	{ .compatible = "fsl,imx28-lradc", .data = (void *)IMX28_LRADC, },
	{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, mxs_lradc_dt_ids);

1532
static int mxs_lradc_probe_touchscreen(struct mxs_lradc *lradc,
1533
				       struct device_node *lradc_node)
1534
{
1535 1536 1537 1538
	int ret;
	u32 ts_wires = 0, adapt;

	ret = of_property_read_u32(lradc_node, "fsl,lradc-touchscreen-wires",
1539
				   &ts_wires);
1540 1541 1542 1543 1544 1545 1546 1547 1548 1549 1550 1551 1552 1553 1554 1555 1556 1557 1558 1559
	if (ret)
		return -ENODEV; /* touchscreen feature disabled */

	switch (ts_wires) {
	case 4:
		lradc->use_touchscreen = MXS_LRADC_TOUCHSCREEN_4WIRE;
		break;
	case 5:
		if (lradc->soc == IMX28_LRADC) {
			lradc->use_touchscreen = MXS_LRADC_TOUCHSCREEN_5WIRE;
			break;
		}
		/* fall through an error message for i.MX23 */
	default:
		dev_err(lradc->dev,
			"Unsupported number of touchscreen wires (%d)\n",
			ts_wires);
		return -EINVAL;
	}

1560 1561 1562 1563 1564 1565 1566 1567
	if (of_property_read_u32(lradc_node, "fsl,ave-ctrl", &adapt)) {
		lradc->over_sample_cnt = 4;
	} else {
		if (adapt < 1 || adapt > 32) {
			dev_err(lradc->dev, "Invalid sample count (%u)\n",
				adapt);
			return -EINVAL;
		}
1568
		lradc->over_sample_cnt = adapt;
1569
	}
1570

1571 1572 1573 1574 1575 1576 1577 1578
	if (of_property_read_u32(lradc_node, "fsl,ave-delay", &adapt)) {
		lradc->over_sample_delay = 2;
	} else {
		if (adapt < 2 || adapt > LRADC_DELAY_DELAY_MASK + 1) {
			dev_err(lradc->dev, "Invalid sample delay (%u)\n",
				adapt);
			return -EINVAL;
		}
1579
		lradc->over_sample_delay = adapt;
1580
	}
1581

1582 1583 1584 1585 1586 1587 1588 1589
	if (of_property_read_u32(lradc_node, "fsl,settling", &adapt)) {
		lradc->settling_delay = 10;
	} else {
		if (adapt < 1 || adapt > LRADC_DELAY_DELAY_MASK) {
			dev_err(lradc->dev, "Invalid settling delay (%u)\n",
				adapt);
			return -EINVAL;
		}
1590
		lradc->settling_delay = adapt;
1591
	}
1592 1593 1594 1595

	return 0;
}

1596
static int mxs_lradc_probe(struct platform_device *pdev)
M
Marek Vasut 已提交
1597
{
1598 1599 1600 1601
	const struct of_device_id *of_id =
		of_match_device(mxs_lradc_dt_ids, &pdev->dev);
	const struct mxs_lradc_of_config *of_cfg =
		&mxs_lradc_of_config[(enum mxs_lradc_id)of_id->data];
M
Marek Vasut 已提交
1602
	struct device *dev = &pdev->dev;
1603
	struct device_node *node = dev->of_node;
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1604 1605 1606
	struct mxs_lradc *lradc;
	struct iio_dev *iio;
	struct resource *iores;
1607
	int ret = 0, touch_ret;
1608
	int i, s;
1609
	u64 scale_uv;
M
Marek Vasut 已提交
1610 1611

	/* Allocate the IIO device. */
1612
	iio = devm_iio_device_alloc(dev, sizeof(*lradc));
M
Marek Vasut 已提交
1613 1614 1615 1616 1617 1618
	if (!iio) {
		dev_err(dev, "Failed to allocate IIO device\n");
		return -ENOMEM;
	}

	lradc = iio_priv(iio);
1619
	lradc->soc = (enum mxs_lradc_id)of_id->data;
M
Marek Vasut 已提交
1620 1621 1622 1623

	/* Grab the memory area */
	iores = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	lradc->dev = &pdev->dev;
1624
	lradc->base = devm_ioremap_resource(dev, iores);
1625 1626
	if (IS_ERR(lradc->base))
		return PTR_ERR(lradc->base);
M
Marek Vasut 已提交
1627

1628 1629 1630 1631 1632 1633 1634 1635 1636 1637 1638
	lradc->clk = devm_clk_get(&pdev->dev, NULL);
	if (IS_ERR(lradc->clk)) {
		dev_err(dev, "Failed to get the delay unit clock\n");
		return PTR_ERR(lradc->clk);
	}
	ret = clk_prepare_enable(lradc->clk);
	if (ret != 0) {
		dev_err(dev, "Failed to enable the delay unit clock\n");
		return ret;
	}

1639
	touch_ret = mxs_lradc_probe_touchscreen(lradc, node);
1640

1641 1642 1643 1644 1645
	if (touch_ret == 0)
		lradc->buffer_vchans = BUFFER_VCHANS_LIMITED;
	else
		lradc->buffer_vchans = BUFFER_VCHANS_ALL;

M
Marek Vasut 已提交
1646
	/* Grab all IRQ sources */
1647
	for (i = 0; i < of_cfg->irq_count; i++) {
M
Marek Vasut 已提交
1648
		lradc->irq[i] = platform_get_irq(pdev, i);
1649 1650 1651 1652
		if (lradc->irq[i] < 0) {
			ret = lradc->irq[i];
			goto err_clk;
		}
M
Marek Vasut 已提交
1653 1654

		ret = devm_request_irq(dev, lradc->irq[i],
1655 1656
				       mxs_lradc_handle_irq, 0,
				       of_cfg->irq_name[i], iio);
M
Marek Vasut 已提交
1657
		if (ret)
1658
			goto err_clk;
M
Marek Vasut 已提交
1659 1660
	}

1661 1662
	lradc->vref_mv = of_cfg->vref_mv;

M
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1663 1664 1665 1666 1667 1668 1669 1670 1671
	platform_set_drvdata(pdev, iio);

	init_completion(&lradc->completion);
	mutex_init(&lradc->lock);

	iio->name = pdev->name;
	iio->dev.parent = &pdev->dev;
	iio->info = &mxs_lradc_iio_info;
	iio->modes = INDIO_DIRECT_MODE;
1672
	iio->masklength = LRADC_MAX_TOTAL_CHANS;
M
Marek Vasut 已提交
1673

1674 1675 1676 1677 1678 1679 1680 1681
	if (lradc->soc == IMX23_LRADC) {
		iio->channels = mx23_lradc_chan_spec;
		iio->num_channels = ARRAY_SIZE(mx23_lradc_chan_spec);
	} else {
		iio->channels = mx28_lradc_chan_spec;
		iio->num_channels = ARRAY_SIZE(mx28_lradc_chan_spec);
	}

M
Marek Vasut 已提交
1682
	ret = iio_triggered_buffer_setup(iio, &iio_pollfunc_store_time,
1683 1684
					 &mxs_lradc_trigger_handler,
					 &mxs_lradc_buffer_ops);
M
Marek Vasut 已提交
1685
	if (ret)
1686
		goto err_clk;
M
Marek Vasut 已提交
1687 1688 1689 1690 1691

	ret = mxs_lradc_trigger_init(iio);
	if (ret)
		goto err_trig;

1692 1693 1694 1695 1696 1697 1698 1699 1700 1701 1702 1703 1704
	/* Populate available ADC input ranges */
	for (i = 0; i < LRADC_MAX_TOTAL_CHANS; i++) {
		for (s = 0; s < ARRAY_SIZE(lradc->scale_avail[i]); s++) {
			/*
			 * [s=0] = optional divider by two disabled (default)
			 * [s=1] = optional divider by two enabled
			 *
			 * The scale is calculated by doing:
			 *   Vref >> (realbits - s)
			 * which multiplies by two on the second component
			 * of the array.
			 */
			scale_uv = ((u64)lradc->vref_mv[i] * 100000000) >>
1705
				   (LRADC_RESOLUTION - s);
1706 1707 1708 1709 1710 1711
			lradc->scale_avail[i][s].nano =
					do_div(scale_uv, 100000000) * 10;
			lradc->scale_avail[i][s].integer = scale_uv;
		}
	}

1712
	/* Configure the hardware. */
1713 1714 1715
	ret = mxs_lradc_hw_init(lradc);
	if (ret)
		goto err_dev;
1716

1717
	/* Register the touchscreen input device. */
1718 1719 1720 1721 1722
	if (touch_ret == 0) {
		ret = mxs_lradc_ts_register(lradc);
		if (ret)
			goto err_ts_register;
	}
1723

M
Marek Vasut 已提交
1724 1725 1726 1727
	/* Register IIO device. */
	ret = iio_device_register(iio);
	if (ret) {
		dev_err(dev, "Failed to register IIO device\n");
1728
		goto err_ts;
M
Marek Vasut 已提交
1729 1730 1731 1732
	}

	return 0;

1733 1734
err_ts:
	mxs_lradc_ts_unregister(lradc);
1735 1736
err_ts_register:
	mxs_lradc_hw_stop(lradc);
M
Marek Vasut 已提交
1737 1738 1739 1740
err_dev:
	mxs_lradc_trigger_remove(iio);
err_trig:
	iio_triggered_buffer_cleanup(iio);
1741 1742
err_clk:
	clk_disable_unprepare(lradc->clk);
M
Marek Vasut 已提交
1743 1744 1745
	return ret;
}

1746
static int mxs_lradc_remove(struct platform_device *pdev)
M
Marek Vasut 已提交
1747 1748 1749 1750
{
	struct iio_dev *iio = platform_get_drvdata(pdev);
	struct mxs_lradc *lradc = iio_priv(iio);

1751
	iio_device_unregister(iio);
1752
	mxs_lradc_ts_unregister(lradc);
M
Marek Vasut 已提交
1753 1754
	mxs_lradc_hw_stop(lradc);
	mxs_lradc_trigger_remove(iio);
1755
	iio_triggered_buffer_cleanup(iio);
M
Marek Vasut 已提交
1756

1757
	clk_disable_unprepare(lradc->clk);
1758

M
Marek Vasut 已提交
1759 1760 1761 1762 1763 1764 1765 1766 1767
	return 0;
}

static struct platform_driver mxs_lradc_driver = {
	.driver	= {
		.name	= DRIVER_NAME,
		.of_match_table = mxs_lradc_dt_ids,
	},
	.probe	= mxs_lradc_probe,
1768
	.remove	= mxs_lradc_remove,
M
Marek Vasut 已提交
1769 1770 1771 1772 1773
};

module_platform_driver(mxs_lradc_driver);

MODULE_AUTHOR("Marek Vasut <marex@denx.de>");
1774
MODULE_DESCRIPTION("Freescale MXS LRADC driver");
M
Marek Vasut 已提交
1775
MODULE_LICENSE("GPL v2");
F
Fabio Estevam 已提交
1776
MODULE_ALIAS("platform:" DRIVER_NAME);