apply.c 34.5 KB
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/*
 * Copyright (C) 2011 Texas Instruments
 * Author: Tomi Valkeinen <tomi.valkeinen@ti.com>
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms of the GNU General Public License version 2 as published by
 * the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful, but WITHOUT
 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 * more details.
 *
 * You should have received a copy of the GNU General Public License along with
 * this program.  If not, see <http://www.gnu.org/licenses/>.
 */

#define DSS_SUBSYS_NAME "APPLY"

#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/slab.h>
#include <linux/spinlock.h>
#include <linux/jiffies.h>

#include <video/omapdss.h>

#include "dss.h"
#include "dss_features.h"
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#include "dispc-compat.h"
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/*
 * We have 4 levels of cache for the dispc settings. First two are in SW and
 * the latter two in HW.
 *
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 *       set_info()
 *          v
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 * +--------------------+
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 * |     user_info      |
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 * +--------------------+
 *          v
 *        apply()
 *          v
 * +--------------------+
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 * |       info         |
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 * +--------------------+
 *          v
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 *      write_regs()
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 *          v
 * +--------------------+
 * |  shadow registers  |
 * +--------------------+
 *          v
 * VFP or lcd/digit_enable
 *          v
 * +--------------------+
 * |      registers     |
 * +--------------------+
 */

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struct ovl_priv_data {
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	bool user_info_dirty;
	struct omap_overlay_info user_info;

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	bool info_dirty;
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	struct omap_overlay_info info;

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	bool shadow_info_dirty;

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	bool extra_info_dirty;
	bool shadow_extra_info_dirty;

	bool enabled;
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	u32 fifo_low, fifo_high;
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	/*
	 * True if overlay is to be enabled. Used to check and calculate configs
	 * for the overlay before it is enabled in the HW.
	 */
	bool enabling;
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};

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struct mgr_priv_data {
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	bool user_info_dirty;
	struct omap_overlay_manager_info user_info;

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	bool info_dirty;
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	struct omap_overlay_manager_info info;

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	bool shadow_info_dirty;

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	/* If true, GO bit is up and shadow registers cannot be written.
	 * Never true for manual update displays */
	bool busy;

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	/* If true, dispc output is enabled */
	bool updating;

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	/* If true, a display is enabled using this manager */
	bool enabled;
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	bool extra_info_dirty;
	bool shadow_extra_info_dirty;

	struct omap_video_timings timings;
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	struct dss_lcd_mgr_config lcd_config;
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	void (*framedone_handler)(void *);
	void *framedone_handler_data;
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};

static struct {
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	struct ovl_priv_data ovl_priv_data_array[MAX_DSS_OVERLAYS];
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	struct mgr_priv_data mgr_priv_data_array[MAX_DSS_MANAGERS];
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	bool irq_enabled;
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} dss_data;
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/* protects dss_data */
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static spinlock_t data_lock;
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/* lock for blocking functions */
static DEFINE_MUTEX(apply_lock);
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static DECLARE_COMPLETION(extra_updated_completion);
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static void dss_register_vsync_isr(void);

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static struct ovl_priv_data *get_ovl_priv(struct omap_overlay *ovl)
{
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	return &dss_data.ovl_priv_data_array[ovl->id];
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}

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static struct mgr_priv_data *get_mgr_priv(struct omap_overlay_manager *mgr)
{
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	return &dss_data.mgr_priv_data_array[mgr->id];
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}

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static void apply_init_priv(void)
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{
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	const int num_ovls = dss_feat_get_num_ovls();
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	struct mgr_priv_data *mp;
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	int i;

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	spin_lock_init(&data_lock);
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	for (i = 0; i < num_ovls; ++i) {
		struct ovl_priv_data *op;

		op = &dss_data.ovl_priv_data_array[i];

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		op->info.color_mode = OMAP_DSS_COLOR_RGB16;
		op->info.rotation_type = OMAP_DSS_ROT_DMA;

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		op->info.global_alpha = 255;

		switch (i) {
		case 0:
			op->info.zorder = 0;
			break;
		case 1:
			op->info.zorder =
				dss_has_feature(FEAT_ALPHA_FREE_ZORDER) ? 3 : 0;
			break;
		case 2:
			op->info.zorder =
				dss_has_feature(FEAT_ALPHA_FREE_ZORDER) ? 2 : 0;
			break;
		case 3:
			op->info.zorder =
				dss_has_feature(FEAT_ALPHA_FREE_ZORDER) ? 1 : 0;
			break;
		}

		op->user_info = op->info;
	}
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	/*
	 * Initialize some of the lcd_config fields for TV manager, this lets
	 * us prevent checking if the manager is LCD or TV at some places
	 */
	mp = &dss_data.mgr_priv_data_array[OMAP_DSS_CHANNEL_DIGIT];

	mp->lcd_config.video_port_width = 24;
	mp->lcd_config.clock_info.lck_div = 1;
	mp->lcd_config.clock_info.pck_div = 1;
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}

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/*
 * A LCD manager's stallmode decides whether it is in manual or auto update. TV
 * manager is always auto update, stallmode field for TV manager is false by
 * default
 */
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static bool ovl_manual_update(struct omap_overlay *ovl)
{
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	struct mgr_priv_data *mp = get_mgr_priv(ovl->manager);

	return mp->lcd_config.stallmode;
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}

static bool mgr_manual_update(struct omap_overlay_manager *mgr)
{
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	struct mgr_priv_data *mp = get_mgr_priv(mgr);

	return mp->lcd_config.stallmode;
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}

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static int dss_check_settings_low(struct omap_overlay_manager *mgr,
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		bool applying)
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{
	struct omap_overlay_info *oi;
	struct omap_overlay_manager_info *mi;
	struct omap_overlay *ovl;
	struct omap_overlay_info *ois[MAX_DSS_OVERLAYS];
	struct ovl_priv_data *op;
	struct mgr_priv_data *mp;

	mp = get_mgr_priv(mgr);

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	if (!mp->enabled)
		return 0;

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	if (applying && mp->user_info_dirty)
		mi = &mp->user_info;
	else
		mi = &mp->info;

	/* collect the infos to be tested into the array */
	list_for_each_entry(ovl, &mgr->overlays, list) {
		op = get_ovl_priv(ovl);

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		if (!op->enabled && !op->enabling)
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			oi = NULL;
		else if (applying && op->user_info_dirty)
			oi = &op->user_info;
		else
			oi = &op->info;

		ois[ovl->id] = oi;
	}

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	return dss_mgr_check(mgr, mi, &mp->timings, &mp->lcd_config, ois);
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}

/*
 * check manager and overlay settings using overlay_info from data->info
 */
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static int dss_check_settings(struct omap_overlay_manager *mgr)
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{
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	return dss_check_settings_low(mgr, false);
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}

/*
 * check manager and overlay settings using overlay_info from ovl->info if
 * dirty and from data->info otherwise
 */
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static int dss_check_settings_apply(struct omap_overlay_manager *mgr)
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{
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	return dss_check_settings_low(mgr, true);
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}

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static bool need_isr(void)
{
	const int num_mgrs = dss_feat_get_num_mgrs();
	int i;

	for (i = 0; i < num_mgrs; ++i) {
		struct omap_overlay_manager *mgr;
		struct mgr_priv_data *mp;
		struct omap_overlay *ovl;

		mgr = omap_dss_get_overlay_manager(i);
		mp = get_mgr_priv(mgr);

		if (!mp->enabled)
			continue;

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		if (mgr_manual_update(mgr)) {
			/* to catch FRAMEDONE */
			if (mp->updating)
				return true;
		} else {
			/* to catch GO bit going down */
			if (mp->busy)
				return true;
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			/* to write new values to registers */
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			if (mp->info_dirty)
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				return true;
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			/* to set GO bit */
			if (mp->shadow_info_dirty)
				return true;

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			/*
			 * NOTE: we don't check extra_info flags for disabled
			 * managers, once the manager is enabled, the extra_info
			 * related manager changes will be taken in by HW.
			 */

			/* to write new values to registers */
			if (mp->extra_info_dirty)
				return true;

			/* to set GO bit */
			if (mp->shadow_extra_info_dirty)
				return true;

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			list_for_each_entry(ovl, &mgr->overlays, list) {
				struct ovl_priv_data *op;
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				op = get_ovl_priv(ovl);
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				/*
				 * NOTE: we check extra_info flags even for
				 * disabled overlays, as extra_infos need to be
				 * always written.
				 */

				/* to write new values to registers */
				if (op->extra_info_dirty)
					return true;

				/* to set GO bit */
				if (op->shadow_extra_info_dirty)
					return true;

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				if (!op->enabled)
					continue;
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				/* to write new values to registers */
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				if (op->info_dirty)
					return true;

				/* to set GO bit */
				if (op->shadow_info_dirty)
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					return true;
			}
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		}
	}

	return false;
}

static bool need_go(struct omap_overlay_manager *mgr)
{
	struct omap_overlay *ovl;
	struct mgr_priv_data *mp;
	struct ovl_priv_data *op;

	mp = get_mgr_priv(mgr);

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	if (mp->shadow_info_dirty || mp->shadow_extra_info_dirty)
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		return true;

	list_for_each_entry(ovl, &mgr->overlays, list) {
		op = get_ovl_priv(ovl);
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		if (op->shadow_info_dirty || op->shadow_extra_info_dirty)
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			return true;
	}

	return false;
}

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/* returns true if an extra_info field is currently being updated */
static bool extra_info_update_ongoing(void)
{
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	const int num_mgrs = dss_feat_get_num_mgrs();
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	int i;

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	for (i = 0; i < num_mgrs; ++i) {
		struct omap_overlay_manager *mgr;
		struct omap_overlay *ovl;
		struct mgr_priv_data *mp;
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		mgr = omap_dss_get_overlay_manager(i);
		mp = get_mgr_priv(mgr);
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		if (!mp->enabled)
			continue;

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		if (!mp->updating)
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			continue;

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		if (mp->extra_info_dirty || mp->shadow_extra_info_dirty)
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			return true;
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		list_for_each_entry(ovl, &mgr->overlays, list) {
			struct ovl_priv_data *op = get_ovl_priv(ovl);

			if (op->extra_info_dirty || op->shadow_extra_info_dirty)
				return true;
		}
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	}

	return false;
}

/* wait until no extra_info updates are pending */
static void wait_pending_extra_info_updates(void)
{
	bool updating;
	unsigned long flags;
	unsigned long t;
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	int r;
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	spin_lock_irqsave(&data_lock, flags);

	updating = extra_info_update_ongoing();

	if (!updating) {
		spin_unlock_irqrestore(&data_lock, flags);
		return;
	}

	init_completion(&extra_updated_completion);

	spin_unlock_irqrestore(&data_lock, flags);

	t = msecs_to_jiffies(500);
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	r = wait_for_completion_timeout(&extra_updated_completion, t);
	if (r == 0)
		DSSWARN("timeout in wait_pending_extra_info_updates\n");
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}

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static struct omap_dss_device *dss_mgr_get_device(struct omap_overlay_manager *mgr)
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{
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	struct omap_dss_device *dssdev;

	dssdev = mgr->output;
	if (dssdev == NULL)
		return NULL;

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	while (dssdev->dst)
		dssdev = dssdev->dst;
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	if (dssdev->driver)
		return dssdev;
	else
		return NULL;
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}

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static struct omap_dss_device *dss_ovl_get_device(struct omap_overlay *ovl)
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{
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	return ovl->manager ? dss_mgr_get_device(ovl->manager) : NULL;
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}

static int dss_mgr_wait_for_vsync(struct omap_overlay_manager *mgr)
{
	unsigned long timeout = msecs_to_jiffies(500);
	u32 irq;
	int r;

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	if (mgr->output == NULL)
		return -ENODEV;

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	r = dispc_runtime_get();
	if (r)
		return r;

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	switch (mgr->output->id) {
	case OMAP_DSS_OUTPUT_VENC:
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		irq = DISPC_IRQ_EVSYNC_ODD;
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		break;
	case OMAP_DSS_OUTPUT_HDMI:
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		irq = DISPC_IRQ_EVSYNC_EVEN;
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		break;
	default:
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		irq = dispc_mgr_get_vsync_irq(mgr->id);
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		break;
	}
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	r = omap_dispc_wait_for_irq_interruptible_timeout(irq, timeout);

	dispc_runtime_put();

	return r;
}

static int dss_mgr_wait_for_go(struct omap_overlay_manager *mgr)
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{
	unsigned long timeout = msecs_to_jiffies(500);
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	struct mgr_priv_data *mp = get_mgr_priv(mgr);
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	u32 irq;
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	unsigned long flags;
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	int r;
	int i;

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	spin_lock_irqsave(&data_lock, flags);

	if (mgr_manual_update(mgr)) {
		spin_unlock_irqrestore(&data_lock, flags);
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		return 0;
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	}
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	if (!mp->enabled) {
		spin_unlock_irqrestore(&data_lock, flags);
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		return 0;
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	}

	spin_unlock_irqrestore(&data_lock, flags);
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	r = dispc_runtime_get();
	if (r)
		return r;

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	irq = dispc_mgr_get_vsync_irq(mgr->id);
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	i = 0;
	while (1) {
		bool shadow_dirty, dirty;

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		spin_lock_irqsave(&data_lock, flags);
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		dirty = mp->info_dirty;
		shadow_dirty = mp->shadow_info_dirty;
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		spin_unlock_irqrestore(&data_lock, flags);
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		if (!dirty && !shadow_dirty) {
			r = 0;
			break;
		}

		/* 4 iterations is the worst case:
		 * 1 - initial iteration, dirty = true (between VFP and VSYNC)
		 * 2 - first VSYNC, dirty = true
		 * 3 - dirty = false, shadow_dirty = true
		 * 4 - shadow_dirty = false */
		if (i++ == 3) {
			DSSERR("mgr(%d)->wait_for_go() not finishing\n",
					mgr->id);
			r = 0;
			break;
		}

		r = omap_dispc_wait_for_irq_interruptible_timeout(irq, timeout);
		if (r == -ERESTARTSYS)
			break;

		if (r) {
			DSSERR("mgr(%d)->wait_for_go() timeout\n", mgr->id);
			break;
		}
	}

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	dispc_runtime_put();

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	return r;
}

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static int dss_mgr_wait_for_go_ovl(struct omap_overlay *ovl)
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{
	unsigned long timeout = msecs_to_jiffies(500);
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	struct ovl_priv_data *op;
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	struct mgr_priv_data *mp;
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	u32 irq;
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	unsigned long flags;
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	int r;
	int i;

	if (!ovl->manager)
		return 0;

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	mp = get_mgr_priv(ovl->manager);
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	spin_lock_irqsave(&data_lock, flags);

	if (ovl_manual_update(ovl)) {
		spin_unlock_irqrestore(&data_lock, flags);
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		return 0;
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	}
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	if (!mp->enabled) {
		spin_unlock_irqrestore(&data_lock, flags);
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		return 0;
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	}

	spin_unlock_irqrestore(&data_lock, flags);
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	r = dispc_runtime_get();
	if (r)
		return r;

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	irq = dispc_mgr_get_vsync_irq(ovl->manager->id);
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	op = get_ovl_priv(ovl);
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	i = 0;
	while (1) {
		bool shadow_dirty, dirty;

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		spin_lock_irqsave(&data_lock, flags);
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		dirty = op->info_dirty;
		shadow_dirty = op->shadow_info_dirty;
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		spin_unlock_irqrestore(&data_lock, flags);
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		if (!dirty && !shadow_dirty) {
			r = 0;
			break;
		}

		/* 4 iterations is the worst case:
		 * 1 - initial iteration, dirty = true (between VFP and VSYNC)
		 * 2 - first VSYNC, dirty = true
		 * 3 - dirty = false, shadow_dirty = true
		 * 4 - shadow_dirty = false */
		if (i++ == 3) {
			DSSERR("ovl(%d)->wait_for_go() not finishing\n",
					ovl->id);
			r = 0;
			break;
		}

		r = omap_dispc_wait_for_irq_interruptible_timeout(irq, timeout);
		if (r == -ERESTARTSYS)
			break;

		if (r) {
			DSSERR("ovl(%d)->wait_for_go() timeout\n", ovl->id);
			break;
		}
	}

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	dispc_runtime_put();

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	return r;
}

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static void dss_ovl_write_regs(struct omap_overlay *ovl)
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{
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	struct ovl_priv_data *op = get_ovl_priv(ovl);
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	struct omap_overlay_info *oi;
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	bool replication;
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	struct mgr_priv_data *mp;
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	int r;

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	DSSDBG("writing ovl %d regs\n", ovl->id);
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	if (!op->enabled || !op->info_dirty)
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		return;
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	oi = &op->info;
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	mp = get_mgr_priv(ovl->manager);

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	replication = dss_ovl_use_replication(mp->lcd_config, oi->color_mode);
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	r = dispc_ovl_setup(ovl->id, oi, replication, &mp->timings, false);
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	if (r) {
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		/*
		 * We can't do much here, as this function can be called from
		 * vsync interrupt.
		 */
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		DSSERR("dispc_ovl_setup failed for ovl %d\n", ovl->id);
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		/* This will leave fifo configurations in a nonoptimal state */
		op->enabled = false;
		dispc_ovl_enable(ovl->id, false);
		return;
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	}

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	op->info_dirty = false;
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	if (mp->updating)
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		op->shadow_info_dirty = true;
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}

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static void dss_ovl_write_regs_extra(struct omap_overlay *ovl)
{
	struct ovl_priv_data *op = get_ovl_priv(ovl);
T
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668
	struct mgr_priv_data *mp;
669

T
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670
	DSSDBG("writing ovl %d regs extra\n", ovl->id);
671

672 673 674
	if (!op->extra_info_dirty)
		return;

675 676 677 678
	/* note: write also when op->enabled == false, so that the ovl gets
	 * disabled */

	dispc_ovl_enable(ovl->id, op->enabled);
679
	dispc_ovl_set_fifo_threshold(ovl->id, op->fifo_low, op->fifo_high);
680

T
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681 682
	mp = get_mgr_priv(ovl->manager);

683
	op->extra_info_dirty = false;
T
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684 685
	if (mp->updating)
		op->shadow_extra_info_dirty = true;
686 687
}

688
static void dss_mgr_write_regs(struct omap_overlay_manager *mgr)
T
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689
{
690 691
	struct mgr_priv_data *mp = get_mgr_priv(mgr);
	struct omap_overlay *ovl;
T
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692

T
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693
	DSSDBG("writing mgr %d regs\n", mgr->id);
T
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694

695 696
	if (!mp->enabled)
		return;
T
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697

698
	WARN_ON(mp->busy);
T
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699 700

	/* Commit overlay settings */
701 702
	list_for_each_entry(ovl, &mgr->overlays, list) {
		dss_ovl_write_regs(ovl);
703 704 705
		dss_ovl_write_regs_extra(ovl);
	}

706
	if (mp->info_dirty) {
707
		dispc_mgr_setup(mgr->id, &mp->info);
T
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708

709
		mp->info_dirty = false;
T
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710
		if (mp->updating)
711
			mp->shadow_info_dirty = true;
T
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712
	}
713 714
}

715 716 717 718
static void dss_mgr_write_regs_extra(struct omap_overlay_manager *mgr)
{
	struct mgr_priv_data *mp = get_mgr_priv(mgr);

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719
	DSSDBG("writing mgr %d regs extra\n", mgr->id);
720 721 722 723 724 725

	if (!mp->extra_info_dirty)
		return;

	dispc_mgr_set_timings(mgr->id, &mp->timings);

726
	/* lcd_config parameters */
727 728
	if (dss_mgr_is_lcd(mgr->id))
		dispc_mgr_set_lcd_config(mgr->id, &mp->lcd_config);
729

730 731 732 733 734
	mp->extra_info_dirty = false;
	if (mp->updating)
		mp->shadow_extra_info_dirty = true;
}

735 736 737 738
static void dss_write_regs(void)
{
	const int num_mgrs = omap_dss_get_num_overlay_managers();
	int i;
T
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739 740

	for (i = 0; i < num_mgrs; ++i) {
741 742
		struct omap_overlay_manager *mgr;
		struct mgr_priv_data *mp;
743
		int r;
744

745 746
		mgr = omap_dss_get_overlay_manager(i);
		mp = get_mgr_priv(mgr);
T
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747

748
		if (!mp->enabled || mgr_manual_update(mgr) || mp->busy)
T
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749 750
			continue;

751
		r = dss_check_settings(mgr);
752 753 754 755 756 757
		if (r) {
			DSSERR("cannot write registers for manager %s: "
					"illegal configuration\n", mgr->name);
			continue;
		}

758
		dss_mgr_write_regs(mgr);
759
		dss_mgr_write_regs_extra(mgr);
760 761
	}
}
762

763 764 765 766
static void dss_set_go_bits(void)
{
	const int num_mgrs = omap_dss_get_num_overlay_managers();
	int i;
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768 769 770
	for (i = 0; i < num_mgrs; ++i) {
		struct omap_overlay_manager *mgr;
		struct mgr_priv_data *mp;
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772 773 774 775 776 777 778 779 780 781 782 783 784 785 786
		mgr = omap_dss_get_overlay_manager(i);
		mp = get_mgr_priv(mgr);

		if (!mp->enabled || mgr_manual_update(mgr) || mp->busy)
			continue;

		if (!need_go(mgr))
			continue;

		mp->busy = true;

		if (!dss_data.irq_enabled && need_isr())
			dss_register_vsync_isr();

		dispc_mgr_go(mgr->id);
787
	}
788

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789 790
}

791 792 793 794 795 796 797 798
static void mgr_clear_shadow_dirty(struct omap_overlay_manager *mgr)
{
	struct omap_overlay *ovl;
	struct mgr_priv_data *mp;
	struct ovl_priv_data *op;

	mp = get_mgr_priv(mgr);
	mp->shadow_info_dirty = false;
799
	mp->shadow_extra_info_dirty = false;
800 801 802 803 804 805 806 807

	list_for_each_entry(ovl, &mgr->overlays, list) {
		op = get_ovl_priv(ovl);
		op->shadow_info_dirty = false;
		op->shadow_extra_info_dirty = false;
	}
}

808
static int dss_mgr_connect_compat(struct omap_overlay_manager *mgr,
809
		struct omap_dss_device *dst)
810 811 812 813 814
{
	return mgr->set_output(mgr, dst);
}

static void dss_mgr_disconnect_compat(struct omap_overlay_manager *mgr,
815
		struct omap_dss_device *dst)
816 817 818 819
{
	mgr->unset_output(mgr);
}

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820
static void dss_mgr_start_update_compat(struct omap_overlay_manager *mgr)
T
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821
{
822
	struct mgr_priv_data *mp = get_mgr_priv(mgr);
823
	unsigned long flags;
824
	int r;
825 826

	spin_lock_irqsave(&data_lock, flags);
T
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827

T
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828 829
	WARN_ON(mp->updating);

830
	r = dss_check_settings(mgr);
831 832 833 834 835 836
	if (r) {
		DSSERR("cannot start manual update: illegal configuration\n");
		spin_unlock_irqrestore(&data_lock, flags);
		return;
	}

837
	dss_mgr_write_regs(mgr);
838
	dss_mgr_write_regs_extra(mgr);
T
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839

T
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840
	mp->updating = true;
T
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841

T
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842 843
	if (!dss_data.irq_enabled && need_isr())
		dss_register_vsync_isr();
T
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844

845
	dispc_mgr_enable_sync(mgr->id);
846 847

	spin_unlock_irqrestore(&data_lock, flags);
T
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848 849
}

850 851 852 853
static void dss_apply_irq_handler(void *data, u32 mask);

static void dss_register_vsync_isr(void)
{
854
	const int num_mgrs = dss_feat_get_num_mgrs();
855
	u32 mask;
856
	int r, i;
857

858 859 860
	mask = 0;
	for (i = 0; i < num_mgrs; ++i)
		mask |= dispc_mgr_get_vsync_irq(i);
861

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862 863 864
	for (i = 0; i < num_mgrs; ++i)
		mask |= dispc_mgr_get_framedone_irq(i);

865 866 867
	r = omap_dispc_register_isr(dss_apply_irq_handler, NULL, mask);
	WARN_ON(r);

868
	dss_data.irq_enabled = true;
869 870 871 872
}

static void dss_unregister_vsync_isr(void)
{
873
	const int num_mgrs = dss_feat_get_num_mgrs();
874
	u32 mask;
875
	int r, i;
876

877 878 879
	mask = 0;
	for (i = 0; i < num_mgrs; ++i)
		mask |= dispc_mgr_get_vsync_irq(i);
880

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881 882 883
	for (i = 0; i < num_mgrs; ++i)
		mask |= dispc_mgr_get_framedone_irq(i);

884 885 886
	r = omap_dispc_unregister_isr(dss_apply_irq_handler, NULL, mask);
	WARN_ON(r);

887
	dss_data.irq_enabled = false;
888 889
}

890 891
static void dss_apply_irq_handler(void *data, u32 mask)
{
T
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892
	const int num_mgrs = dss_feat_get_num_mgrs();
893
	int i;
894
	bool extra_updating;
T
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895

896
	spin_lock(&data_lock);
T
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897

898
	/* clear busy, updating flags, shadow_dirty flags */
899
	for (i = 0; i < num_mgrs; i++) {
900 901 902
		struct omap_overlay_manager *mgr;
		struct mgr_priv_data *mp;

903 904 905
		mgr = omap_dss_get_overlay_manager(i);
		mp = get_mgr_priv(mgr);

906
		if (!mp->enabled)
907 908
			continue;

909
		mp->updating = dispc_mgr_is_enabled(i);
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910

911
		if (!mgr_manual_update(mgr)) {
912
			bool was_busy = mp->busy;
913
			mp->busy = dispc_mgr_go_busy(i);
914

915
			if (was_busy && !mp->busy)
916 917
				mgr_clear_shadow_dirty(mgr);
		}
T
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918 919
	}

920
	dss_write_regs();
921
	dss_set_go_bits();
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922

923 924 925 926
	extra_updating = extra_info_update_ongoing();
	if (!extra_updating)
		complete_all(&extra_updated_completion);

927 928 929 930 931 932 933 934 935 936 937 938 939 940 941
	/* call framedone handlers for manual update displays */
	for (i = 0; i < num_mgrs; i++) {
		struct omap_overlay_manager *mgr;
		struct mgr_priv_data *mp;

		mgr = omap_dss_get_overlay_manager(i);
		mp = get_mgr_priv(mgr);

		if (!mgr_manual_update(mgr) || !mp->framedone_handler)
			continue;

		if (mask & dispc_mgr_get_framedone_irq(i))
			mp->framedone_handler(mp->framedone_handler_data);
	}

942 943
	if (!need_isr())
		dss_unregister_vsync_isr();
T
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944

945
	spin_unlock(&data_lock);
T
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946 947
}

948
static void omap_dss_mgr_apply_ovl(struct omap_overlay *ovl)
T
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949
{
950
	struct ovl_priv_data *op;
T
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951

952
	op = get_ovl_priv(ovl);
T
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953

954
	if (!op->user_info_dirty)
955
		return;
T
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956

957
	op->user_info_dirty = false;
958
	op->info_dirty = true;
959
	op->info = op->user_info;
T
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960 961 962 963
}

static void omap_dss_mgr_apply_mgr(struct omap_overlay_manager *mgr)
{
964
	struct mgr_priv_data *mp;
T
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965

966
	mp = get_mgr_priv(mgr);
T
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967

968
	if (!mp->user_info_dirty)
T
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969 970
		return;

971
	mp->user_info_dirty = false;
972
	mp->info_dirty = true;
973
	mp->info = mp->user_info;
T
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974 975
}

976
static int omap_dss_mgr_apply(struct omap_overlay_manager *mgr)
T
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977
{
978 979
	unsigned long flags;
	struct omap_overlay *ovl;
980
	int r;
981 982 983 984 985

	DSSDBG("omap_dss_mgr_apply(%s)\n", mgr->name);

	spin_lock_irqsave(&data_lock, flags);

986
	r = dss_check_settings_apply(mgr);
987 988 989 990 991 992
	if (r) {
		spin_unlock_irqrestore(&data_lock, flags);
		DSSERR("failed to apply settings: illegal configuration.\n");
		return r;
	}

993 994 995 996 997 998 999 1000
	/* Configure overlays */
	list_for_each_entry(ovl, &mgr->overlays, list)
		omap_dss_mgr_apply_ovl(ovl);

	/* Configure manager */
	omap_dss_mgr_apply_mgr(mgr);

	dss_write_regs();
1001
	dss_set_go_bits();
1002 1003 1004

	spin_unlock_irqrestore(&data_lock, flags);

1005
	return 0;
1006 1007
}

1008 1009 1010 1011 1012 1013 1014 1015 1016 1017 1018 1019 1020
static void dss_apply_ovl_enable(struct omap_overlay *ovl, bool enable)
{
	struct ovl_priv_data *op;

	op = get_ovl_priv(ovl);

	if (op->enabled == enable)
		return;

	op->enabled = enable;
	op->extra_info_dirty = true;
}

1021 1022 1023 1024 1025 1026 1027 1028 1029 1030 1031 1032 1033
static void dss_apply_ovl_fifo_thresholds(struct omap_overlay *ovl,
		u32 fifo_low, u32 fifo_high)
{
	struct ovl_priv_data *op = get_ovl_priv(ovl);

	if (op->fifo_low == fifo_low && op->fifo_high == fifo_high)
		return;

	op->fifo_low = fifo_low;
	op->fifo_high = fifo_high;
	op->extra_info_dirty = true;
}

1034
static void dss_ovl_setup_fifo(struct omap_overlay *ovl)
1035 1036 1037
{
	struct ovl_priv_data *op = get_ovl_priv(ovl);
	u32 fifo_low, fifo_high;
1038
	bool use_fifo_merge = false;
T
Tomi Valkeinen 已提交
1039

1040 1041 1042
	if (!op->enabled && !op->enabling)
		return;

1043
	dispc_ovl_compute_fifo_thresholds(ovl->id, &fifo_low, &fifo_high,
1044
			use_fifo_merge, ovl_manual_update(ovl));
1045

1046
	dss_apply_ovl_fifo_thresholds(ovl, fifo_low, fifo_high);
T
Tomi Valkeinen 已提交
1047 1048
}

1049
static void dss_mgr_setup_fifos(struct omap_overlay_manager *mgr)
T
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1050
{
1051
	struct omap_overlay *ovl;
1052
	struct mgr_priv_data *mp;
T
Tomi Valkeinen 已提交
1053

1054
	mp = get_mgr_priv(mgr);
T
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1055

1056 1057
	if (!mp->enabled)
		return;
T
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1058

1059
	list_for_each_entry(ovl, &mgr->overlays, list)
1060
		dss_ovl_setup_fifo(ovl);
1061
}
T
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1062

1063
static void dss_setup_fifos(void)
1064 1065 1066 1067
{
	const int num_mgrs = omap_dss_get_num_overlay_managers();
	struct omap_overlay_manager *mgr;
	int i;
T
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1068

1069 1070
	for (i = 0; i < num_mgrs; ++i) {
		mgr = omap_dss_get_overlay_manager(i);
1071
		dss_mgr_setup_fifos(mgr);
1072
	}
T
Tomi Valkeinen 已提交
1073 1074
}

T
Tomi Valkeinen 已提交
1075
static int dss_mgr_enable_compat(struct omap_overlay_manager *mgr)
1076
{
1077 1078
	struct mgr_priv_data *mp = get_mgr_priv(mgr);
	unsigned long flags;
1079
	int r;
1080

T
Tomi Valkeinen 已提交
1081 1082
	mutex_lock(&apply_lock);

1083 1084 1085
	if (mp->enabled)
		goto out;

1086 1087
	spin_lock_irqsave(&data_lock, flags);

1088
	mp->enabled = true;
1089

1090
	r = dss_check_settings(mgr);
1091 1092 1093
	if (r) {
		DSSERR("failed to enable manager %d: check_settings failed\n",
				mgr->id);
1094
		goto err;
1095 1096
	}

1097
	dss_setup_fifos();
1098

1099
	dss_write_regs();
1100
	dss_set_go_bits();
1101

T
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1102 1103 1104
	if (!mgr_manual_update(mgr))
		mp->updating = true;

1105 1106 1107
	if (!dss_data.irq_enabled && need_isr())
		dss_register_vsync_isr();

1108
	spin_unlock_irqrestore(&data_lock, flags);
T
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1109

1110
	if (!mgr_manual_update(mgr))
1111
		dispc_mgr_enable_sync(mgr->id);
1112

1113
out:
T
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1114
	mutex_unlock(&apply_lock);
1115 1116 1117 1118

	return 0;

err:
1119
	mp->enabled = false;
1120 1121 1122
	spin_unlock_irqrestore(&data_lock, flags);
	mutex_unlock(&apply_lock);
	return r;
1123 1124
}

T
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1125
static void dss_mgr_disable_compat(struct omap_overlay_manager *mgr)
1126
{
1127 1128 1129
	struct mgr_priv_data *mp = get_mgr_priv(mgr);
	unsigned long flags;

T
Tomi Valkeinen 已提交
1130 1131
	mutex_lock(&apply_lock);

1132 1133 1134
	if (!mp->enabled)
		goto out;

1135 1136
	wait_pending_extra_info_updates();

1137
	if (!mgr_manual_update(mgr))
1138
		dispc_mgr_disable_sync(mgr->id);
1139 1140 1141

	spin_lock_irqsave(&data_lock, flags);

T
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1142
	mp->updating = false;
1143 1144 1145
	mp->enabled = false;

	spin_unlock_irqrestore(&data_lock, flags);
T
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1146

1147
out:
T
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1148
	mutex_unlock(&apply_lock);
1149 1150
}

1151
static int dss_mgr_set_info(struct omap_overlay_manager *mgr,
1152 1153
		struct omap_overlay_manager_info *info)
{
1154
	struct mgr_priv_data *mp = get_mgr_priv(mgr);
1155
	unsigned long flags;
1156 1157 1158 1159 1160
	int r;

	r = dss_mgr_simple_check(mgr, info);
	if (r)
		return r;
1161 1162 1163

	spin_lock_irqsave(&data_lock, flags);

1164 1165
	mp->user_info = *info;
	mp->user_info_dirty = true;
1166

1167 1168
	spin_unlock_irqrestore(&data_lock, flags);

1169 1170 1171
	return 0;
}

1172
static void dss_mgr_get_info(struct omap_overlay_manager *mgr,
1173 1174
		struct omap_overlay_manager_info *info)
{
1175
	struct mgr_priv_data *mp = get_mgr_priv(mgr);
1176 1177 1178 1179
	unsigned long flags;

	spin_lock_irqsave(&data_lock, flags);

1180
	*info = mp->user_info;
1181 1182

	spin_unlock_irqrestore(&data_lock, flags);
1183 1184
}

1185
static int dss_mgr_set_output(struct omap_overlay_manager *mgr,
1186
		struct omap_dss_device *output)
1187 1188 1189 1190 1191 1192 1193 1194 1195 1196 1197 1198 1199 1200 1201 1202 1203 1204 1205 1206 1207 1208 1209 1210 1211 1212 1213 1214 1215 1216
{
	int r;

	mutex_lock(&apply_lock);

	if (mgr->output) {
		DSSERR("manager %s is already connected to an output\n",
			mgr->name);
		r = -EINVAL;
		goto err;
	}

	if ((mgr->supported_outputs & output->id) == 0) {
		DSSERR("output does not support manager %s\n",
			mgr->name);
		r = -EINVAL;
		goto err;
	}

	output->manager = mgr;
	mgr->output = output;

	mutex_unlock(&apply_lock);

	return 0;
err:
	mutex_unlock(&apply_lock);
	return r;
}

1217
static int dss_mgr_unset_output(struct omap_overlay_manager *mgr)
1218 1219 1220 1221 1222 1223 1224 1225 1226 1227 1228 1229 1230 1231 1232 1233 1234 1235 1236 1237 1238 1239 1240 1241 1242 1243 1244 1245 1246 1247 1248 1249 1250 1251 1252 1253 1254
{
	int r;
	struct mgr_priv_data *mp = get_mgr_priv(mgr);
	unsigned long flags;

	mutex_lock(&apply_lock);

	if (!mgr->output) {
		DSSERR("failed to unset output, output not set\n");
		r = -EINVAL;
		goto err;
	}

	spin_lock_irqsave(&data_lock, flags);

	if (mp->enabled) {
		DSSERR("output can't be unset when manager is enabled\n");
		r = -EINVAL;
		goto err1;
	}

	spin_unlock_irqrestore(&data_lock, flags);

	mgr->output->manager = NULL;
	mgr->output = NULL;

	mutex_unlock(&apply_lock);

	return 0;
err1:
	spin_unlock_irqrestore(&data_lock, flags);
err:
	mutex_unlock(&apply_lock);

	return r;
}

1255
static void dss_apply_mgr_timings(struct omap_overlay_manager *mgr,
1256
		const struct omap_video_timings *timings)
1257 1258 1259 1260 1261 1262 1263
{
	struct mgr_priv_data *mp = get_mgr_priv(mgr);

	mp->timings = *timings;
	mp->extra_info_dirty = true;
}

T
Tomi Valkeinen 已提交
1264
static void dss_mgr_set_timings_compat(struct omap_overlay_manager *mgr,
1265
		const struct omap_video_timings *timings)
1266 1267
{
	unsigned long flags;
1268
	struct mgr_priv_data *mp = get_mgr_priv(mgr);
1269 1270 1271

	spin_lock_irqsave(&data_lock, flags);

1272 1273 1274 1275 1276
	if (mp->updating) {
		DSSERR("cannot set timings for %s: manager needs to be disabled\n",
			mgr->name);
		goto out;
	}
1277

1278 1279
	dss_apply_mgr_timings(mgr, timings);
out:
1280 1281
	spin_unlock_irqrestore(&data_lock, flags);
}
1282

1283 1284 1285 1286 1287 1288 1289 1290 1291
static void dss_apply_mgr_lcd_config(struct omap_overlay_manager *mgr,
		const struct dss_lcd_mgr_config *config)
{
	struct mgr_priv_data *mp = get_mgr_priv(mgr);

	mp->lcd_config = *config;
	mp->extra_info_dirty = true;
}

T
Tomi Valkeinen 已提交
1292
static void dss_mgr_set_lcd_config_compat(struct omap_overlay_manager *mgr,
1293 1294 1295 1296 1297
		const struct dss_lcd_mgr_config *config)
{
	unsigned long flags;
	struct mgr_priv_data *mp = get_mgr_priv(mgr);

1298
	spin_lock_irqsave(&data_lock, flags);
1299 1300 1301 1302 1303 1304 1305 1306 1307

	if (mp->enabled) {
		DSSERR("cannot apply lcd config for %s: manager needs to be disabled\n",
			mgr->name);
		goto out;
	}

	dss_apply_mgr_lcd_config(mgr, config);
out:
1308
	spin_unlock_irqrestore(&data_lock, flags);
1309 1310
}

1311
static int dss_ovl_set_info(struct omap_overlay *ovl,
1312 1313
		struct omap_overlay_info *info)
{
1314
	struct ovl_priv_data *op = get_ovl_priv(ovl);
1315
	unsigned long flags;
1316 1317 1318 1319 1320
	int r;

	r = dss_ovl_simple_check(ovl, info);
	if (r)
		return r;
1321 1322 1323

	spin_lock_irqsave(&data_lock, flags);

1324 1325
	op->user_info = *info;
	op->user_info_dirty = true;
1326

1327 1328
	spin_unlock_irqrestore(&data_lock, flags);

1329 1330 1331
	return 0;
}

1332
static void dss_ovl_get_info(struct omap_overlay *ovl,
1333 1334
		struct omap_overlay_info *info)
{
1335
	struct ovl_priv_data *op = get_ovl_priv(ovl);
1336 1337 1338 1339
	unsigned long flags;

	spin_lock_irqsave(&data_lock, flags);

1340
	*info = op->user_info;
1341 1342

	spin_unlock_irqrestore(&data_lock, flags);
1343 1344
}

1345
static int dss_ovl_set_manager(struct omap_overlay *ovl,
1346 1347
		struct omap_overlay_manager *mgr)
{
1348 1349
	struct ovl_priv_data *op = get_ovl_priv(ovl);
	unsigned long flags;
T
Tomi Valkeinen 已提交
1350 1351
	int r;

1352 1353 1354
	if (!mgr)
		return -EINVAL;

T
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1355 1356
	mutex_lock(&apply_lock);

1357 1358 1359
	if (ovl->manager) {
		DSSERR("overlay '%s' already has a manager '%s'\n",
				ovl->name, ovl->manager->name);
T
Tomi Valkeinen 已提交
1360 1361
		r = -EINVAL;
		goto err;
1362 1363
	}

1364 1365 1366 1367
	r = dispc_runtime_get();
	if (r)
		goto err;

1368 1369 1370 1371
	spin_lock_irqsave(&data_lock, flags);

	if (op->enabled) {
		spin_unlock_irqrestore(&data_lock, flags);
1372
		DSSERR("overlay has to be disabled to change the manager\n");
T
Tomi Valkeinen 已提交
1373
		r = -EINVAL;
1374
		goto err1;
1375 1376
	}

1377
	dispc_ovl_set_channel_out(ovl->id, mgr->id);
1378

1379 1380 1381
	ovl->manager = mgr;
	list_add_tail(&ovl->list, &mgr->overlays);

1382 1383
	spin_unlock_irqrestore(&data_lock, flags);

1384
	dispc_runtime_put();
1385

T
Tomi Valkeinen 已提交
1386 1387
	mutex_unlock(&apply_lock);

1388
	return 0;
1389 1390 1391

err1:
	dispc_runtime_put();
T
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1392 1393 1394
err:
	mutex_unlock(&apply_lock);
	return r;
1395 1396
}

1397
static int dss_ovl_unset_manager(struct omap_overlay *ovl)
1398
{
1399 1400
	struct ovl_priv_data *op = get_ovl_priv(ovl);
	unsigned long flags;
T
Tomi Valkeinen 已提交
1401 1402 1403 1404
	int r;

	mutex_lock(&apply_lock);

1405 1406
	if (!ovl->manager) {
		DSSERR("failed to detach overlay: manager not set\n");
T
Tomi Valkeinen 已提交
1407 1408
		r = -EINVAL;
		goto err;
1409 1410
	}

1411 1412 1413 1414
	spin_lock_irqsave(&data_lock, flags);

	if (op->enabled) {
		spin_unlock_irqrestore(&data_lock, flags);
1415
		DSSERR("overlay has to be disabled to unset the manager\n");
T
Tomi Valkeinen 已提交
1416 1417
		r = -EINVAL;
		goto err;
1418 1419
	}

1420 1421 1422 1423 1424
	spin_unlock_irqrestore(&data_lock, flags);

	/* wait for pending extra_info updates to ensure the ovl is disabled */
	wait_pending_extra_info_updates();

1425 1426 1427 1428 1429 1430 1431 1432 1433 1434
	/*
	 * For a manual update display, there is no guarantee that the overlay
	 * is really disabled in HW, we may need an extra update from this
	 * manager before the configurations can go in. Return an error if the
	 * overlay needed an update from the manager.
	 *
	 * TODO: Instead of returning an error, try to do a dummy manager update
	 * here to disable the overlay in hardware. Use the *GATED fields in
	 * the DISPC_CONFIG registers to do a dummy update.
	 */
1435 1436
	spin_lock_irqsave(&data_lock, flags);

1437 1438 1439 1440 1441 1442
	if (ovl_manual_update(ovl) && op->extra_info_dirty) {
		spin_unlock_irqrestore(&data_lock, flags);
		DSSERR("need an update to change the manager\n");
		r = -EINVAL;
		goto err;
	}
1443

1444 1445 1446
	ovl->manager = NULL;
	list_del(&ovl->list);

1447 1448 1449 1450 1451 1452 1453 1454 1455 1456
	spin_unlock_irqrestore(&data_lock, flags);

	mutex_unlock(&apply_lock);

	return 0;
err:
	mutex_unlock(&apply_lock);
	return r;
}

1457
static bool dss_ovl_is_enabled(struct omap_overlay *ovl)
1458 1459 1460 1461 1462 1463 1464 1465 1466 1467 1468 1469 1470 1471
{
	struct ovl_priv_data *op = get_ovl_priv(ovl);
	unsigned long flags;
	bool e;

	spin_lock_irqsave(&data_lock, flags);

	e = op->enabled;

	spin_unlock_irqrestore(&data_lock, flags);

	return e;
}

1472
static int dss_ovl_enable(struct omap_overlay *ovl)
1473 1474 1475 1476 1477 1478 1479
{
	struct ovl_priv_data *op = get_ovl_priv(ovl);
	unsigned long flags;
	int r;

	mutex_lock(&apply_lock);

1480 1481
	if (op->enabled) {
		r = 0;
1482
		goto err1;
1483 1484
	}

1485
	if (ovl->manager == NULL || ovl->manager->output == NULL) {
1486
		r = -EINVAL;
1487
		goto err1;
1488 1489 1490 1491
	}

	spin_lock_irqsave(&data_lock, flags);

T
Tomi Valkeinen 已提交
1492 1493
	op->enabling = true;

1494
	r = dss_check_settings(ovl->manager);
1495 1496 1497 1498 1499 1500
	if (r) {
		DSSERR("failed to enable overlay %d: check_settings failed\n",
				ovl->id);
		goto err2;
	}

1501
	dss_setup_fifos();
1502

T
Tomi Valkeinen 已提交
1503 1504 1505
	op->enabling = false;
	dss_apply_ovl_enable(ovl, true);

1506
	dss_write_regs();
1507
	dss_set_go_bits();
1508

1509 1510 1511 1512 1513
	spin_unlock_irqrestore(&data_lock, flags);

	mutex_unlock(&apply_lock);

	return 0;
1514
err2:
T
Tomi Valkeinen 已提交
1515
	op->enabling = false;
1516 1517
	spin_unlock_irqrestore(&data_lock, flags);
err1:
1518 1519 1520 1521
	mutex_unlock(&apply_lock);
	return r;
}

1522
static int dss_ovl_disable(struct omap_overlay *ovl)
1523 1524 1525 1526 1527 1528 1529
{
	struct ovl_priv_data *op = get_ovl_priv(ovl);
	unsigned long flags;
	int r;

	mutex_lock(&apply_lock);

1530 1531 1532 1533 1534
	if (!op->enabled) {
		r = 0;
		goto err;
	}

1535
	if (ovl->manager == NULL || ovl->manager->output == NULL) {
1536 1537 1538 1539 1540 1541
		r = -EINVAL;
		goto err;
	}

	spin_lock_irqsave(&data_lock, flags);

1542
	dss_apply_ovl_enable(ovl, false);
1543
	dss_write_regs();
1544
	dss_set_go_bits();
1545

1546 1547
	spin_unlock_irqrestore(&data_lock, flags);

T
Tomi Valkeinen 已提交
1548 1549
	mutex_unlock(&apply_lock);

1550
	return 0;
1551

T
Tomi Valkeinen 已提交
1552 1553 1554
err:
	mutex_unlock(&apply_lock);
	return r;
1555 1556
}

1557 1558 1559 1560 1561 1562 1563 1564 1565 1566 1567 1568 1569 1570 1571 1572 1573 1574 1575 1576 1577 1578 1579 1580 1581 1582
static int dss_mgr_register_framedone_handler_compat(struct omap_overlay_manager *mgr,
		void (*handler)(void *), void *data)
{
	struct mgr_priv_data *mp = get_mgr_priv(mgr);

	if (mp->framedone_handler)
		return -EBUSY;

	mp->framedone_handler = handler;
	mp->framedone_handler_data = data;

	return 0;
}

static void dss_mgr_unregister_framedone_handler_compat(struct omap_overlay_manager *mgr,
		void (*handler)(void *), void *data)
{
	struct mgr_priv_data *mp = get_mgr_priv(mgr);

	WARN_ON(mp->framedone_handler != handler ||
			mp->framedone_handler_data != data);

	mp->framedone_handler = NULL;
	mp->framedone_handler_data = NULL;
}

T
Tomi Valkeinen 已提交
1583
static const struct dss_mgr_ops apply_mgr_ops = {
1584 1585
	.connect = dss_mgr_connect_compat,
	.disconnect = dss_mgr_disconnect_compat,
T
Tomi Valkeinen 已提交
1586 1587 1588 1589 1590
	.start_update = dss_mgr_start_update_compat,
	.enable = dss_mgr_enable_compat,
	.disable = dss_mgr_disable_compat,
	.set_timings = dss_mgr_set_timings_compat,
	.set_lcd_config = dss_mgr_set_lcd_config_compat,
1591 1592
	.register_framedone_handler = dss_mgr_register_framedone_handler_compat,
	.unregister_framedone_handler = dss_mgr_unregister_framedone_handler_compat,
T
Tomi Valkeinen 已提交
1593 1594
};

1595 1596 1597 1598 1599
static int compat_refcnt;
static DEFINE_MUTEX(compat_init_lock);

int omapdss_compat_init(void)
{
1600
	struct platform_device *pdev = dss_get_core_pdev();
T
Tomi Valkeinen 已提交
1601
	int i, r;
1602

1603 1604 1605 1606 1607 1608 1609
	mutex_lock(&compat_init_lock);

	if (compat_refcnt++ > 0)
		goto out;

	apply_init_priv();

1610
	dss_init_overlay_managers_sysfs(pdev);
1611 1612
	dss_init_overlays(pdev);

1613 1614 1615 1616 1617 1618 1619 1620 1621 1622 1623 1624 1625 1626 1627
	for (i = 0; i < omap_dss_get_num_overlay_managers(); i++) {
		struct omap_overlay_manager *mgr;

		mgr = omap_dss_get_overlay_manager(i);

		mgr->set_output = &dss_mgr_set_output;
		mgr->unset_output = &dss_mgr_unset_output;
		mgr->apply = &omap_dss_mgr_apply;
		mgr->set_manager_info = &dss_mgr_set_info;
		mgr->get_manager_info = &dss_mgr_get_info;
		mgr->wait_for_go = &dss_mgr_wait_for_go;
		mgr->wait_for_vsync = &dss_mgr_wait_for_vsync;
		mgr->get_device = &dss_mgr_get_device;
	}

1628 1629 1630 1631 1632 1633 1634 1635 1636 1637 1638 1639 1640 1641
	for (i = 0; i < omap_dss_get_num_overlays(); i++) {
		struct omap_overlay *ovl = omap_dss_get_overlay(i);

		ovl->is_enabled = &dss_ovl_is_enabled;
		ovl->enable = &dss_ovl_enable;
		ovl->disable = &dss_ovl_disable;
		ovl->set_manager = &dss_ovl_set_manager;
		ovl->unset_manager = &dss_ovl_unset_manager;
		ovl->set_overlay_info = &dss_ovl_set_info;
		ovl->get_overlay_info = &dss_ovl_get_info;
		ovl->wait_for_go = &dss_mgr_wait_for_go_ovl;
		ovl->get_device = &dss_ovl_get_device;
	}

T
Tomi Valkeinen 已提交
1642 1643 1644 1645
	r = dss_install_mgr_ops(&apply_mgr_ops);
	if (r)
		goto err_mgr_ops;

1646 1647 1648
	r = display_init_sysfs(pdev);
	if (r)
		goto err_disp_sysfs;
1649

1650 1651 1652 1653 1654 1655 1656 1657
	dispc_runtime_get();

	r = dss_dispc_initialize_irq();
	if (r)
		goto err_init_irq;

	dispc_runtime_put();

1658 1659 1660 1661
out:
	mutex_unlock(&compat_init_lock);

	return 0;
T
Tomi Valkeinen 已提交
1662

1663 1664
err_init_irq:
	dispc_runtime_put();
1665
	display_uninit_sysfs(pdev);
1666 1667

err_disp_sysfs:
1668 1669
	dss_uninstall_mgr_ops();

T
Tomi Valkeinen 已提交
1670
err_mgr_ops:
1671
	dss_uninit_overlay_managers_sysfs(pdev);
T
Tomi Valkeinen 已提交
1672 1673 1674 1675 1676 1677 1678
	dss_uninit_overlays(pdev);

	compat_refcnt--;

	mutex_unlock(&compat_init_lock);

	return r;
1679 1680 1681 1682 1683
}
EXPORT_SYMBOL(omapdss_compat_init);

void omapdss_compat_uninit(void)
{
1684 1685
	struct platform_device *pdev = dss_get_core_pdev();

1686 1687 1688 1689 1690
	mutex_lock(&compat_init_lock);

	if (--compat_refcnt > 0)
		goto out;

1691 1692
	dss_dispc_uninitialize_irq();

1693
	display_uninit_sysfs(pdev);
1694

T
Tomi Valkeinen 已提交
1695 1696
	dss_uninstall_mgr_ops();

1697
	dss_uninit_overlay_managers_sysfs(pdev);
1698
	dss_uninit_overlays(pdev);
1699 1700 1701 1702
out:
	mutex_unlock(&compat_init_lock);
}
EXPORT_SYMBOL(omapdss_compat_uninit);